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-rw-r--r--drivers/net/4xx_enet.c6
-rw-r--r--drivers/net/altera_tse.c45
-rw-r--r--drivers/net/fec_mxc.c4
-rw-r--r--drivers/net/ks8695eth.c2
4 files changed, 42 insertions, 15 deletions
diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c
index 9ab5c8028c..8013ad9976 100644
--- a/drivers/net/4xx_enet.c
+++ b/drivers/net/4xx_enet.c
@@ -1349,7 +1349,7 @@ get_speed:
hw_p->rx_phys = bd_cached + MAL_TX_DESC_SIZE;
hw_p->tx = (mal_desc_t *)(bd_uncached);
hw_p->rx = (mal_desc_t *)(bd_uncached + MAL_TX_DESC_SIZE);
- debug("hw_p->tx=%08x, hw_p->rx=%08x\n", hw_p->tx, hw_p->rx);
+ debug("hw_p->tx=%p, hw_p->rx=%p\n", hw_p->tx, hw_p->rx);
}
for (i = 0; i < NUM_TX_BUFF; i++) {
@@ -1362,7 +1362,7 @@ get_speed:
if ((NUM_TX_BUFF - 1) == i)
hw_p->tx[i].ctrl |= MAL_TX_CTRL_WRAP;
hw_p->tx_run[i] = -1;
- debug("TX_BUFF %d @ 0x%08lx\n", i, (u32)hw_p->tx[i].data_ptr);
+ debug("TX_BUFF %d @ 0x%08x\n", i, (u32)hw_p->tx[i].data_ptr);
}
for (i = 0; i < NUM_RX_BUFF; i++) {
@@ -1373,7 +1373,7 @@ get_speed:
hw_p->rx[i].ctrl |= MAL_RX_CTRL_WRAP;
hw_p->rx[i].ctrl |= MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR;
hw_p->rx_ready[i] = -1;
- debug("RX_BUFF %d @ 0x%08lx\n", i, (u32)hw_p->rx[i].data_ptr);
+ debug("RX_BUFF %d @ 0x%08x\n", i, (u32)hw_p->rx[i].data_ptr);
}
reg = 0x00000000;
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index 54a944bfc4..5b00717d11 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -199,6 +199,12 @@ static int alt_sgdma_do_async_transfer(volatile struct alt_sgdma_registers *dev,
debug("Timeout waiting sgdma in do async!\n");
/*
+ * Clear the RUN bit in the control register. This is needed
+ * to restart the SGDMA engine later on.
+ */
+ dev->control = 0;
+
+ /*
* Clear any (previous) status register information
* that might occlude our error checking later.
*/
@@ -317,6 +323,8 @@ static int tse_eth_rx(struct eth_device *dev)
/* setup the sgdma */
alt_sgdma_do_async_transfer(priv->sgdma_rx, &rx_desc[0]);
+
+ return packet_length;
}
return -1;
@@ -351,8 +359,8 @@ static void tse_eth_reset(struct eth_device *dev)
if (counter >= ALT_TSE_SGDMA_BUSY_WATCHDOG_CNTR) {
debug("Timeout waiting for rx sgdma!\n");
- rx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
- rx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
+ rx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
+ rx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
}
counter = 0;
@@ -364,8 +372,8 @@ static void tse_eth_reset(struct eth_device *dev)
if (counter >= ALT_TSE_SGDMA_BUSY_WATCHDOG_CNTR) {
debug("Timeout waiting for tx sgdma!\n");
- tx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
- tx_sgdma->control &= ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
+ tx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
+ tx_sgdma->control = ALT_SGDMA_CONTROL_SOFTWARERESET_MSK;
}
/* reset the mac */
mac_dev->command_config.bits.transmit_enable = 1;
@@ -577,7 +585,11 @@ static uint mii_m88e1111s_setmode_sr(uint mii_reg, struct altera_tse_priv *priv)
{
uint mii_data = tse_mdio_read(priv, mii_reg);
mii_data &= 0xfff0;
- mii_data |= 0xb;
+ if ((priv->flags >= 1) && (priv->flags <= 4))
+ mii_data |= 0xb;
+ else if (priv->flags == 5)
+ mii_data |= 0x4;
+
return mii_data;
}
@@ -585,7 +597,9 @@ static uint mii_m88e1111s_setmode_cr(uint mii_reg, struct altera_tse_priv *priv)
{
uint mii_data = tse_mdio_read(priv, mii_reg);
mii_data &= ~0x82;
- mii_data |= 0x82;
+ if ((priv->flags >= 1) && (priv->flags <= 4))
+ mii_data |= 0x82;
+
return mii_data;
}
@@ -876,7 +890,8 @@ static int tse_eth_init(struct eth_device *dev, bd_t * bd)
/* TSE init code */
int altera_tse_initialize(u8 dev_num, int mac_base,
- int sgdma_rx_base, int sgdma_tx_base)
+ int sgdma_rx_base, int sgdma_tx_base,
+ u32 sgdma_desc_base, u32 sgdma_desc_size)
{
struct altera_tse_priv *priv;
struct eth_device *dev;
@@ -897,8 +912,20 @@ int altera_tse_initialize(u8 dev_num, int mac_base,
free(dev);
return 0;
}
- tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX),
- &dma_handle);
+ if (sgdma_desc_size) {
+ if (sgdma_desc_size < (sizeof(*tx_desc) * (3 + PKTBUFSRX))) {
+ printf("ALTERA_TSE-%hu: "
+ "descriptor memory is too small\n", dev_num);
+ free(priv);
+ free(dev);
+ return 0;
+ }
+ tx_desc = (struct alt_sgdma_descriptor *)sgdma_desc_base;
+ } else {
+ tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX),
+ &dma_handle);
+ }
+
rx_desc = tx_desc + 2;
debug("tx desc: address = 0x%x\n", (unsigned int)tx_desc);
debug("rx desc: address = 0x%x\n", (unsigned int)rx_desc);
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index cfe2176b33..0c0c7cd2c7 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -109,7 +109,7 @@ static void fec_mii_setspeed(struct fec_priv *fec)
*/
writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1,
&fec->eth->mii_speed);
- debug("fec_init: mii_speed %#lx\n",
+ debug("fec_init: mii_speed %08x\n",
readl(&fec->eth->mii_speed));
}
static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
@@ -629,7 +629,7 @@ static int fec_recv(struct eth_device *dev)
*/
ievent = readl(&fec->eth->ievent);
writel(ievent, &fec->eth->ievent);
- debug("fec_recv: ievent 0x%x\n", ievent);
+ debug("fec_recv: ievent 0x%lx\n", ievent);
if (ievent & FEC_IEVENT_BABR) {
fec_halt(dev);
fec_init(dev, fec->bd);
diff --git a/drivers/net/ks8695eth.c b/drivers/net/ks8695eth.c
index cd368808f2..8e988d1423 100644
--- a/drivers/net/ks8695eth.c
+++ b/drivers/net/ks8695eth.c
@@ -196,7 +196,7 @@ static int ks8695_eth_send(struct eth_device *dev, volatile void *packet,
volatile struct ks8695_txdesc *dp;
static int next = 0;
- debug ("%s(%d): eth_send(packet=%x,len=%d)\n", __FILE__, __LINE__,
+ debug ("%s(%d): eth_send(packet=%p,len=%d)\n", __FILE__, __LINE__,
packet, len);
dp = &ks8695_tx[next];
generated by cgit (git 2.34.1) at 2024-12-28 20:12:14 +0000