diff options
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/Kconfig | 5 | ||||
| -rw-r--r-- | drivers/net/Makefile | 1 | ||||
| -rw-r--r-- | drivers/net/cpsw.c | 2 | ||||
| -rw-r--r-- | drivers/net/mvgbe.c | 416 | ||||
| -rw-r--r-- | drivers/net/mvgbe.h | 16 | ||||
| -rw-r--r-- | drivers/net/phy/atheros.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/broadcom.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/davicom.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/generic_10g.c | 2 | ||||
| -rw-r--r-- | drivers/net/phy/lxt.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/marvell.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/micrel_ksz8xxx.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/micrel_ksz90x1.c | 2 | ||||
| -rw-r--r-- | drivers/net/phy/natsemi.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/phy.c | 6 | ||||
| -rw-r--r-- | drivers/net/phy/realtek.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/smsc.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/teranetics.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/ti.c | 41 | ||||
| -rw-r--r-- | drivers/net/phy/vitesse.c | 1 | ||||
| -rw-r--r-- | drivers/net/phy/xilinx_phy.c | 10 | ||||
| -rw-r--r-- | drivers/net/sandbox-raw-bus.c | 66 | ||||
| -rw-r--r-- | drivers/net/sandbox-raw.c | 53 | ||||
| -rw-r--r-- | drivers/net/sandbox.c | 16 | ||||
| -rw-r--r-- | drivers/net/zynq_gem.c | 30 |
25 files changed, 539 insertions, 138 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index e88f056d84..f762b0898d 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -7,8 +7,8 @@ config DM_ETH help Enable driver model for Ethernet. - The eth_*() interface will be implemented by the UC_ETH class - This is currently implemented in net/eth.c + The eth_*() interface will be implemented by the UCLASS_ETH class + This is currently implemented in net/eth-uclass.c Look in include/net.h for details. config DRIVER_TI_CPSW @@ -181,6 +181,7 @@ config FTMAC100 config MVGBE bool "Marvell Orion5x/Kirkwood network interface support" depends on KIRKWOOD || ORION5X + select PHYLIB if DM_ETH help This driver supports the network interface units in the Marvell Orion5x and Kirkwood SoCs diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 058dd00768..c1ed44e21f 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -50,6 +50,7 @@ obj-$(CONFIG_RTL8139) += rtl8139.o obj-$(CONFIG_RTL8169) += rtl8169.o obj-$(CONFIG_ETH_SANDBOX) += sandbox.o obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o +obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-bus.o obj-$(CONFIG_SH_ETHER) += sh_eth.o obj-$(CONFIG_RENESAS_RAVB) += ravb.o obj-$(CONFIG_SMC91111) += smc91111.o diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 9919d3919f..c31695eba9 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -999,7 +999,7 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave) #ifdef CONFIG_DM_ETH if (slave->data->phy_of_handle) - dev_set_of_offset(phydev->dev, slave->data->phy_of_handle); + phydev->node = offset_to_ofnode(slave->data->phy_of_handle); #endif priv->phydev = phydev; diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index e6585ef8b3..74fed7abd8 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -12,6 +12,7 @@ */ #include <common.h> +#include <dm.h> #include <net.h> #include <malloc.h> #include <miiphy.h> @@ -55,20 +56,13 @@ static int smi_wait_ready(struct mvgbe_device *dmvgbe) return 0; } -/* - * smi_reg_read - miiphy_read callback function. - * - * Returns 16bit phy register value, or -EFAULT on error - */ -static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, - int reg_ofs) +static int __mvgbe_mdio_read(struct mvgbe_device *dmvgbe, int phy_adr, + int devad, int reg_ofs) { - u16 data = 0; - struct eth_device *dev = eth_get_dev_by_name(bus->name); - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; u32 smi_reg; u32 timeout; + u16 data = 0; /* Phyadr read request */ if (phy_adr == MV_PHY_ADR_REQUEST && @@ -127,15 +121,26 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, } /* - * smi_reg_write - miiphy_write callback function. + * smi_reg_read - miiphy_read callback function. * - * Returns 0 if write succeed, -EFAULT on error + * Returns 16bit phy register value, or -EFAULT on error */ -static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, - int reg_ofs, u16 data) +static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, + int reg_ofs) { +#ifdef CONFIG_DM_ETH + struct mvgbe_device *dmvgbe = bus->priv; +#else struct eth_device *dev = eth_get_dev_by_name(bus->name); struct mvgbe_device *dmvgbe = to_mvgbe(dev); +#endif + + return __mvgbe_mdio_read(dmvgbe, phy_adr, devad, reg_ofs); +} + +static int __mvgbe_mdio_write(struct mvgbe_device *dmvgbe, int phy_adr, + int devad, int reg_ofs, u16 data) +{ struct mvgbe_registers *regs = dmvgbe->regs; u32 smi_reg; @@ -171,6 +176,24 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, return 0; } + +/* + * smi_reg_write - miiphy_write callback function. + * + * Returns 0 if write succeed, -EFAULT on error + */ +static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, + int reg_ofs, u16 data) +{ +#ifdef CONFIG_DM_ETH + struct mvgbe_device *dmvgbe = bus->priv; +#else + struct eth_device *dev = eth_get_dev_by_name(bus->name); + struct mvgbe_device *dmvgbe = to_mvgbe(dev); +#endif + + return __mvgbe_mdio_write(dmvgbe, phy_adr, devad, reg_ofs, data); +} #endif /* Stop and checks all queues */ @@ -357,8 +380,9 @@ static int port_uc_addr(struct mvgbe_registers *regs, u8 uc_nibble, /* * port_uc_addr_set - This function Set the port Unicast address. */ -static void port_uc_addr_set(struct mvgbe_registers *regs, u8 * p_addr) +static void port_uc_addr_set(struct mvgbe_device *dmvgbe, u8 *p_addr) { + struct mvgbe_registers *regs = dmvgbe->regs; u32 mac_h; u32 mac_l; @@ -400,12 +424,13 @@ static void mvgbe_init_rx_desc_ring(struct mvgbe_device *dmvgbe) dmvgbe->p_rxdesc_curr = dmvgbe->p_rxdesc; } -static int mvgbe_init(struct eth_device *dev) +static int __mvgbe_init(struct mvgbe_device *dmvgbe, u8 *enetaddr, + const char *name) { - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) && \ !defined(CONFIG_PHYLIB) && \ + !defined(CONFIG_DM_ETH) && \ defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN) int i; #endif @@ -422,7 +447,7 @@ static int mvgbe_init(struct eth_device *dev) set_dram_access(regs); port_init_mac_tables(regs); - port_uc_addr_set(regs, dmvgbe->dev.enetaddr); + port_uc_addr_set(dmvgbe, enetaddr); /* Assign port configuration and command. */ MVGBE_REG_WR(regs->pxc, PRT_CFG_VAL); @@ -459,28 +484,37 @@ static int mvgbe_init(struct eth_device *dev) #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) && \ !defined(CONFIG_PHYLIB) && \ + !defined(CONFIG_DM_ETH) && \ defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN) /* Wait up to 5s for the link status */ for (i = 0; i < 5; i++) { u16 phyadr; - miiphy_read(dev->name, MV_PHY_ADR_REQUEST, + miiphy_read(name, MV_PHY_ADR_REQUEST, MV_PHY_ADR_REQUEST, &phyadr); /* Return if we get link up */ - if (miiphy_link(dev->name, phyadr)) + if (miiphy_link(name, phyadr)) return 0; udelay(1000000); } - printf("No link on %s\n", dev->name); + printf("No link on %s\n", name); return -1; #endif return 0; } -static int mvgbe_halt(struct eth_device *dev) +#ifndef CONFIG_DM_ETH +static int mvgbe_init(struct eth_device *dev) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_init(dmvgbe, dmvgbe->dev.enetaddr, dmvgbe->dev.name); +} +#endif + +static void __mvgbe_halt(struct mvgbe_device *dmvgbe) +{ struct mvgbe_registers *regs = dmvgbe->regs; /* Disable all gigE address decoder */ @@ -502,23 +536,42 @@ static int mvgbe_halt(struct eth_device *dev) MVGBE_REG_WR(regs->ice, 0); MVGBE_REG_WR(regs->pim, 0); MVGBE_REG_WR(regs->peim, 0); +} + +#ifndef CONFIG_DM_ETH +static int mvgbe_halt(struct eth_device *dev) +{ + struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + __mvgbe_halt(dmvgbe); return 0; } +#endif + +#ifdef CONFIG_DM_ETH +static int mvgbe_write_hwaddr(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + port_uc_addr_set(dev_get_priv(dev), pdata->enetaddr); + + return 0; +} +#else static int mvgbe_write_hwaddr(struct eth_device *dev) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); - struct mvgbe_registers *regs = dmvgbe->regs; /* Programs net device MAC address after initialization */ - port_uc_addr_set(regs, dmvgbe->dev.enetaddr); + port_uc_addr_set(dmvgbe, dmvgbe->dev.enetaddr); return 0; } +#endif -static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) +static int __mvgbe_send(struct mvgbe_device *dmvgbe, void *dataptr, + int datasize) { - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; struct mvgbe_txdesc *p_txdesc = dmvgbe->p_txdesc; void *p = (void *)dataptr; @@ -571,13 +624,25 @@ static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) return 0; } -static int mvgbe_recv(struct eth_device *dev) +#ifndef CONFIG_DM_ETH +static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_send(dmvgbe, dataptr, datasize); +} +#endif + +static int __mvgbe_recv(struct mvgbe_device *dmvgbe, uchar **packetp) +{ struct mvgbe_rxdesc *p_rxdesc_curr = dmvgbe->p_rxdesc_curr; u32 cmd_sts; u32 timeout = 0; u32 rxdesc_curr_addr; + unsigned char *data; + int rx_bytes = 0; + + *packetp = NULL; /* wait untill rx packet available or timeout */ do { @@ -621,11 +686,11 @@ static int mvgbe_recv(struct eth_device *dev) " upper layer (net_process_received_packet)\n", __func__); - /* let the upper layer handle the packet */ - net_process_received_packet((p_rxdesc_curr->buf_ptr + - RX_BUF_OFFSET), - (int)(p_rxdesc_curr->byte_cnt - - RX_BUF_OFFSET)); + data = (p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET); + rx_bytes = (int)(p_rxdesc_curr->byte_cnt - + RX_BUF_OFFSET); + + *packetp = data; } /* * free these descriptors and point next in the ring @@ -638,10 +703,59 @@ static int mvgbe_recv(struct eth_device *dev) rxdesc_curr_addr = (u32)&dmvgbe->p_rxdesc_curr; writel((unsigned)p_rxdesc_curr->nxtdesc_p, rxdesc_curr_addr); + return rx_bytes; +} + +#ifndef CONFIG_DM_ETH +static int mvgbe_recv(struct eth_device *dev) +{ + struct mvgbe_device *dmvgbe = to_mvgbe(dev); + uchar *packet; + int ret; + + ret = __mvgbe_recv(dmvgbe, &packet); + if (ret < 0) + return ret; + + net_process_received_packet(packet, ret); + return 0; } +#endif -#if defined(CONFIG_PHYLIB) +#if defined(CONFIG_PHYLIB) || defined(CONFIG_DM_ETH) +#if defined(CONFIG_DM_ETH) +static struct phy_device *__mvgbe_phy_init(struct udevice *dev, + struct mii_dev *bus, + phy_interface_t phy_interface, + int phyid) +#else +static struct phy_device *__mvgbe_phy_init(struct eth_device *dev, + struct mii_dev *bus, + phy_interface_t phy_interface, + int phyid) +#endif +{ + struct phy_device *phydev; + + /* Set phy address of the port */ + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, MV_PHY_ADR_REQUEST, + phyid); + + phydev = phy_connect(bus, phyid, dev, phy_interface); + if (!phydev) { + printf("phy_connect failed\n"); + return NULL; + } + + phy_config(phydev); + phy_startup(phydev); + + return phydev; +} +#endif /* CONFIG_PHYLIB || CONFIG_DM_ETH */ + +#if defined(CONFIG_PHYLIB) && !defined(CONFIG_DM_ETH) int mvgbe_phylib_init(struct eth_device *dev, int phyid) { struct mii_dev *bus; @@ -664,27 +778,53 @@ int mvgbe_phylib_init(struct eth_device *dev, int phyid) return -ENOMEM; } - /* Set phy address of the port */ - smi_reg_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid); - - phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - printf("phy_connect failed\n"); + phydev = __mvgbe_phy_init(dev, bus, PHY_INTERFACE_MODE_RGMII, phyid); + if (!phydev) return -ENODEV; - } - - phy_config(phydev); - phy_startup(phydev); return 0; } #endif +static int mvgbe_alloc_buffers(struct mvgbe_device *dmvgbe) +{ + dmvgbe->p_rxdesc = memalign(PKTALIGN, + MV_RXQ_DESC_ALIGNED_SIZE * RINGSZ + 1); + if (!dmvgbe->p_rxdesc) + goto error1; + + dmvgbe->p_rxbuf = memalign(PKTALIGN, + RINGSZ * PKTSIZE_ALIGN + 1); + if (!dmvgbe->p_rxbuf) + goto error2; + + dmvgbe->p_aligned_txbuf = memalign(8, PKTSIZE_ALIGN); + if (!dmvgbe->p_aligned_txbuf) + goto error3; + + dmvgbe->p_txdesc = memalign(PKTALIGN, sizeof(struct mvgbe_txdesc) + 1); + if (!dmvgbe->p_txdesc) + goto error4; + + return 0; + +error4: + free(dmvgbe->p_aligned_txbuf); +error3: + free(dmvgbe->p_rxbuf); +error2: + free(dmvgbe->p_rxdesc); +error1: + return -ENOMEM; +} + +#ifndef CONFIG_DM_ETH int mvgbe_initialize(bd_t *bis) { struct mvgbe_device *dmvgbe; struct eth_device *dev; int devnum; + int ret; u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS; for (devnum = 0; devnum < MAX_MVGBE_DEVS; devnum++) { @@ -693,45 +833,16 @@ int mvgbe_initialize(bd_t *bis) continue; dmvgbe = malloc(sizeof(struct mvgbe_device)); - if (!dmvgbe) - goto error1; + return -ENOMEM; memset(dmvgbe, 0, sizeof(struct mvgbe_device)); - - dmvgbe->p_rxdesc = - (struct mvgbe_rxdesc *)memalign(PKTALIGN, - MV_RXQ_DESC_ALIGNED_SIZE*RINGSZ + 1); - - if (!dmvgbe->p_rxdesc) - goto error2; - - dmvgbe->p_rxbuf = (u8 *) memalign(PKTALIGN, - RINGSZ*PKTSIZE_ALIGN + 1); - - if (!dmvgbe->p_rxbuf) - goto error3; - - dmvgbe->p_aligned_txbuf = memalign(8, PKTSIZE_ALIGN); - - if (!dmvgbe->p_aligned_txbuf) - goto error4; - - dmvgbe->p_txdesc = (struct mvgbe_txdesc *) memalign( - PKTALIGN, sizeof(struct mvgbe_txdesc) + 1); - - if (!dmvgbe->p_txdesc) { - free(dmvgbe->p_aligned_txbuf); -error4: - free(dmvgbe->p_rxbuf); -error3: - free(dmvgbe->p_rxdesc); -error2: - free(dmvgbe); -error1: + ret = mvgbe_alloc_buffers(dmvgbe); + if (ret) { printf("Err.. %s Failed to allocate memory\n", __func__); - return -1; + free(dmvgbe); + return ret; } dev = &dmvgbe->dev; @@ -783,3 +894,154 @@ error1: } return 0; } +#endif + +#ifdef CONFIG_DM_ETH +static int mvgbe_port_is_fixed_link(struct mvgbe_device *dmvgbe) +{ + return dmvgbe->phyaddr > PHY_MAX_ADDR; +} + +static int mvgbe_start(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + int ret; + + ret = __mvgbe_init(dmvgbe, pdata->enetaddr, dev->name); + if (ret) + return ret; + + if (!mvgbe_port_is_fixed_link(dmvgbe)) { + dmvgbe->phydev = __mvgbe_phy_init(dev, dmvgbe->bus, + dmvgbe->phy_interface, + dmvgbe->phyaddr); + if (!dmvgbe->phydev) + return -ENODEV; + } + + return 0; +} + +static int mvgbe_send(struct udevice *dev, void *packet, int length) +{ + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + + return __mvgbe_send(dmvgbe, packet, length); +} + +static int mvgbe_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + + return __mvgbe_recv(dmvgbe, packetp); +} + +static void mvgbe_stop(struct udevice *dev) +{ + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + + __mvgbe_halt(dmvgbe); +} + +static int mvgbe_probe(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + struct mii_dev *bus; + int ret; + + ret = mvgbe_alloc_buffers(dmvgbe); + if (ret) + return ret; + + dmvgbe->regs = (void __iomem *)pdata->iobase; + + bus = mdio_alloc(); + if (!bus) { + printf("Failed to allocate MDIO bus\n"); + return -ENOMEM; + } + + bus->read = smi_reg_read; + bus->write = smi_reg_write; + snprintf(bus->name, sizeof(bus->name), dev->name); + bus->priv = dmvgbe; + dmvgbe->bus = bus; + + ret = mdio_register(bus); + if (ret < 0) + return ret; + + return 0; +} + +static const struct eth_ops mvgbe_ops = { + .start = mvgbe_start, + .send = mvgbe_send, + .recv = mvgbe_recv, + .stop = mvgbe_stop, + .write_hwaddr = mvgbe_write_hwaddr, +}; + +static int mvgbe_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct mvgbe_device *dmvgbe = dev_get_priv(dev); + void *blob = (void *)gd->fdt_blob; + int node = dev_of_offset(dev); + const char *phy_mode; + int fl_node; + int pnode; + unsigned long addr; + + pdata->iobase = devfdt_get_addr(dev); + pdata->phy_interface = -1; + + pnode = fdt_node_offset_by_compatible(blob, node, + "marvell,kirkwood-eth-port"); + + /* Get phy-mode / phy_interface from DT */ + phy_mode = fdt_getprop(gd->fdt_blob, pnode, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + + dmvgbe->phy_interface = pdata->phy_interface; + + /* fetch 'fixed-link' property */ + fl_node = fdt_subnode_offset(blob, pnode, "fixed-link"); + if (fl_node != -FDT_ERR_NOTFOUND) { + /* set phy_addr to invalid value for fixed link */ + dmvgbe->phyaddr = PHY_MAX_ADDR + 1; + dmvgbe->duplex = fdtdec_get_bool(blob, fl_node, "full-duplex"); + dmvgbe->speed = fdtdec_get_int(blob, fl_node, "speed", 0); + } else { + /* Now read phyaddr from DT */ + addr = fdtdec_lookup_phandle(blob, pnode, "phy-handle"); + if (addr > 0) + dmvgbe->phyaddr = fdtdec_get_int(blob, addr, "reg", 0); + } + + return 0; +} + +static const struct udevice_id mvgbe_ids[] = { + { .compatible = "marvell,kirkwood-eth" }, + { } +}; + +U_BOOT_DRIVER(mvgbe) = { + .name = "mvgbe", + .id = UCLASS_ETH, + .of_match = mvgbe_ids, + .ofdata_to_platdata = mvgbe_ofdata_to_platdata, + .probe = mvgbe_probe, + .ops = &mvgbe_ops, + .priv_auto_alloc_size = sizeof(struct mvgbe_device), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index 1dc9bbea2f..44541c0a85 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -30,7 +30,9 @@ #define RXUQ 0 /* Used Rx queue */ #define TXUQ 0 /* Used Rx queue */ +#ifndef CONFIG_DM_ETH #define to_mvgbe(_d) container_of(_d, struct mvgbe_device, dev) +#endif #define MVGBE_REG_WR(adr, val) writel(val, &adr) #define MVGBE_REG_RD(adr) readl(&adr) #define MVGBE_REG_BITS_RESET(adr, val) writel(readl(&adr) & ~(val), &adr) @@ -479,13 +481,27 @@ struct mvgbe_txdesc { /* port device data struct */ struct mvgbe_device { +#ifndef CONFIG_DM_ETH struct eth_device dev; +#endif struct mvgbe_registers *regs; struct mvgbe_txdesc *p_txdesc; struct mvgbe_rxdesc *p_rxdesc; struct mvgbe_rxdesc *p_rxdesc_curr; u8 *p_rxbuf; u8 *p_aligned_txbuf; + +#ifdef CONFIG_DM_ETH + phy_interface_t phy_interface; + unsigned int link; + unsigned int duplex; + unsigned int speed; + + int init; + int phyaddr; + struct phy_device *phydev; + struct mii_dev *bus; +#endif }; #endif /* __MVGBE_H__ */ diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 79f68af14c..3783d155e7 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -5,6 +5,7 @@ * Copyright 2011, 2013 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include <common.h> #include <phy.h> #define AR803x_PHY_DEBUG_ADDR_REG 0x1d diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 202e3dd487..3399fd2366 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include <config.h> #include <common.h> #include <phy.h> diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c index 27c7788493..4666497d44 100644 --- a/drivers/net/phy/davicom.c +++ b/drivers/net/phy/davicom.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include <common.h> #include <phy.h> #define MIIM_DM9161_SCR 0x10 diff --git a/drivers/net/phy/generic_10g.c b/drivers/net/phy/generic_10g.c index 1024d7db7b..b4384e1f78 100644 --- a/drivers/net/phy/generic_10g.c +++ b/drivers/net/phy/generic_10g.c @@ -7,8 +7,6 @@ * * Based loosely off of Linux's PHY Lib */ - -#include <config.h> #include <common.h> #include <miiphy.h> #include <phy.h> diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c index 5942664f1c..2618deb009 100644 --- a/drivers/net/phy/lxt.c +++ b/drivers/net/phy/lxt.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include <common.h> #include <phy.h> /* LXT971 Status 2 registers */ diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 436ff572fe..efbbd31ff7 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include <config.h> #include <common.h> #include <errno.h> #include <phy.h> diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c index c70c0364b8..3411150ab9 100644 --- a/drivers/net/phy/micrel_ksz8xxx.c +++ b/drivers/net/phy/micrel_ksz8xxx.c @@ -6,7 +6,6 @@ * author Andy Fleming * (C) 2012 NetModule AG, David Andrey, added KSZ9031 */ -#include <config.h> #include <common.h> #include <dm.h> #include <errno.h> diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index 5462532be6..3951535bf1 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -8,8 +8,6 @@ * (C) Copyright 2017 Adaptrum, Inc. * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc. */ - -#include <config.h> #include <common.h> #include <dm.h> #include <errno.h> diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c index 05c7e7c089..efde4574de 100644 --- a/drivers/net/phy/natsemi.c +++ b/drivers/net/phy/natsemi.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include <common.h> #include <phy.h> /* NatSemi DP83630 */ diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 4e610bf054..e837eb7688 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -7,8 +7,6 @@ * * Based loosely off of Linux's PHY Lib */ - -#include <config.h> #include <common.h> #include <console.h> #include <dm.h> @@ -644,6 +642,10 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, dev->link = 0; dev->interface = interface; +#ifdef CONFIG_DM_ETH + dev->node = ofnode_null(); +#endif + dev->autoneg = AUTONEG_ENABLE; dev->addr = addr; diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b0867af220..b3e6578df9 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -6,7 +6,6 @@ * author Andy Fleming * Copyright 2016 Karsten Merker <merker@debian.org> */ -#include <config.h> #include <common.h> #include <linux/bitops.h> #include <phy.h> diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index 2f92957a5a..7740a2510d 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -9,6 +9,7 @@ * Some code copied from linux kernel * Copyright (c) 2006 Herbert Valerio Riedel <hvr@gnu.org> */ +#include <common.h> #include <miiphy.h> /* This code does not check the partner abilities. */ diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c index d674e8f857..49d6a1ad90 100644 --- a/drivers/net/phy/teranetics.c +++ b/drivers/net/phy/teranetics.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include <config.h> #include <common.h> #include <phy.h> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c index 8f3ed8a983..f870e6d662 100644 --- a/drivers/net/phy/ti.c +++ b/drivers/net/phy/ti.c @@ -8,11 +8,9 @@ #include <linux/compat.h> #include <malloc.h> -#include <fdtdec.h> #include <dm.h> #include <dt-bindings/net/ti-dp83867.h> -DECLARE_GLOBAL_DATA_PTR; /* TI DP83867 */ #define DP83867_DEVADDR 0x1f @@ -24,6 +22,7 @@ DECLARE_GLOBAL_DATA_PTR; #define DP83867_CTRL 0x1f /* Extended Registers */ +#define DP83867_CFG4 0x0031 #define DP83867_RGMIICTL 0x0032 #define DP83867_RGMIIDCTL 0x0086 #define DP83867_IO_MUX_CFG 0x0170 @@ -95,6 +94,7 @@ struct dp83867_private { int tx_id_delay; int fifo_depth; int io_impedance; + bool rxctrl_strap_quirk; }; /** @@ -172,25 +172,31 @@ void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, static int dp83867_of_init(struct phy_device *phydev) { struct dp83867_private *dp83867 = phydev->priv; - struct udevice *dev = phydev->dev; - int node = dev_of_offset(dev); - const void *fdt = gd->fdt_blob; + ofnode node; - if (fdtdec_get_bool(fdt, node, "ti,max-output-impedance")) + node = phy_get_ofnode(phydev); + if (!ofnode_valid(node)) + return -EINVAL; + + if (ofnode_read_bool(node, "ti,max-output-impedance")) dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; - else if (fdtdec_get_bool(fdt, node, "ti,min-output-impedance")) + else if (ofnode_read_bool(node, "ti,min-output-impedance")) dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN; else dp83867->io_impedance = -EINVAL; - dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "ti,rx-internal-delay", -1); + if (ofnode_read_bool(node, "ti,dp83867-rxctrl-strap-quirk")) + dp83867->rxctrl_strap_quirk = true; + dp83867->rx_id_delay = ofnode_read_u32_default(node, + "ti,rx-internal-delay", + -1); - dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "ti,tx-internal-delay", -1); + dp83867->tx_id_delay = ofnode_read_u32_default(node, + "ti,tx-internal-delay", + -1); - dp83867->fifo_depth = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "ti,fifo-depth", -1); + dp83867->fifo_depth = ofnode_read_u32_default(node, "ti,fifo-depth", + -1); return 0; } @@ -232,6 +238,15 @@ static int dp83867_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL, val | DP83867_SW_RESTART); + /* Mode 1 or 2 workaround */ + if (dp83867->rxctrl_strap_quirk) { + val = phy_read_mmd_indirect(phydev, DP83867_CFG4, + DP83867_DEVADDR, phydev->addr); + val &= ~BIT(7); + phy_write_mmd_indirect(phydev, DP83867_CFG4, + DP83867_DEVADDR, phydev->addr, val); + } + if (phy_interface_is_rgmii(phydev)) { ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) | diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 9df4a3fae5..eca26c9893 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -6,6 +6,7 @@ * Original Author: Andy Fleming * Add vsc8662 phy support - Priyanka Jain */ +#include <common.h> #include <miiphy.h> /* Cicada Auxiliary Control/Status Register */ diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c index 004cfcf647..3aa8891efe 100644 --- a/drivers/net/phy/xilinx_phy.c +++ b/drivers/net/phy/xilinx_phy.c @@ -10,8 +10,6 @@ #include <phy.h> #include <dm.h> -DECLARE_GLOBAL_DATA_PTR; - #define MII_PHY_STATUS_SPD_MASK 0x0C00 #define MII_PHY_STATUS_FULLDUPLEX 0x1000 #define MII_PHY_STATUS_1000 0x0800 @@ -101,10 +99,14 @@ static int xilinxphy_startup(struct phy_device *phydev) static int xilinxphy_of_init(struct phy_device *phydev) { u32 phytype; + ofnode node; debug("%s\n", __func__); - phytype = fdtdec_get_int(gd->fdt_blob, dev_of_offset(phydev->dev), - "xlnx,phy-type", -1); + node = phy_get_ofnode(phydev); + if (!ofnode_valid(node)) + return -EINVAL; + + phytype = ofnode_read_u32_default(node, "xlnx,phy-type", -1); if (phytype == XAE_PHY_TYPE_1000BASE_X) phydev->flags |= XAE_PHY_TYPE_1000BASE_X; diff --git a/drivers/net/sandbox-raw-bus.c b/drivers/net/sandbox-raw-bus.c new file mode 100644 index 0000000000..76d65afe6c --- /dev/null +++ b/drivers/net/sandbox-raw-bus.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018 National Instruments + * Copyright (c) 2018 Joe Hershberger <joe.hershberger@ni.com> + */ + +#include <common.h> +#include <asm/eth-raw-os.h> +#include <dm.h> +#include <errno.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +static int eth_raw_bus_post_bind(struct udevice *dev) +{ + struct sandbox_eth_raw_if_nameindex *ni, *i; + struct udevice *child; + struct eth_sandbox_raw_priv *priv; + char *ub_ifname; + static const char ub_ifname_pfx[] = "host_"; + u32 skip_localhost = 0; + + ni = sandbox_eth_raw_if_nameindex(); + if (!ni) + return -EINVAL; + + dev_read_u32(dev, "skip-localhost", &skip_localhost); + for (i = ni; !(i->if_index == 0 && !i->if_name); i++) { + int local = sandbox_eth_raw_os_is_local(i->if_name); + + if (local < 0) + continue; + if (skip_localhost && local) + continue; + + ub_ifname = calloc(IFNAMSIZ + sizeof(ub_ifname_pfx), 1); + strcpy(ub_ifname, ub_ifname_pfx); + strncat(ub_ifname, i->if_name, IFNAMSIZ); + device_bind_driver(dev, "eth_sandbox_raw", ub_ifname, &child); + + device_set_name_alloced(child); + device_probe(child); + priv = dev_get_priv(child); + if (priv) { + memcpy(priv->host_ifname, i->if_name, IFNAMSIZ); + priv->host_ifindex = i->if_index; + priv->local = local; + } + } + + sandbox_eth_raw_if_freenameindex(ni); + + return 0; +} + +static const struct udevice_id sandbox_eth_raw_bus_ids[] = { + { .compatible = "sandbox,eth-raw-bus" }, + { } +}; + +U_BOOT_DRIVER(sandbox_eth_raw_bus) = { + .name = "sb_eth_raw_bus", + .id = UCLASS_SIMPLE_BUS, + .of_match = sandbox_eth_raw_bus_ids, + .bind = eth_raw_bus_post_bind, +}; diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c index 3f8020f629..09cc678ebd 100644 --- a/drivers/net/sandbox-raw.c +++ b/drivers/net/sandbox-raw.c @@ -21,21 +21,18 @@ static int sb_eth_raw_start(struct udevice *dev) { struct eth_sandbox_raw_priv *priv = dev_get_priv(dev); struct eth_pdata *pdata = dev_get_platdata(dev); - const char *interface; + int ret; debug("eth_sandbox_raw: Start\n"); - interface = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), - "host-raw-interface", NULL); - if (interface == NULL) - return -EINVAL; - - if (strcmp(interface, "lo") == 0) { - priv->local = 1; + ret = sandbox_eth_raw_os_start(priv, pdata->enetaddr); + if (priv->local) { env_set("ipaddr", "127.0.0.1"); env_set("serverip", "127.0.0.1"); + net_ip = string_to_ip("127.0.0.1"); + net_server_ip = net_ip; } - return sandbox_eth_raw_os_start(interface, pdata->enetaddr, priv); + return ret; } static int sb_eth_raw_send(struct udevice *dev, void *packet, int length) @@ -133,18 +130,54 @@ static void sb_eth_raw_stop(struct udevice *dev) sandbox_eth_raw_os_stop(priv); } +static int sb_eth_raw_read_rom_hwaddr(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + + net_random_ethaddr(pdata->enetaddr); + + return 0; +} + static const struct eth_ops sb_eth_raw_ops = { .start = sb_eth_raw_start, .send = sb_eth_raw_send, .recv = sb_eth_raw_recv, .stop = sb_eth_raw_stop, + .read_rom_hwaddr = sb_eth_raw_read_rom_hwaddr, }; static int sb_eth_raw_ofdata_to_platdata(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); + struct eth_sandbox_raw_priv *priv = dev_get_priv(dev); + const char *ifname; + u32 local; + int ret; + + pdata->iobase = dev_read_addr(dev); + + ifname = dev_read_string(dev, "host-raw-interface"); + if (ifname) { + strncpy(priv->host_ifname, ifname, IFNAMSIZ); + printf(": Using %s from DT\n", priv->host_ifname); + } + if (dev_read_u32(dev, "host-raw-interface-idx", + &priv->host_ifindex) < 0) { + priv->host_ifindex = 0; + } else { + ret = sandbox_eth_raw_os_idx_to_name(priv); + if (ret < 0) + return ret; + printf(": Using interface index %d from DT (%s)\n", + priv->host_ifindex, priv->host_ifname); + } + + local = sandbox_eth_raw_os_is_local(priv->host_ifname); + if (local < 0) + return local; + priv->local = local; - pdata->iobase = devfdt_get_addr(dev); return 0; } diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index b34712bd06..b71c8f88d9 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -59,10 +59,8 @@ static int sb_eth_start(struct udevice *dev) debug("eth_sandbox: Start\n"); - fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(dev), - "fake-host-hwaddr", priv->fake_host_hwaddr, - ARP_HLEN); priv->recv_packet_buffer = net_rx_packets[0]; + return 0; } @@ -203,8 +201,18 @@ static int sb_eth_remove(struct udevice *dev) static int sb_eth_ofdata_to_platdata(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); + struct eth_sandbox_priv *priv = dev_get_priv(dev); + const u8 *mac; + + pdata->iobase = dev_read_addr(dev); + + mac = dev_read_u8_array_ptr(dev, "fake-host-hwaddr", ARP_HLEN); + if (!mac) { + printf("'fake-host-hwaddr' is missing from the DT\n"); + return -EINVAL; + } + memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN); - pdata->iobase = devfdt_get_addr(dev); return 0; } diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index d1138fe090..68d1c2fcea 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -178,7 +178,7 @@ struct zynq_gem_priv { struct zynq_gem_regs *iobase; phy_interface_t interface; struct phy_device *phydev; - int phy_of_handle; + ofnode phy_of_node; struct mii_dev *bus; struct clk clk; u32 max_speed; @@ -348,9 +348,7 @@ static int zynq_phy_init(struct udevice *dev) } priv->phydev->advertising = priv->phydev->supported; - - if (priv->phy_of_handle > 0) - dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle); + priv->phydev->node = priv->phy_of_node; return phy_config(priv->phydev); } @@ -693,21 +691,23 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct zynq_gem_priv *priv = dev_get_priv(dev); - int node = dev_of_offset(dev); + struct ofnode_phandle_args phandle_args; const char *phy_mode; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = (phys_addr_t)dev_read_addr(dev); priv->iobase = (struct zynq_gem_regs *)pdata->iobase; /* Hardcode for now */ priv->phyaddr = -1; - priv->phy_of_handle = fdtdec_lookup_phandle(gd->fdt_blob, node, - "phy-handle"); - if (priv->phy_of_handle > 0) - priv->phyaddr = fdtdec_get_int(gd->fdt_blob, - priv->phy_of_handle, "reg", -1); + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) { + debug("phy-handle does not exist %s\n", dev->name); + return -ENOENT; + } - phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL); + priv->phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1); + priv->phy_of_node = phandle_args.node; + phy_mode = dev_read_prop(dev, "phy-mode", NULL); if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); if (pdata->phy_interface == -1) { @@ -716,10 +716,8 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) } priv->interface = pdata->phy_interface; - priv->max_speed = fdtdec_get_uint(gd->fdt_blob, priv->phy_of_handle, - "max-speed", SPEED_1000); - priv->int_pcs = fdtdec_get_bool(gd->fdt_blob, node, - "is-internal-pcspma"); + priv->max_speed = dev_read_u32_default(dev, "max-speed", SPEED_1000); + priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma"); printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase, priv->phyaddr, phy_string_for_interface(priv->interface)); |