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-rw-r--r--drivers/pch/Makefile7
-rw-r--r--drivers/pch/pch-uclass.c62
-rw-r--r--drivers/pch/pch7.c61
-rw-r--r--drivers/pch/pch9.c43
4 files changed, 173 insertions, 0 deletions
diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile
new file mode 100644
index 0000000000..dde9e86d4e
--- /dev/null
+++ b/drivers/pch/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += pch-uclass.o
+obj-y += pch7.o
+obj-y += pch9.o
diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c
new file mode 100644
index 0000000000..4579ed12f6
--- /dev/null
+++ b/drivers/pch/pch-uclass.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+#include <dm/root.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int pch_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+ struct pch_ops *ops = pch_get_ops(dev);
+
+ *sbasep = 0;
+ if (!ops->get_sbase)
+ return -ENOSYS;
+
+ return ops->get_sbase(dev, sbasep);
+}
+
+enum pch_version pch_get_version(struct udevice *dev)
+{
+ struct pch_ops *ops = pch_get_ops(dev);
+
+ if (!ops->get_version)
+ return -ENOSYS;
+
+ return ops->get_version(dev);
+}
+
+int pch_set_spi_protect(struct udevice *dev, bool protect)
+{
+ struct pch_ops *ops = pch_get_ops(dev);
+
+ if (!ops->set_spi_protect)
+ return -ENOSYS;
+
+ return ops->set_spi_protect(dev, protect);
+}
+
+static int pch_uclass_post_bind(struct udevice *bus)
+{
+ /*
+ * Scan the device tree for devices
+ *
+ * Before relocation, only bind devices marked for pre-relocation
+ * use.
+ */
+ return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
+ gd->flags & GD_FLG_RELOC ? false : true);
+}
+
+UCLASS_DRIVER(pch) = {
+ .id = UCLASS_PCH,
+ .name = "pch",
+ .post_bind = pch_uclass_post_bind,
+};
diff --git a/drivers/pch/pch7.c b/drivers/pch/pch7.c
new file mode 100644
index 0000000000..ef724221c2
--- /dev/null
+++ b/drivers/pch/pch7.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+
+#define BIOS_CTRL 0xd8
+
+static int pch7_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+ u32 rcba;
+
+ dm_pci_read_config32(dev, PCH_RCBA, &rcba);
+ /* Bits 31-14 are the base address, 13-1 are reserved, 0 is enable */
+ rcba = rcba & 0xffffc000;
+ *sbasep = rcba + 0x3020;
+
+ return 0;
+}
+
+static enum pch_version pch7_get_version(struct udevice *dev)
+{
+ return PCHV_7;
+}
+
+static int pch7_set_spi_protect(struct udevice *dev, bool protect)
+{
+ uint8_t bios_cntl;
+
+ /* Adjust the BIOS write protect to dis/allow write commands */
+ dm_pci_read_config8(dev, BIOS_CTRL, &bios_cntl);
+ if (protect)
+ bios_cntl &= ~BIOS_CTRL_BIOSWE;
+ else
+ bios_cntl |= BIOS_CTRL_BIOSWE;
+ dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl);
+
+ return 0;
+}
+
+static const struct pch_ops pch7_ops = {
+ .get_sbase = pch7_get_sbase,
+ .get_version = pch7_get_version,
+ .set_spi_protect = pch7_set_spi_protect,
+};
+
+static const struct udevice_id pch7_ids[] = {
+ { .compatible = "intel,pch7" },
+ { }
+};
+
+U_BOOT_DRIVER(pch7_drv) = {
+ .name = "intel-pch7",
+ .id = UCLASS_PCH,
+ .of_match = pch7_ids,
+ .ops = &pch7_ops,
+};
diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c
new file mode 100644
index 0000000000..529cb023e2
--- /dev/null
+++ b/drivers/pch/pch9.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+
+#define SBASE_ADDR 0x54
+
+static int pch9_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+ uint32_t sbase_addr;
+
+ dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr);
+ *sbasep = sbase_addr & 0xfffffe00;
+
+ return 0;
+}
+
+static enum pch_version pch9_get_version(struct udevice *dev)
+{
+ return PCHV_9;
+}
+
+static const struct pch_ops pch9_ops = {
+ .get_sbase = pch9_get_sbase,
+ .get_version = pch9_get_version,
+};
+
+static const struct udevice_id pch9_ids[] = {
+ { .compatible = "intel,pch9" },
+ { }
+};
+
+U_BOOT_DRIVER(pch9_drv) = {
+ .name = "intel-pch9",
+ .id = UCLASS_PCH,
+ .of_match = pch9_ids,
+ .ops = &pch9_ops,
+};