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path: root/drivers/pinctrl/rockchip/pinctrl-rk3399.c
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Diffstat (limited to 'drivers/pinctrl/rockchip/pinctrl-rk3399.c')
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3399.c40
1 files changed, 32 insertions, 8 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 82c8feeb7b..68bb492a6b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -98,10 +98,6 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
*reg = RK3399_PULL_PMU_OFFSET;
*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
-
- *reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
- *bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
- *bit *= ROCKCHIP_PULL_BITS_PER_PIN;
} else {
*regmap = priv->regmap_base;
*reg = RK3399_PULL_GRF_OFFSET;
@@ -109,11 +105,39 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
/* correct the offset, as we're starting with the 3rd bank */
*reg -= 0x20;
*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
- *reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+ }
+
+ *reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+ *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+ *bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+static int rk3399_set_pull(struct rockchip_pin_bank *bank,
+ int pin_num, int pull)
+{
+ struct regmap *regmap;
+ int reg, ret;
+ u8 bit, type;
+ u32 data;
- *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
- *bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+ if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+ return -ENOTSUPP;
+
+ rk3399_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+ type = bank->pull_type[pin_num / 8];
+ ret = rockchip_translate_pull_value(type, pull);
+ if (ret < 0) {
+ debug("unsupported pull setting %d\n", pull);
+ return ret;
}
+
+ /* enable the write to the equivalent lower bits */
+ data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+ data |= (ret << bit);
+ ret = regmap_write(regmap, reg, data);
+
+ return ret;
}
static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -275,7 +299,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
.iomux_routes = rk3399_mux_route_data,
.niomux_routes = ARRAY_SIZE(rk3399_mux_route_data),
.set_mux = rk3399_set_mux,
- .pull_calc_reg = rk3399_calc_pull_reg_and_bit,
+ .set_pull = rk3399_set_pull,
.set_drive = rk3399_set_drive,
};