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-rw-r--r--drivers/pinctrl/rockchip/pinctrl_rk3399.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index 6eb657fd5a..c09cd826f6 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -244,6 +244,24 @@ static void pinctrl_rk3399_gmac_config(struct rk3399_grf_regs *grf, int mmc_id)
rk_clrsetreg(&grf->gpio3c_iomux,
GRF_GPIO3C1_SEL_MASK,
GRF_MAC_TXCLK << GRF_GPIO3C1_SEL_SHIFT);
+
+ /* Set drive strength for GMAC tx io, value 3 means 13mA */
+ rk_clrsetreg(&grf->gpio3_e[0],
+ GRF_GPIO3A0_E_MASK | GRF_GPIO3A1_E_MASK |
+ GRF_GPIO3A4_E_MASK | GRF_GPIO3A5_E0_MASK,
+ 3 << GRF_GPIO3A0_E_SHIFT |
+ 3 << GRF_GPIO3A1_E_SHIFT |
+ 3 << GRF_GPIO3A4_E_SHIFT |
+ 1 << GRF_GPIO3A5_E0_SHIFT);
+ rk_clrsetreg(&grf->gpio3_e[1],
+ GRF_GPIO3A5_E12_MASK,
+ 1 << GRF_GPIO3A5_E12_SHIFT);
+ rk_clrsetreg(&grf->gpio3_e[2],
+ GRF_GPIO3B4_E_MASK,
+ 3 << GRF_GPIO3B4_E_SHIFT);
+ rk_clrsetreg(&grf->gpio3_e[4],
+ GRF_GPIO3C1_E_MASK,
+ 3 << GRF_GPIO3C1_E_SHIFT);
}
#endif