diff options
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/Kconfig | 21 | ||||
| -rw-r--r-- | drivers/pinctrl/Makefile | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-at91-pio4.c | 182 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-uclass.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl_pic32.c | 9 | ||||
| -rw-r--r-- | drivers/pinctrl/rockchip/Makefile | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/rockchip/pinctrl_rk3036.c | 9 | ||||
| -rw-r--r-- | drivers/pinctrl/rockchip/pinctrl_rk3288.c | 36 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 16 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier.h | 5 |
18 files changed, 245 insertions, 68 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 1785e3b28c..44b53b9abd 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -123,24 +123,31 @@ config QCA953X_PINCTRL both the GPIO definitions and pin control functions for each available multiplex function. -config ROCKCHIP_PINCTRL - bool "Rockchip pin control driver" +config ROCKCHIP_RK3036_PINCTRL + bool "Rockchip rk3036 pin control driver" depends on DM help - Support pin multiplexing control on Rockchip SoCs. The driver is + Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is controlled by a device tree node which contains both the GPIO definitions and pin control functions for each available multiplex function. -config ROCKCHIP_3036_PINCTRL - bool "Rockchip rk3036 pin control driver" +config ROCKCHIP_RK3288_PINCTRL + bool "Rockchip pin control driver" depends on DM help - Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is - controlled by a device tree node which contains both the GPIO + Support pin multiplexing control on Rockchip rk3288 SoCs. The driver + is controlled by a device tree node which contains both the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_AT91PIO4 + bool "AT91 PIO4 pinctrl driver" + depends on DM + help + This option is to enable the AT91 pinctrl driver for AT91 PIO4 + controller which is available on SAMA5D2 SoC. + config PINCTRL_SANDBOX bool "Sandbox pinctrl driver" depends on SANDBOX diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 7f946814d3..c92ab8c341 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -5,6 +5,7 @@ obj-y += pinctrl-uclass.o obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o +obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o obj-y += nxp/ obj-$(CONFIG_ARCH_ATH79) += ath79/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c new file mode 100644 index 0000000000..6d4aadc32c --- /dev/null +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -0,0 +1,182 @@ +/* + * Atmel PIO4 pinctrl driver + * + * Copyright (C) 2016 Atmel Corporation + * Wenyou.Yang <wenyou.yang@atmel.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm/device.h> +#include <dm/pinctrl.h> +#include <linux/io.h> +#include <linux/err.h> +#include <mach/atmel_pio4.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Warning: + * In order to not introduce confusion between Atmel PIO groups and pinctrl + * framework groups, Atmel PIO groups will be called banks. + */ + +struct atmel_pio4_platdata { + struct atmel_pio4_port *reg_base; +}; + +static const struct pinconf_param conf_params[] = { + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, + { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 }, + { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 }, + { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 }, + { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 }, +}; + +static u32 atmel_pinctrl_get_pinconf(const void *blob, int node) +{ + const struct pinconf_param *params; + u32 param, arg, conf = 0; + u32 i; + + for (i = 0; i < ARRAY_SIZE(conf_params); i++) { + params = &conf_params[i]; + if (!fdt_get_property(blob, node, params->property, NULL)) + continue; + + param = params->param; + arg = params->default_value; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + conf &= (~ATMEL_PIO_PUEN_MASK); + conf &= (~ATMEL_PIO_PDEN_MASK); + break; + case PIN_CONFIG_BIAS_PULL_UP: + conf |= ATMEL_PIO_PUEN_MASK; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + conf |= ATMEL_PIO_PDEN_MASK; + break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + if (arg == 0) + conf &= (~ATMEL_PIO_OPD_MASK); + else + conf |= ATMEL_PIO_OPD_MASK; + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (arg == 0) + conf |= ATMEL_PIO_SCHMITT_MASK; + else + conf &= (~ATMEL_PIO_SCHMITT_MASK); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + if (arg == 0) { + conf &= (~ATMEL_PIO_IFEN_MASK); + conf &= (~ATMEL_PIO_IFSCEN_MASK); + } else { + conf |= ATMEL_PIO_IFEN_MASK; + conf |= ATMEL_PIO_IFSCEN_MASK; + } + break; + default: + printf("%s: Unsupported configuration parameter: %u\n", + __func__, param); + break; + } + } + + return conf; +} + +static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev, + u32 bank) +{ + struct atmel_pio4_platdata *plat = dev_get_platdata(dev); + struct atmel_pio4_port *bank_base = + (struct atmel_pio4_port *)((u32)plat->reg_base + + ATMEL_PIO_BANK_OFFSET * bank); + + return bank_base; +} + +#define MAX_PINMUX_ENTRIES 40 + +static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config) +{ + struct atmel_pio4_port *bank_base; + const void *blob = gd->fdt_blob; + int node = config->of_offset; + u32 offset, func, bank, line; + u32 cells[MAX_PINMUX_ENTRIES]; + u32 i, conf; + int count; + + conf = atmel_pinctrl_get_pinconf(blob, node); + + count = fdtdec_get_int_array_count(blob, node, "pinmux", + cells, ARRAY_SIZE(cells)); + if (count < 0) { + printf("%s: bad pinmux array %d\n", __func__, count); + return -EINVAL; + } + + if (count > MAX_PINMUX_ENTRIES) { + printf("%s: unsupported pinmux array count %d\n", + __func__, count); + return -EINVAL; + } + + for (i = 0 ; i < count; i++) { + offset = ATMEL_GET_PIN_NO(cells[i]); + func = ATMEL_GET_PIN_FUNC(cells[i]); + + bank = ATMEL_PIO_BANK(offset); + line = ATMEL_PIO_LINE(offset); + + bank_base = atmel_pio4_bank_base(dev, bank); + + writel(BIT(line), &bank_base->mskr); + conf &= (~ATMEL_PIO_CFGR_FUNC_MASK); + conf |= (func & ATMEL_PIO_CFGR_FUNC_MASK); + writel(conf, &bank_base->cfgr); + } + + return 0; +} + +const struct pinctrl_ops atmel_pinctrl_ops = { + .set_state = atmel_pinctrl_set_state, +}; + +static int atmel_pinctrl_probe(struct udevice *dev) +{ + struct atmel_pio4_platdata *plat = dev_get_platdata(dev); + fdt_addr_t addr_base; + + dev = dev_get_parent(dev); + addr_base = dev_get_addr(dev); + if (addr_base == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->reg_base = (struct atmel_pio4_port *)addr_base; + + return 0; +} + +static const struct udevice_id atmel_pinctrl_match[] = { + { .compatible = "atmel,sama5d2-pinctrl" }, + {} +}; + +U_BOOT_DRIVER(atmel_pinctrl) = { + .name = "pinctrl_atmel_pio4", + .id = UCLASS_PINCTRL, + .of_match = atmel_pinctrl_match, + .probe = atmel_pinctrl_probe, + .platdata_auto_alloc_size = sizeof(struct atmel_pio4_platdata), + .ops = &atmel_pinctrl_ops, +}; diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index fd04b26454..7397de28c0 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -113,7 +113,7 @@ static int pinctrl_select_state_full(struct udevice *dev, const char *statename) } /** - * pinconfig_post-bind() - post binding for PINCONFIG uclass + * pinconfig_post_bind() - post binding for PINCONFIG uclass * Recursively bind its children as pinconfig devices. * * @dev: pinconfig device @@ -257,7 +257,7 @@ int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index) } /** - * pinconfig_post-bind() - post binding for PINCTRL uclass + * pinconfig_post_bind() - post binding for PINCTRL uclass * Recursively bind child nodes as pinconfig devices in case of full pinctrl. * * @dev: pinctrl device diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c index 5cf97ecec8..9acac29133 100644 --- a/drivers/pinctrl/pinctrl_pic32.c +++ b/drivers/pinctrl/pinctrl_pic32.c @@ -10,7 +10,6 @@ #include <errno.h> #include <asm/io.h> #include <dm/pinctrl.h> -#include <dm/root.h> #include <mach/pic32.h> DECLARE_GLOBAL_DATA_PTR; @@ -341,12 +340,6 @@ static int pic32_pinctrl_probe(struct udevice *dev) return 0; } -static int pic32_pinctrl_bind(struct udevice *dev) -{ - /* scan child GPIO banks */ - return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); -} - static const struct udevice_id pic32_pinctrl_ids[] = { { .compatible = "microchip,pic32mzda-pinctrl" }, { } @@ -358,6 +351,6 @@ U_BOOT_DRIVER(pinctrl_pic32) = { .of_match = pic32_pinctrl_ids, .ops = &pic32_pinctrl_ops, .probe = pic32_pinctrl_probe, - .bind = pic32_pinctrl_bind, + .bind = dm_scan_fdt_dev, .priv_auto_alloc_size = sizeof(struct pic32_pinctrl_priv), }; diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile index 6fa7d00d0d..64e9587cce 100644 --- a/drivers/pinctrl/rockchip/Makefile +++ b/drivers/pinctrl/rockchip/Makefile @@ -5,5 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ROCKCHIP_PINCTRL) += pinctrl_rk3288.o -obj-$(CONFIG_ROCKCHIP_3036_PINCTRL) += pinctrl_rk3036.o +obj-$(CONFIG_ROCKCHIP_RK3036_PINCTRL) += pinctrl_rk3036.o +obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c b/drivers/pinctrl/rockchip/pinctrl_rk3036.c index 1f78bf862d..6aea856aa6 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3036.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3036.c @@ -15,7 +15,6 @@ #include <asm/arch/hardware.h> #include <asm/arch/periph.h> #include <dm/pinctrl.h> -#include <dm/root.h> DECLARE_GLOBAL_DATA_PTR; @@ -253,12 +252,6 @@ static struct pinctrl_ops rk3036_pinctrl_ops = { .get_periph_id = rk3036_pinctrl_get_periph_id, }; -static int rk3036_pinctrl_bind(struct udevice *dev) -{ - /* scan child GPIO banks */ - return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); -} - static int rk3036_pinctrl_probe(struct udevice *dev) { struct rk3036_pinctrl_priv *priv = dev_get_priv(dev); @@ -279,6 +272,6 @@ U_BOOT_DRIVER(pinctrl_rk3036) = { .of_match = rk3036_pinctrl_ids, .priv_auto_alloc_size = sizeof(struct rk3036_pinctrl_priv), .ops = &rk3036_pinctrl_ops, - .bind = rk3036_pinctrl_bind, + .bind = dm_scan_fdt_dev, .probe = rk3036_pinctrl_probe, }; diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c index 1fa1daa939..03222647ca 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c @@ -17,7 +17,6 @@ #include <asm/arch/periph.h> #include <asm/arch/pmu_rk3288.h> #include <dm/pinctrl.h> -#include <dm/root.h> DECLARE_GLOBAL_DATA_PTR; @@ -476,6 +475,7 @@ static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags) static int rk3288_pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph) { +#if !CONFIG_IS_ENABLED(OF_PLATDATA) u32 cell[3]; int ret; @@ -506,6 +506,7 @@ static int rk3288_pinctrl_get_periph_id(struct udevice *dev, case 103: return PERIPH_ID_HDMI; } +#endif return -ENOENT; } @@ -587,6 +588,7 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index, struct rk3288_pinctrl_priv *priv = dev_get_priv(dev); uint shift, ind = index; uint mask; + uint value; u32 *addr; int ret; @@ -595,7 +597,18 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index, &mask); if (ret) return ret; - rk_clrsetreg(addr, mask << shift, muxval << shift); + + /* + * PMU_GPIO0 registers cannot be selectively written so we cannot use + * rk_clrsetreg() here. However, the upper 16 bits are reserved and + * are ignored when written, so we can use the same code as for the + * other GPIO banks providing that we preserve the value of the other + * bits. + */ + value = readl(addr); + value &= ~(mask << shift); + value |= (mask << (shift + 16)) | (muxval << shift); + writel(value, addr); /* Handle pullup/pulldown */ if (flags) { @@ -613,7 +626,12 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index, addr = &priv->grf->gpio1_p[banknum - 1][ind]; debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val, shift); - rk_clrsetreg(addr, 3 << shift, val << shift); + + /* As above, rk_clrsetreg() cannot be used here. */ + value = readl(addr); + value &= ~(mask << shift); + value |= (3 << (shift + 16)) | (val << shift); + writel(value, addr); } return 0; @@ -662,12 +680,6 @@ static struct pinctrl_ops rk3288_pinctrl_ops = { .get_periph_id = rk3288_pinctrl_get_periph_id, }; -static int rk3288_pinctrl_bind(struct udevice *dev) -{ - /* scan child GPIO banks */ - return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); -} - #ifndef CONFIG_SPL_BUILD static int rk3288_pinctrl_parse_tables(struct rk3288_pinctrl_priv *priv, struct rockchip_pin_bank *banks, @@ -719,11 +731,13 @@ static const struct udevice_id rk3288_pinctrl_ids[] = { }; U_BOOT_DRIVER(pinctrl_rk3288) = { - .name = "pinctrl_rk3288", + .name = "rockchip_rk3288_pinctrl", .id = UCLASS_PINCTRL, .of_match = rk3288_pinctrl_ids, .priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv), .ops = &rk3288_pinctrl_ops, - .bind = rk3288_pinctrl_bind, +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + .bind = dm_scan_fdt_dev, +#endif .probe = rk3288_pinctrl_probe, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 225a05c56d..3f891f1581 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> -#include <mapmem.h> #include <linux/io.h> #include <linux/err.h> #include <linux/sizes.h> @@ -188,7 +187,7 @@ int uniphier_pinctrl_probe(struct udevice *dev, if (addr == FDT_ADDR_T_NONE) return -EINVAL; - priv->base = map_sysmem(addr, SZ_4K); + priv->base = devm_ioremap(dev, addr, SZ_4K); if (!priv->base) return -ENOMEM; @@ -196,12 +195,3 @@ int uniphier_pinctrl_probe(struct udevice *dev, return 0; } - -int uniphier_pinctrl_remove(struct udevice *dev) -{ - struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); - - unmap_sysmem(priv->base); - - return 0; -} diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c index e95870f2c1..e42602bc82 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c @@ -101,7 +101,6 @@ U_BOOT_DRIVER(uniphier_ld11_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_ld11_pinctrl_match), .probe = uniphier_ld11_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index e9031966d0..d6ae51248a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -115,7 +115,6 @@ U_BOOT_DRIVER(uniphier_ld20_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_ld20_pinctrl_match), .probe = uniphier_ld20_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index dbb9499313..955858a6aa 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -135,7 +136,6 @@ U_BOOT_DRIVER(uniphier_ld4_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_ld4_pinctrl_match), .probe = uniphier_ld4_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 8b40801175..5f9407ed21 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -135,7 +136,6 @@ U_BOOT_DRIVER(uniphier_ld6b_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_ld6b_pinctrl_match), .probe = uniphier_ld6b_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index dace726b08..6f349dcd2e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -143,7 +144,6 @@ U_BOOT_DRIVER(uniphier_pro4_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_pro4_pinctrl_match), .probe = uniphier_pro4_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, .flags = DM_FLAG_PRE_RELOC, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 50b41cc37c..268cdea42a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -134,7 +135,6 @@ U_BOOT_DRIVER(uniphier_pro5_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_pro5_pinctrl_match), .probe = uniphier_pro5_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, .flags = DM_FLAG_PRE_RELOC, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index 9223eebc89..b534274317 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -147,7 +148,6 @@ U_BOOT_DRIVER(uniphier_pxs2_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_pxs2_pinctrl_match), .probe = uniphier_pxs2_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index cee0eb1abd..a85e055dae 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -143,7 +144,6 @@ U_BOOT_DRIVER(uniphier_sld8_pinctrl) = { .id = UCLASS_PINCTRL, .of_match = of_match_ptr(uniphier_sld8_pinctrl_match), .probe = uniphier_sld8_pinctrl_probe, - .remove = uniphier_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), .ops = &uniphier_pinctrl_ops, }; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 4bb893218a..4de5b03c8d 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -119,6 +120,4 @@ extern const struct pinctrl_ops uniphier_pinctrl_ops; int uniphier_pinctrl_probe(struct udevice *dev, struct uniphier_pinctrl_socdata *socdata); -int uniphier_pinctrl_remove(struct udevice *dev); - #endif /* __PINCTRL_UNIPHIER_H__ */ |