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-rw-r--r--drivers/usb/host/dwc2.c2
-rw-r--r--drivers/usb/host/dwc2.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 540c016412..0efe645044 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -375,7 +375,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
usbcfg &= ~DWC2_GUSBCFG_DDRSEL;
#endif
} else { /* UTMI+ interface */
-#if (CONFIG_DWC2_UTMI_PHY_WIDTH == 16)
+#if (CONFIG_DWC2_UTMI_WIDTH == 16)
usbcfg |= DWC2_GUSBCFG_PHYIF;
#endif
}
diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
index 4482dc621d..574607a2ac 100644
--- a/drivers/usb/host/dwc2.h
+++ b/drivers/usb/host/dwc2.h
@@ -775,7 +775,9 @@ struct dwc2_core_regs {
#define DWC2_PHY_TYPE_UTMI 1
#define DWC2_PHY_TYPE_ULPI 2
#define CONFIG_DWC2_PHY_TYPE DWC2_PHY_TYPE_UTMI /* PHY type */
+#ifndef CONFIG_DWC2_UTMI_WIDTH
#define CONFIG_DWC2_UTMI_WIDTH 8 /* UTMI bus width (8/16) */
+#endif
#undef CONFIG_DWC2_PHY_ULPI_DDR /* ULPI PHY uses DDR mode */
#define CONFIG_DWC2_PHY_ULPI_EXT_VBUS /* ULPI PHY controls VBUS */