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-rw-r--r--drivers/usb/host/ehci-sunxi.c10
-rw-r--r--drivers/usb/host/ohci-sunxi.c10
2 files changed, 14 insertions, 6 deletions
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index d5eb492169..f2d83e34bc 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -38,6 +38,7 @@ static int ehci_usb_probe(struct udevice *dev)
struct ehci_sunxi_priv *priv = dev_get_priv(dev);
struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
struct ehci_hcor *hcor;
+ int extra_ahb_gate_mask = 0;
/*
* This should go away once we've moved to the driver model for
@@ -45,15 +46,18 @@ static int ehci_usb_probe(struct udevice *dev)
*/
priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#ifdef CONFIG_MACH_SUN8I_H3
- priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
+ extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
#endif
priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+ extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
priv->phy_index++; /* Non otg phys start at 1 */
- setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+ setbits_le32(&ccm->ahb_gate0,
+ priv->ahb_gate_mask | extra_ahb_gate_mask);
#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+ setbits_le32(&ccm->ahb_reset0_cfg,
+ priv->ahb_gate_mask | extra_ahb_gate_mask);
#endif
sunxi_usb_phy_init(priv->phy_index);
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 6f3f4cec16..2a1e8bf1e8 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -38,6 +38,7 @@ static int ohci_usb_probe(struct udevice *dev)
struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
struct ohci_sunxi_priv *priv = dev_get_priv(dev);
struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev);
+ int extra_ahb_gate_mask = 0;
bus_priv->companion = true;
@@ -47,18 +48,21 @@ static int ohci_usb_probe(struct udevice *dev)
*/
priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
#ifdef CONFIG_MACH_SUN8I_H3
- priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
+ extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#endif
priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+ extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
priv->usb_gate_mask <<= priv->phy_index;
priv->phy_index++; /* Non otg phys start at 1 */
- setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+ setbits_le32(&ccm->ahb_gate0,
+ priv->ahb_gate_mask | extra_ahb_gate_mask);
setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+ setbits_le32(&ccm->ahb_reset0_cfg,
+ priv->ahb_gate_mask | extra_ahb_gate_mask);
#endif
sunxi_usb_phy_init(priv->phy_index);