diff options
Diffstat (limited to 'drivers')
41 files changed, 1121 insertions, 525 deletions
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 990f768adb..f35c4d4db7 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -1,3 +1,14 @@ +config BLK + bool "Support block devices" + depends on DM + help + Enable support for block devices, such as SCSI, MMC and USB + flash sticks. These provide a block-level interface which permits + reading, writing and (in some cases) erasing blocks. Block + devices often have a partition table which allows the device to + be partitioned into several areas, called 'partitions' in U-Boot. + A filesystem can be placed in each partition. + config DISK bool "Support disk controllers with driver model" depends on DM diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 5eb87e0b89..b5c7ae1124 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -5,6 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_BLK) += blk-uclass.o + obj-$(CONFIG_DISK) += disk-uclass.o obj-$(CONFIG_SCSI_AHCI) += ahci.o obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c new file mode 100644 index 0000000000..49df2a6f89 --- /dev/null +++ b/drivers/block/blk-uclass.c @@ -0,0 +1,175 @@ +/* + * Copyright (C) 2016 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <blk.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +int blk_first_device(int if_type, struct udevice **devp) +{ + struct blk_desc *desc; + int ret; + + ret = uclass_first_device(UCLASS_BLK, devp); + if (ret) + return ret; + if (!*devp) + return -ENODEV; + do { + desc = dev_get_uclass_platdata(*devp); + if (desc->if_type == if_type) + return 0; + ret = uclass_next_device(devp); + if (ret) + return ret; + } while (*devp); + + return -ENODEV; +} + +int blk_next_device(struct udevice **devp) +{ + struct blk_desc *desc; + int ret, if_type; + + desc = dev_get_uclass_platdata(*devp); + if_type = desc->if_type; + do { + ret = uclass_next_device(devp); + if (ret) + return ret; + if (!*devp) + return -ENODEV; + desc = dev_get_uclass_platdata(*devp); + if (desc->if_type == if_type) + return 0; + } while (1); +} + +int blk_get_device(int if_type, int devnum, struct udevice **devp) +{ + struct uclass *uc; + struct udevice *dev; + int ret; + + ret = uclass_get(UCLASS_BLK, &uc); + if (ret) + return ret; + uclass_foreach_dev(dev, uc) { + struct blk_desc *desc = dev_get_uclass_platdata(dev); + + debug("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, + if_type, devnum, dev->name, desc->if_type, desc->devnum); + if (desc->if_type == if_type && desc->devnum == devnum) { + *devp = dev; + return device_probe(dev); + } + } + + return -ENODEV; +} + +unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start, + lbaint_t blkcnt, void *buffer) +{ + struct udevice *dev = block_dev->bdev; + const struct blk_ops *ops = blk_get_ops(dev); + + if (!ops->read) + return -ENOSYS; + + return ops->read(dev, start, blkcnt, buffer); +} + +unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start, + lbaint_t blkcnt, const void *buffer) +{ + struct udevice *dev = block_dev->bdev; + const struct blk_ops *ops = blk_get_ops(dev); + + if (!ops->write) + return -ENOSYS; + + return ops->write(dev, start, blkcnt, buffer); +} + +unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start, + lbaint_t blkcnt) +{ + struct udevice *dev = block_dev->bdev; + const struct blk_ops *ops = blk_get_ops(dev); + + if (!ops->erase) + return -ENOSYS; + + return ops->erase(dev, start, blkcnt); +} + +int blk_prepare_device(struct udevice *dev) +{ + struct blk_desc *desc = dev_get_uclass_platdata(dev); + + part_init(desc); + + return 0; +} + +int blk_create_device(struct udevice *parent, const char *drv_name, + const char *name, int if_type, int devnum, int blksz, + lbaint_t size, struct udevice **devp) +{ + struct blk_desc *desc; + struct udevice *dev; + int ret; + + ret = device_bind_driver(parent, drv_name, name, &dev); + if (ret) + return ret; + desc = dev_get_uclass_platdata(dev); + desc->if_type = if_type; + desc->blksz = blksz; + desc->lba = size / blksz; + desc->part_type = PART_TYPE_UNKNOWN; + desc->bdev = dev; + desc->devnum = devnum; + *devp = dev; + + return 0; +} + +int blk_unbind_all(int if_type) +{ + struct uclass *uc; + struct udevice *dev, *next; + int ret; + + ret = uclass_get(UCLASS_BLK, &uc); + if (ret) + return ret; + uclass_foreach_dev_safe(dev, next, uc) { + struct blk_desc *desc = dev_get_uclass_platdata(dev); + + if (desc->if_type == if_type) { + ret = device_remove(dev); + if (ret) + return ret; + ret = device_unbind(dev); + if (ret) + return ret; + } + } + + return 0; +} + +UCLASS_DRIVER(blk) = { + .id = UCLASS_BLK, + .name = "blk", + .per_device_platdata_auto_alloc_size = sizeof(struct blk_desc), +}; diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c index bc072f335f..6ec52a9114 100644 --- a/drivers/block/dwc_ahsata.c +++ b/drivers/block/dwc_ahsata.c @@ -620,7 +620,7 @@ int reset_sata(int dev) static void dwc_ahsata_print_info(int dev) { - block_dev_desc_t *pdev = &(sata_dev_desc[dev]); + struct blk_desc *pdev = &(sata_dev_desc[dev]); printf("SATA Device Info:\n\r"); #ifdef CONFIG_SYS_64BIT_LBA @@ -956,7 +956,7 @@ int scan_sata(int dev) struct ahci_probe_ent *probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv; u8 port = probe_ent->hard_port_no; - block_dev_desc_t *pdev = &(sata_dev_desc[dev]); + struct blk_desc *pdev = &(sata_dev_desc[dev]); id = (u16 *)memalign(ARCH_DMA_MINALIGN, roundup(ARCH_DMA_MINALIGN, diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c index c2673bd05d..26569d70aa 100644 --- a/drivers/block/pata_bfin.c +++ b/drivers/block/pata_bfin.c @@ -965,7 +965,7 @@ int scan_sata(int dev) /* Probe device and set xfer mode */ bfin_ata_identify(ap, dev%PATA_DEV_NUM_PER_PORT); bfin_ata_set_Feature_cmd(ap, dev%PATA_DEV_NUM_PER_PORT); - init_part(&sata_dev_desc[dev]); + part_init(&sata_dev_desc[dev]); return 0; } diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 170f0fa5bf..6d41508d5c 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -4,14 +4,20 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <config.h> #include <common.h> +#include <blk.h> +#include <dm.h> +#include <fdtdec.h> #include <part.h> #include <os.h> #include <malloc.h> #include <sandboxblockdev.h> #include <asm/errno.h> +#include <dm/device-internal.h> +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_BLK static struct host_block_dev host_devices[CONFIG_HOST_MAX_DEVICES]; static struct host_block_dev *find_host_device(int dev) @@ -21,48 +27,130 @@ static struct host_block_dev *find_host_device(int dev) return NULL; } +#endif -static unsigned long host_block_read(block_dev_desc_t *block_dev, +#ifdef CONFIG_BLK +static unsigned long host_block_read(struct udevice *dev, unsigned long start, lbaint_t blkcnt, void *buffer) { - int dev = block_dev->dev; + struct host_block_dev *host_dev = dev_get_priv(dev); + struct blk_desc *block_dev = dev_get_uclass_platdata(dev); + +#else +static unsigned long host_block_read(struct blk_desc *block_dev, + unsigned long start, lbaint_t blkcnt, + void *buffer) +{ + int dev = block_dev->devnum; struct host_block_dev *host_dev = find_host_device(dev); if (!host_dev) return -1; - if (os_lseek(host_dev->fd, - start * host_dev->blk_dev.blksz, - OS_SEEK_SET) == -1) { - printf("ERROR: Invalid position\n"); +#endif + + if (os_lseek(host_dev->fd, start * block_dev->blksz, OS_SEEK_SET) == + -1) { + printf("ERROR: Invalid block %lx\n", start); return -1; } - ssize_t len = os_read(host_dev->fd, buffer, - blkcnt * host_dev->blk_dev.blksz); + ssize_t len = os_read(host_dev->fd, buffer, blkcnt * block_dev->blksz); if (len >= 0) - return len / host_dev->blk_dev.blksz; + return len / block_dev->blksz; return -1; } -static unsigned long host_block_write(block_dev_desc_t *block_dev, +#ifdef CONFIG_BLK +static unsigned long host_block_write(struct udevice *dev, unsigned long start, lbaint_t blkcnt, const void *buffer) { - int dev = block_dev->dev; + struct host_block_dev *host_dev = dev_get_priv(dev); + struct blk_desc *block_dev = dev_get_uclass_platdata(dev); +#else +static unsigned long host_block_write(struct blk_desc *block_dev, + unsigned long start, lbaint_t blkcnt, + const void *buffer) +{ + int dev = block_dev->devnum; struct host_block_dev *host_dev = find_host_device(dev); - if (os_lseek(host_dev->fd, - start * host_dev->blk_dev.blksz, - OS_SEEK_SET) == -1) { - printf("ERROR: Invalid position\n"); +#endif + + if (os_lseek(host_dev->fd, start * block_dev->blksz, OS_SEEK_SET) == + -1) { + printf("ERROR: Invalid block %lx\n", start); return -1; } - ssize_t len = os_write(host_dev->fd, buffer, blkcnt * - host_dev->blk_dev.blksz); + ssize_t len = os_write(host_dev->fd, buffer, blkcnt * block_dev->blksz); if (len >= 0) - return len / host_dev->blk_dev.blksz; + return len / block_dev->blksz; return -1; } +#ifdef CONFIG_BLK +int host_dev_bind(int devnum, char *filename) +{ + struct host_block_dev *host_dev; + struct udevice *dev; + char dev_name[20], *str, *fname; + int ret, fd; + + /* Remove and unbind the old device, if any */ + ret = blk_get_device(IF_TYPE_HOST, devnum, &dev); + if (ret == 0) { + ret = device_remove(dev); + if (ret) + return ret; + ret = device_unbind(dev); + if (ret) + return ret; + } else if (ret != -ENODEV) { + return ret; + } + + if (!filename) + return 0; + + snprintf(dev_name, sizeof(dev_name), "host%d", devnum); + str = strdup(dev_name); + if (!str) + return -ENOMEM; + fname = strdup(filename); + if (!fname) { + free(str); + return -ENOMEM; + } + + fd = os_open(filename, OS_O_RDWR); + if (fd == -1) { + printf("Failed to access host backing file '%s'\n", filename); + ret = -ENOENT; + goto err; + } + ret = blk_create_device(gd->dm_root, "sandbox_host_blk", str, + IF_TYPE_HOST, devnum, 512, + os_lseek(fd, 0, OS_SEEK_END), &dev); + if (ret) + goto err_file; + ret = device_probe(dev); + if (ret) { + device_unbind(dev); + goto err_file; + } + + host_dev = dev_get_priv(dev); + host_dev->fd = fd; + host_dev->filename = fname; + + return blk_prepare_device(dev); +err_file: + os_close(fd); +err: + free(fname); + free(str); + return ret; +} +#else int host_dev_bind(int dev, char *filename) { struct host_block_dev *host_dev = find_host_device(dev); @@ -89,23 +177,33 @@ int host_dev_bind(int dev, char *filename) return 1; } - block_dev_desc_t *blk_dev = &host_dev->blk_dev; + struct blk_desc *blk_dev = &host_dev->blk_dev; blk_dev->if_type = IF_TYPE_HOST; blk_dev->priv = host_dev; blk_dev->blksz = 512; blk_dev->lba = os_lseek(host_dev->fd, 0, OS_SEEK_END) / blk_dev->blksz; blk_dev->block_read = host_block_read; blk_dev->block_write = host_block_write; - blk_dev->dev = dev; + blk_dev->devnum = dev; blk_dev->part_type = PART_TYPE_UNKNOWN; - init_part(blk_dev); + part_init(blk_dev); return 0; } +#endif -int host_get_dev_err(int dev, block_dev_desc_t **blk_devp) +int host_get_dev_err(int devnum, struct blk_desc **blk_devp) { - struct host_block_dev *host_dev = find_host_device(dev); +#ifdef CONFIG_BLK + struct udevice *dev; + int ret; + + ret = blk_get_device(IF_TYPE_HOST, devnum, &dev); + if (ret) + return ret; + *blk_devp = dev_get_uclass_platdata(dev); +#else + struct host_block_dev *host_dev = find_host_device(devnum); if (!host_dev) return -ENODEV; @@ -114,15 +212,31 @@ int host_get_dev_err(int dev, block_dev_desc_t **blk_devp) return -ENOENT; *blk_devp = &host_dev->blk_dev; +#endif + return 0; } -block_dev_desc_t *host_get_dev(int dev) +struct blk_desc *host_get_dev(int dev) { - block_dev_desc_t *blk_dev; + struct blk_desc *blk_dev; if (host_get_dev_err(dev, &blk_dev)) return NULL; return blk_dev; } + +#ifdef CONFIG_BLK +static const struct blk_ops sandbox_host_blk_ops = { + .read = host_block_read, + .write = host_block_write, +}; + +U_BOOT_DRIVER(sandbox_host_blk) = { + .name = "sandbox_host_blk", + .id = UCLASS_BLK, + .ops = &sandbox_host_blk_ops, + .priv_auto_alloc_size = sizeof(struct host_block_dev), +}; +#endif diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c index b974e80167..09fe834e22 100644 --- a/drivers/block/systemace.c +++ b/drivers/block/systemace.c @@ -69,11 +69,11 @@ static u16 ace_readw(unsigned off) return in16(base + off); } -static unsigned long systemace_read(block_dev_desc_t *block_dev, +static unsigned long systemace_read(struct blk_desc *block_dev, unsigned long start, lbaint_t blkcnt, void *buffer); -static block_dev_desc_t systemace_dev = { 0 }; +static struct blk_desc systemace_dev = { 0 }; static int get_cf_lock(void) { @@ -105,13 +105,13 @@ static void release_cf_lock(void) } #ifdef CONFIG_PARTITIONS -block_dev_desc_t *systemace_get_dev(int dev) +struct blk_desc *systemace_get_dev(int dev) { /* The first time through this, the systemace_dev object is not yet initialized. In that case, fill it in. */ if (systemace_dev.blksz == 0) { systemace_dev.if_type = IF_TYPE_UNKNOWN; - systemace_dev.dev = 0; + systemace_dev.devnum = 0; systemace_dev.part_type = PART_TYPE_UNKNOWN; systemace_dev.type = DEV_TYPE_HARDDISK; systemace_dev.blksz = 512; @@ -124,7 +124,7 @@ block_dev_desc_t *systemace_get_dev(int dev) */ ace_writew(width == 8 ? 0 : 0x0001, 0); - init_part(&systemace_dev); + part_init(&systemace_dev); } @@ -137,7 +137,7 @@ block_dev_desc_t *systemace_get_dev(int dev) * the dev_desc) to read blocks of data. The return value is the * number of blocks read. A zero return indicates an error. */ -static unsigned long systemace_read(block_dev_desc_t *block_dev, +static unsigned long systemace_read(struct blk_desc *block_dev, unsigned long start, lbaint_t blkcnt, void *buffer) { diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c index 913c3ccc70..1a9c864ef3 100644 --- a/drivers/core/simple-bus.c +++ b/drivers/core/simple-bus.c @@ -53,6 +53,7 @@ UCLASS_DRIVER(simple_bus) = { static const struct udevice_id generic_simple_bus_ids[] = { { .compatible = "simple-bus" }, + { .compatible = "simple-mfd" }, { } }; diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index 12095e75a4..1141ce1ba3 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -401,6 +401,19 @@ int uclass_first_device(enum uclass_id id, struct udevice **devp) return uclass_get_device_tail(dev, ret, devp); } +int uclass_first_device_err(enum uclass_id id, struct udevice **devp) +{ + int ret; + + ret = uclass_first_device(id, devp); + if (ret) + return ret; + else if (!*devp) + return -ENODEV; + + return 0; +} + int uclass_next_device(struct udevice **devp) { struct udevice *dev = *devp; diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index 395d472e0b..faece8883a 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -351,11 +351,11 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) } else if (!strcmp(entity_type, "part")) { disk_partition_t partinfo; - block_dev_desc_t *blk_dev = &mmc->block_dev; + struct blk_desc *blk_dev = &mmc->block_dev; int mmcdev = second_arg; int mmcpart = third_arg; - if (get_partition_info(blk_dev, mmcpart, &partinfo) != 0) { + if (part_get_info(blk_dev, mmcpart, &partinfo) != 0) { error("Couldn't find part #%d on mmc device #%d\n", mmcpart, mmcdev); return -ENODEV; diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index c62f0251c4..40e87bd199 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -116,11 +116,9 @@ static int rockchip_gpio_probe(struct udevice *dev) /* This only supports RK3288 at present */ priv->regs = (struct rockchip_gpio_regs *)dev_get_addr(dev); - ret = uclass_first_device(UCLASS_PINCTRL, &priv->pinctrl); + ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); if (ret) return ret; - if (!priv->pinctrl) - return -ENODEV; uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK; end = strrchr(dev->name, '@'); diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index f2b08abf11..5969d34444 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -16,8 +16,8 @@ obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o -endif obj-$(CONFIG_FSL_DEBUG_SERVER) += fsl_debug_server.o +endif obj-$(CONFIG_FSL_IIM) += fsl_iim.o obj-$(CONFIG_GPIO_LED) += gpio_led.o obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c index 2d0fa2a7dd..ed6d462c95 100644 --- a/drivers/misc/altera_sysid.c +++ b/drivers/misc/altera_sysid.c @@ -32,11 +32,9 @@ void display_sysid(void) int ret; /* the first misc device will be used */ - ret = uclass_first_device(UCLASS_MISC, &dev); + ret = uclass_first_device_err(UCLASS_MISC, &dev); if (ret) return; - if (!dev) - return; ret = misc_read(dev, 0, &sysid, sizeof(sysid)); if (ret) return; diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index 5ef7ff7ff2..8f2694f14c 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -375,7 +375,7 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host) if (mmc == NULL) return -1; - debug("registered mmc interface number is:%d\n", mmc->block_dev.dev); + debug("registered mmc interface number is:%d\n", mmc->block_dev.devnum); return 0; } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index ede5d6eeec..8b2e6069ea 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -182,7 +182,7 @@ struct mmc *find_mmc_device(int dev_num) list_for_each(entry, &mmc_devices) { m = list_entry(entry, struct mmc, link); - if (m->block_dev.dev == dev_num) + if (m->block_dev.devnum == dev_num) return m; } @@ -234,10 +234,10 @@ static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, return blkcnt; } -static ulong mmc_bread(block_dev_desc_t *block_dev, lbaint_t start, +static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, void *dst) { - int dev_num = block_dev->dev; + int dev_num = block_dev->devnum; int err; lbaint_t cur, blocks_todo = blkcnt; @@ -1495,7 +1495,7 @@ static int mmc_startup(struct mmc *mmc) mmc->block_dev.revision[0] = 0; #endif #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) - init_part(&mmc->block_dev); + part_init(&mmc->block_dev); #endif return 0; @@ -1556,7 +1556,7 @@ struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) mmc->dsr = 0xffffffff; /* Setup the universal parts of the block interface just once */ mmc->block_dev.if_type = IF_TYPE_MMC; - mmc->block_dev.dev = cur_dev_num++; + mmc->block_dev.devnum = cur_dev_num++; mmc->block_dev.removable = 1; mmc->block_dev.block_read = mmc_bread; mmc->block_dev.block_write = mmc_bwrite; @@ -1579,7 +1579,7 @@ void mmc_destroy(struct mmc *mmc) } #ifdef CONFIG_PARTITIONS -block_dev_desc_t *mmc_get_dev(int dev) +struct blk_desc *mmc_get_dev(int dev) { struct mmc *mmc = find_mmc_device(dev); if (!mmc || mmc_init(mmc)) @@ -1728,7 +1728,7 @@ void print_mmc_devices(char separator) else mmc_type = NULL; - printf("%s: %d", m->cfg->name, m->block_dev.dev); + printf("%s: %d", m->cfg->name, m->block_dev.devnum); if (mmc_type) printf(" (%s)", mmc_type); diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h index 6a7063976c..d3f6bfe123 100644 --- a/drivers/mmc/mmc_private.h +++ b/drivers/mmc/mmc_private.h @@ -22,23 +22,23 @@ void mmc_adapter_card_type_ident(void); #ifndef CONFIG_SPL_BUILD -unsigned long mmc_berase(block_dev_desc_t *block_dev, lbaint_t start, +unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt); -unsigned long mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start, +unsigned long mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, const void *src); #else /* CONFIG_SPL_BUILD */ /* SPL will never write or erase, declare dummies to reduce code size. */ -static inline unsigned long mmc_berase(block_dev_desc_t *block_dev, +static inline unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) { return 0; } -static inline ulong mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start, +static inline ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, const void *src) { return 0; diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 9032a73d78..7547e1aef8 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -91,7 +91,7 @@ static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf, spi_xfer(spi, bsize * 8, NULL, buf, 0); spi_xfer(spi, 2 * 8, NULL, &crc, 0); #ifdef CONFIG_MMC_SPI_CRC_ON - if (be_to_cpu16(cyg_crc16(buf, bsize)) != crc) { + if (be_to_cpu16(crc16_ccitt(0, buf, bsize)) != crc) { debug("%s: CRC error\n", mmc->cfg->name); r1 = R1_SPI_COM_CRC; break; @@ -120,7 +120,7 @@ static uint mmc_spi_writedata(struct mmc *mmc, const void *xbuf, tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE; while (bcnt--) { #ifdef CONFIG_MMC_SPI_CRC_ON - crc = cpu_to_be16(cyg_crc16((u8 *)buf, bsize)); + crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize)); #endif spi_xfer(spi, 2 * 8, tok, NULL, 0); spi_xfer(spi, bsize * 8, buf, NULL, 0); diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index 79b8c4d808..7b186f8500 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -65,10 +65,10 @@ err_out: return err; } -unsigned long mmc_berase(block_dev_desc_t *block_dev, lbaint_t start, +unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) { - int dev_num = block_dev->dev; + int dev_num = block_dev->devnum; int err = 0; u32 start_rem, blkcnt_rem; struct mmc *mmc = find_mmc_device(dev_num); @@ -171,10 +171,10 @@ static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start, return blkcnt; } -ulong mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start, lbaint_t blkcnt, +ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, const void *src) { - int dev_num = block_dev->dev; + int dev_num = block_dev->devnum; lbaint_t cur, blocks_todo = blkcnt; int err; diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 31fb3abc9c..9fa87d5717 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -142,7 +142,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) uint32_t ctrl0; int ret; - debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); + debug("MMC%d: CMD%d\n", mmc->block_dev.devnum, cmd->cmdidx); /* Check bus busy */ timeout = MXSMMC_MAX_TIMEOUT; @@ -157,13 +157,13 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } if (!timeout) { - printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.dev); + printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.devnum); return TIMEOUT; } /* See if card is present */ if (!mxsmmc_cd(priv)) { - printf("MMC%d: No card detected!\n", mmc->block_dev.dev); + printf("MMC%d: No card detected!\n", mmc->block_dev.devnum); return NO_CARD_ERR; } @@ -200,9 +200,9 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (data->flags & MMC_DATA_READ) { ctrl0 |= SSP_CTRL0_READ; } else if (priv->mmc_is_wp && - priv->mmc_is_wp(mmc->block_dev.dev)) { + priv->mmc_is_wp(mmc->block_dev.devnum)) { printf("MMC%d: Can not write a locked card!\n", - mmc->block_dev.dev); + mmc->block_dev.devnum); return UNUSABLE_ERR; } @@ -243,21 +243,21 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (!timeout) { printf("MMC%d: Command %d busy\n", - mmc->block_dev.dev, cmd->cmdidx); + mmc->block_dev.devnum, cmd->cmdidx); return TIMEOUT; } /* Check command timeout */ if (reg & SSP_STATUS_RESP_TIMEOUT) { printf("MMC%d: Command %d timeout (status 0x%08x)\n", - mmc->block_dev.dev, cmd->cmdidx, reg); + mmc->block_dev.devnum, cmd->cmdidx, reg); return TIMEOUT; } /* Check command errors */ if (reg & (SSP_STATUS_RESP_CRC_ERR | SSP_STATUS_RESP_ERR)) { printf("MMC%d: Command %d error (status 0x%08x)!\n", - mmc->block_dev.dev, cmd->cmdidx, reg); + mmc->block_dev.devnum, cmd->cmdidx, reg); return COMM_ERR; } @@ -279,14 +279,14 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (ret) { printf("MMC%d: Data timeout with command %d " "(status 0x%08x)!\n", - mmc->block_dev.dev, cmd->cmdidx, reg); + mmc->block_dev.devnum, cmd->cmdidx, reg); return ret; } } else { ret = mxsmmc_send_cmd_dma(priv, data); if (ret) { printf("MMC%d: DMA transfer failed\n", - mmc->block_dev.dev); + mmc->block_dev.devnum); return ret; } } @@ -297,7 +297,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) (SSP_STATUS_TIMEOUT | SSP_STATUS_DATA_CRC_ERR | SSP_STATUS_FIFO_OVRFLW | SSP_STATUS_FIFO_UNDRFLW)) { printf("MMC%d: Data error with command %d (status 0x%08x)!\n", - mmc->block_dev.dev, cmd->cmdidx, reg); + mmc->block_dev.devnum, cmd->cmdidx, reg); return COMM_ERR; } @@ -330,7 +330,7 @@ static void mxsmmc_set_ios(struct mmc *mmc) SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); debug("MMC%d: Set %d bits bus width\n", - mmc->block_dev.dev, mmc->bus_width); + mmc->block_dev.devnum, mmc->bus_width); } static int mxsmmc_init(struct mmc *mmc) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 5038a9f55f..5f2db3b5cf 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -177,11 +177,11 @@ static unsigned char mmc_board_init(struct mmc *mmc) #if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER) /* PBIAS config needed for MMC1 only */ - if (mmc->block_dev.dev == 0) + if (mmc->block_dev.devnum == 0) omap4_vmmc_pbias_config(mmc); #endif #if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER) - if (mmc->block_dev.dev == 0) + if (mmc->block_dev.devnum == 0) omap5_pbias_config(mmc); #endif diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 8586d898fd..ef7e6150f9 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -137,7 +137,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, int trans_bytes = 0, is_aligned = 1; u32 mask, flags, mode; unsigned int time = 0, start_addr = 0; - int mmc_dev = mmc->block_dev.dev; + int mmc_dev = mmc->block_dev.devnum; unsigned start = get_timer(0); /* Timeout unit - ms */ diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c index 7e312f1517..71c3abef22 100644 --- a/drivers/net/fm/init.c +++ b/drivers/net/fm/init.c @@ -6,6 +6,7 @@ #include <errno.h> #include <common.h> #include <asm/io.h> +#include <fdt_support.h> #include <fsl_mdio.h> #ifdef CONFIG_FSL_LAYERSCAPE #include <asm/arch/fsl_serdes.h> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index d01bfc12e4..519052efe3 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -30,11 +30,9 @@ int pci_get_bus(int busnum, struct udevice **busp) /* Since buses may not be numbered yet try a little harder with bus 0 */ if (ret == -ENODEV) { - ret = uclass_first_device(UCLASS_PCI, busp); + ret = uclass_first_device_err(UCLASS_PCI, busp); if (ret) return ret; - else if (!*busp) - return -ENODEV; ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp); } diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c index 85c419e6f4..677f094b41 100644 --- a/drivers/pci/pci_auto_common.c +++ b/drivers/pci/pci_auto_common.c @@ -62,6 +62,17 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, return -1; } +static void pciauto_show_region(const char *name, struct pci_region *region) +{ + pciauto_region_init(region); + debug("PCI Autoconfig: Bus %s region: [%llx-%llx],\n" + "\t\tPhysical Memory [%llx-%llxx]\n", name, + (unsigned long long)region->bus_start, + (unsigned long long)(region->bus_start + region->size - 1), + (unsigned long long)region->phys_start, + (unsigned long long)(region->phys_start + region->size - 1)); +} + void pciauto_config_init(struct pci_controller *hose) { int i; @@ -91,38 +102,10 @@ void pciauto_config_init(struct pci_controller *hose) } - if (hose->pci_mem) { - pciauto_region_init(hose->pci_mem); - - debug("PCI Autoconfig: Bus Memory region: [0x%llx-0x%llx],\n" - "\t\tPhysical Memory [%llx-%llxx]\n", - (u64)hose->pci_mem->bus_start, - (u64)(hose->pci_mem->bus_start + hose->pci_mem->size - 1), - (u64)hose->pci_mem->phys_start, - (u64)(hose->pci_mem->phys_start + hose->pci_mem->size - 1)); - } - - if (hose->pci_prefetch) { - pciauto_region_init(hose->pci_prefetch); - - debug("PCI Autoconfig: Bus Prefetchable Mem: [0x%llx-0x%llx],\n" - "\t\tPhysical Memory [%llx-%llx]\n", - (u64)hose->pci_prefetch->bus_start, - (u64)(hose->pci_prefetch->bus_start + - hose->pci_prefetch->size - 1), - (u64)hose->pci_prefetch->phys_start, - (u64)(hose->pci_prefetch->phys_start + - hose->pci_prefetch->size - 1)); - } - - if (hose->pci_io) { - pciauto_region_init(hose->pci_io); - - debug("PCI Autoconfig: Bus I/O region: [0x%llx-0x%llx],\n" - "\t\tPhysical Memory: [%llx-%llx]\n", - (u64)hose->pci_io->bus_start, - (u64)(hose->pci_io->bus_start + hose->pci_io->size - 1), - (u64)hose->pci_io->phys_start, - (u64)(hose->pci_io->phys_start + hose->pci_io->size - 1)); - } + if (hose->pci_mem) + pciauto_show_region("Memory", hose->pci_mem); + if (hose->pci_prefetch) + pciauto_show_region("Prefetchable Mem", hose->pci_prefetch); + if (hose->pci_io) + pciauto_show_region("I/O", hose->pci_io); } diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 9fe07f2f73..4434e36312 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -325,7 +325,7 @@ int regulators_enable_boot_on(bool verbose) if (ret) return ret; for (uclass_first_device(UCLASS_REGULATOR, &dev); - dev && !ret; + dev; uclass_next_device(&dev)) { ret = regulator_autoset(dev); if (ret == -EMEDIUMTYPE) { diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 437224b549..d0b76be118 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -21,4 +21,14 @@ config REMOTEPROC_SANDBOX help Say 'y' here to add support for test processor which does dummy operations for sandbox platform. + +config REMOTEPROC_TI_POWER + bool "Support for TI Power processor" + select REMOTEPROC + depends on DM + depends on ARCH_KEYSTONE + depends on OF_CONTROL + help + Say 'y' here to add support for TI power processors such as those + found on certain TI keystone and OMAP generation SoCs. endmenu diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index 720aa6e647..65fc0613de 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_REMOTEPROC) += rproc-uclass.o # Remote proc drivers - Please keep this list alphabetically sorted. obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o +obj-$(CONFIG_REMOTEPROC_TI_POWER) += ti_power_proc.o diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c new file mode 100644 index 0000000000..76ac3be092 --- /dev/null +++ b/drivers/remoteproc/ti_power_proc.c @@ -0,0 +1,180 @@ +/* + * (C) Copyright 2015-2016 + * Texas Instruments Incorporated - http://www.ti.com/ + * SPDX-License-Identifier: GPL-2.0+ + */ +#define pr_fmt(fmt) "%s: " fmt, __func__ +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <remoteproc.h> +#include <mach/psc_defs.h> + +DECLARE_GLOBAL_DATA_PTR; + +/** + * struct ti_powerproc_privdata - power processor private data + * @loadaddr: base address for loading the power processor + * @psc_module: psc module address. + */ +struct ti_powerproc_privdata { + phys_addr_t loadaddr; + u32 psc_module; +}; + +/** + * ti_of_to_priv() - generate private data from device tree + * @dev: corresponding ti remote processor device + * @priv: pointer to driver specific private data + * + * Return: 0 if all went ok, else corresponding -ve error + */ +static int ti_of_to_priv(struct udevice *dev, + struct ti_powerproc_privdata *priv) +{ + int node = dev->of_offset; + const void *blob = gd->fdt_blob; + int tmp; + + if (!blob) { + debug("'%s' no dt?\n", dev->name); + return -EINVAL; + } + + priv->loadaddr = fdtdec_get_addr(blob, node, "reg"); + if (priv->loadaddr == FDT_ADDR_T_NONE) { + debug("'%s': no 'reg' property\n", dev->name); + return -EINVAL; + } + + tmp = fdtdec_get_int(blob, node, "ti,lpsc_module", -EINVAL); + if (tmp < 0) { + debug("'%s': no 'ti,lpsc_module' property\n", dev->name); + return tmp; + } + priv->psc_module = tmp; + + return 0; +} + +/** + * ti_powerproc_probe() - Basic probe + * @dev: corresponding ti remote processor device + * + * Return: 0 if all went ok, else corresponding -ve error + */ +static int ti_powerproc_probe(struct udevice *dev) +{ + struct dm_rproc_uclass_pdata *uc_pdata; + struct ti_powerproc_privdata *priv; + int ret; + + uc_pdata = dev_get_uclass_platdata(dev); + priv = dev_get_priv(dev); + + ret = ti_of_to_priv(dev, priv); + + debug("%s probed with slave_addr=0x%08lX module=%d(%d)\n", + uc_pdata->name, priv->loadaddr, priv->psc_module, ret); + + return ret; +} + +/** + * ti_powerproc_load() - Loadup the TI remote processor + * @dev: corresponding ti remote processor device + * @addr: Address in memory where image binary is stored + * @size: Size in bytes of the image binary + * + * Return: 0 if all went ok, else corresponding -ve error + */ +static int ti_powerproc_load(struct udevice *dev, ulong addr, ulong size) +{ + struct dm_rproc_uclass_pdata *uc_pdata; + struct ti_powerproc_privdata *priv; + int ret; + + uc_pdata = dev_get_uclass_platdata(dev); + if (!uc_pdata) { + debug("%s: no uc pdata!\n", dev->name); + return -EINVAL; + } + + priv = dev_get_priv(dev); + ret = psc_module_keep_in_reset_enabled(priv->psc_module, false); + if (ret) { + debug("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + + debug("%s: Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n", + uc_pdata->name, addr, size, priv->loadaddr); + + memcpy((void *)priv->loadaddr, (void *)addr, size); + + debug("%s: Complete!\n", uc_pdata->name); + return 0; +} + +/** + * ti_powerproc_start() - (replace: short desc) + * @dev: corresponding ti remote processor device + * + * Return: 0 if all went ok, else corresponding -ve error + */ +static int ti_powerproc_start(struct udevice *dev) +{ + struct dm_rproc_uclass_pdata *uc_pdata; + struct ti_powerproc_privdata *priv; + int ret; + + uc_pdata = dev_get_uclass_platdata(dev); + if (!uc_pdata) { + debug("%s: no uc pdata!\n", dev->name); + return -EINVAL; + } + + priv = dev_get_priv(dev); + ret = psc_disable_module(priv->psc_module); + if (ret) { + debug("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + + ret = psc_module_release_from_reset(priv->psc_module); + if (ret) { + debug("%s Failed to wait for module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + ret = psc_enable_module(priv->psc_module); + if (ret) { + debug("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + + return 0; +} + +static const struct dm_rproc_ops ti_powerproc_ops = { + .load = ti_powerproc_load, + .start = ti_powerproc_start, +}; + +static const struct udevice_id ti_powerproc_ids[] = { + {.compatible = "ti,power-processor"}, + {} +}; + +U_BOOT_DRIVER(ti_powerproc) = { + .name = "ti_power_proc", + .of_match = ti_powerproc_ids, + .id = UCLASS_REMOTEPROC, + .ops = &ti_powerproc_ops, + .probe = ti_powerproc_probe, + .priv_auto_alloc_size = sizeof(struct ti_powerproc_privdata), +}; diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 1c447ff27a..f154eb156c 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -123,11 +123,12 @@ static void _serial_putc(struct udevice *dev, char ch) struct dm_serial_ops *ops = serial_get_ops(dev); int err; + if (ch == '\n') + _serial_putc(dev, '\r'); + do { err = ops->putc(dev, ch); } while (err == -EAGAIN); - if (ch == '\n') - _serial_putc(dev, '\r'); } static void _serial_puts(struct udevice *dev, const char *str) diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index 7dbb49f814..6292eb136b 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -68,9 +68,6 @@ static int arc_serial_putc(struct udevice *dev, const char c) struct arc_serial_platdata *plat = dev->platdata; struct arc_serial_regs *const regs = plat->reg; - if (c == '\n') - arc_serial_putc(dev, '\r'); - while (!(readb(®s->status) & UART_TXEMPTY)) ; diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index fc3321fda0..042e9a26d1 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -77,9 +77,6 @@ static int _lpuart_serial_getc(struct lpuart_fsl *base) static void _lpuart_serial_putc(struct lpuart_fsl *base, const char c) { - if (c == '\n') - _lpuart_serial_putc(base, '\r'); - while (!(__raw_readb(&base->us1) & US1_TDRE)) WATCHDOG_RESET(); @@ -198,9 +195,6 @@ static int _lpuart32_serial_getc(struct lpuart_fsl *base) static void _lpuart32_serial_putc(struct lpuart_fsl *base, const char c) { - if (c == '\n') - _lpuart32_serial_putc(base, '\r'); - while (!(in_be32(&base->stat) & STAT_TDRE)) WATCHDOG_RESET(); diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 51485c0d09..1563bb3665 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -164,15 +164,15 @@ static int mxc_serial_getc(void) static void mxc_serial_putc(const char c) { + /* If \n, also do \r */ + if (c == '\n') + serial_putc('\r'); + __REG(UART_PHYS + UTXD) = c; /* wait for transmitter to be ready */ while (!(__REG(UART_PHYS + UTS) & UTS_TXEMPTY)) WATCHDOG_RESET(); - - /* If \n, also do \r */ - if (c == '\n') - serial_putc ('\r'); } /* diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 8fbcc10248..1eb19ececd 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -156,6 +156,10 @@ void pxa_putc_dev(unsigned int uart_index, const char c) { struct pxa_uart_regs *uart_regs; + /* If \n, also do \r */ + if (c == '\n') + pxa_putc_dev(uart_index, '\r'); + uart_regs = pxa_uart_index_to_regs(uart_index); if (!uart_regs) hang(); @@ -163,10 +167,6 @@ void pxa_putc_dev(unsigned int uart_index, const char c) while (!(readl(&uart_regs->lsr) & LSR_TEMT)) WATCHDOG_RESET(); writel(c, &uart_regs->thr); - - /* If \n, also do \r */ - if (c == '\n') - pxa_putc_dev (uart_index,'\r'); } /* diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c index d4e7df27be..0f0878a051 100644 --- a/drivers/serial/serial_s3c24x0.c +++ b/drivers/serial/serial_s3c24x0.c @@ -135,14 +135,14 @@ static void _serial_putc(const char c, const int dev_index) { struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); + /* If \n, also do \r */ + if (c == '\n') + serial_putc('\r'); + while (!(readl(&uart->utrstat) & 0x2)) /* wait for room in the tx FIFO */ ; writeb(c, &uart->utxh); - - /* If \n, also do \r */ - if (c == '\n') - serial_putc('\r'); } static inline void serial_putc_dev(unsigned int dev_index, const char c) diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index 75f0ec31bb..2e19813643 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -434,11 +434,12 @@ void usbtty_putc(struct stdio_dev *dev, const char c) if (!usbtty_configured ()) return; - buf_push (&usbtty_output, &c, 1); /* If \n, also do \r */ if (c == '\n') buf_push (&usbtty_output, "\r", 1); + buf_push(&usbtty_output, &c, 1); + /* Poll at end to handle new data... */ if ((usbtty_output.size + 2) >= usbtty_output.totalsize) { usbtty_poll (); @@ -498,8 +499,8 @@ void usbtty_puts(struct stdio_dev *dev, const char *str) n = next_nl_pos (str); if (str[n] == '\n') { - __usbtty_puts (str, n + 1); - __usbtty_puts ("\r", 1); + __usbtty_puts("\r", 1); + __usbtty_puts(str, n + 1); str += (n + 1); len -= (n + 1); } else { diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 2cdb11025f..f0258f84af 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -155,6 +155,13 @@ config ZYNQ_QSPI Zynq QSPI IP core. This IP is used to connect the flash in 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. +config OMAP3_SPI + bool "McSPI driver for OMAP" + help + SPI master controller for OMAP24XX and later Multichannel SPI + (McSPI). This driver be used to access SPI chips on platforms + embedding this OMAP3 McSPI IP core. + endif # if DM_SPI config FSL_ESPI diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 95cdfa36ef..98ee6d3d03 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -1,4 +1,7 @@ /* + * Copyright (C) 2016 Jagan Teki <jteki@openedev.com> + * Christophe Ricard <christophe.ricard@gmail.com> + * * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com> * * Driver for McSPI controller on OMAP3. Based on davinci_spi.c @@ -15,307 +18,208 @@ */ #include <common.h> +#include <dm.h> #include <spi.h> #include <malloc.h> #include <asm/io.h> -#include "omap3_spi.h" - -#define SPI_WAIT_TIMEOUT 10 - -static void spi_reset(struct omap3_spi_slave *ds) -{ - unsigned int tmp; - writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, &ds->regs->sysconfig); - do { - tmp = readl(&ds->regs->sysstatus); - } while (!(tmp & OMAP3_MCSPI_SYSSTATUS_RESETDONE)); +DECLARE_GLOBAL_DATA_PTR; - writel(OMAP3_MCSPI_SYSCONFIG_AUTOIDLE | - OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP | - OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, - &ds->regs->sysconfig); - - writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, &ds->regs->wakeupenable); -} +#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX) +#define OMAP3_MCSPI1_BASE 0x48030100 +#define OMAP3_MCSPI2_BASE 0x481A0100 +#else +#define OMAP3_MCSPI1_BASE 0x48098000 +#define OMAP3_MCSPI2_BASE 0x4809A000 +#define OMAP3_MCSPI3_BASE 0x480B8000 +#define OMAP3_MCSPI4_BASE 0x480BA000 +#endif -static void omap3_spi_write_chconf(struct omap3_spi_slave *ds, int val) +/* per-register bitmasks */ +#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) +#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) +#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) +#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) + +#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) + +#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) +#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) +#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) + +#define OMAP3_MCSPI_CHCONF_PHA BIT(0) +#define OMAP3_MCSPI_CHCONF_POL BIT(1) +#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) +#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) +#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) +#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) +#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) +#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) +#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) +#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) +#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) +#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) +#define OMAP3_MCSPI_CHCONF_IS BIT(18) +#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) +#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) + +#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) +#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) +#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) + +#define OMAP3_MCSPI_CHCTRL_EN BIT(0) +#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) + +#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) +#define MCSPI_PINDIR_D0_IN_D1_OUT 0 +#define MCSPI_PINDIR_D0_OUT_D1_IN 1 + +#define OMAP3_MCSPI_MAX_FREQ 48000000 +#define SPI_WAIT_TIMEOUT 10 + +/* OMAP3 McSPI registers */ +struct mcspi_channel { + unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ + unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ + unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ + unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ + unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ +}; + +struct mcspi { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned int irqstatus; /* 0x18 */ + unsigned int irqenable; /* 0x1C */ + unsigned int wakeupenable; /* 0x20 */ + unsigned int syst; /* 0x24 */ + unsigned int modulctrl; /* 0x28 */ + struct mcspi_channel channel[4]; + /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ + /* channel1: 0x40 - 0x50, bus 0 & 1 */ + /* channel2: 0x54 - 0x64, bus 0 & 1 */ + /* channel3: 0x68 - 0x78, bus 0 */ +}; + +struct omap3_spi_priv { + struct mcspi *regs; + unsigned int cs; + unsigned int freq; + unsigned int mode; + unsigned int wordlen; + unsigned int pin_dir:1; +}; + +static void omap3_spi_write_chconf(struct omap3_spi_priv *priv, int val) { - writel(val, &ds->regs->channel[ds->slave.cs].chconf); + writel(val, &priv->regs->channel[priv->cs].chconf); /* Flash post writes to make immediate effect */ - readl(&ds->regs->channel[ds->slave.cs].chconf); + readl(&priv->regs->channel[priv->cs].chconf); } -static void omap3_spi_set_enable(struct omap3_spi_slave *ds, int enable) +static void omap3_spi_set_enable(struct omap3_spi_priv *priv, int enable) { - writel(enable, &ds->regs->channel[ds->slave.cs].chctrl); + writel(enable, &priv->regs->channel[priv->cs].chctrl); /* Flash post writes to make immediate effect */ - readl(&ds->regs->channel[ds->slave.cs].chctrl); -} - -void spi_init() -{ - /* do nothing */ -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct omap3_spi_slave *ds; - struct mcspi *regs; - - /* - * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) - * with different number of chip selects (CS, channels): - * McSPI1 has 4 CS (bus 0, cs 0 - 3) - * McSPI2 has 2 CS (bus 1, cs 0 - 1) - * McSPI3 has 2 CS (bus 2, cs 0 - 1) - * McSPI4 has 1 CS (bus 3, cs 0) - */ - - switch (bus) { - case 0: - regs = (struct mcspi *)OMAP3_MCSPI1_BASE; - break; -#ifdef OMAP3_MCSPI2_BASE - case 1: - regs = (struct mcspi *)OMAP3_MCSPI2_BASE; - break; -#endif -#ifdef OMAP3_MCSPI3_BASE - case 2: - regs = (struct mcspi *)OMAP3_MCSPI3_BASE; - break; -#endif -#ifdef OMAP3_MCSPI4_BASE - case 3: - regs = (struct mcspi *)OMAP3_MCSPI4_BASE; - break; -#endif - default: - printf("SPI error: unsupported bus %i. \ - Supported busses 0 - 3\n", bus); - return NULL; - } - - if (((bus == 0) && (cs > 3)) || - ((bus == 1) && (cs > 1)) || - ((bus == 2) && (cs > 1)) || - ((bus == 3) && (cs > 0))) { - printf("SPI error: unsupported chip select %i \ - on bus %i\n", cs, bus); - return NULL; - } - - if (max_hz > OMAP3_MCSPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %i Hz. \ - Max frequency is 48 Mhz\n", max_hz); - return NULL; - } - - if (mode > SPI_MODE_3) { - printf("SPI error: unsupported SPI mode %i\n", mode); - return NULL; - } - - ds = spi_alloc_slave(struct omap3_spi_slave, bus, cs); - if (!ds) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - - ds->regs = regs; - ds->freq = max_hz; - ds->mode = mode; - - return &ds->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct omap3_spi_slave *ds = to_omap3_spi(slave); - - free(ds); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct omap3_spi_slave *ds = to_omap3_spi(slave); - unsigned int conf, div = 0; - - /* McSPI global module configuration */ - - /* - * setup when switching from (reset default) slave mode - * to single-channel master mode - */ - spi_reset(ds); - conf = readl(&ds->regs->modulctrl); - conf &= ~(OMAP3_MCSPI_MODULCTRL_STEST | OMAP3_MCSPI_MODULCTRL_MS); - conf |= OMAP3_MCSPI_MODULCTRL_SINGLE; - writel(conf, &ds->regs->modulctrl); - - /* McSPI individual channel configuration */ - - /* Calculate clock divisor. Valid range: 0x0 - 0xC ( /1 - /4096 ) */ - if (ds->freq) { - while (div <= 0xC && (OMAP3_MCSPI_MAX_FREQ / (1 << div)) - > ds->freq) - div++; - } else - div = 0xC; - - conf = readl(&ds->regs->channel[ds->slave.cs].chconf); - - /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS - * REVISIT: this controller could support SPI_3WIRE mode. - */ -#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED - /* - * Some boards have D0 wired as MOSI / D1 as MISO instead of - * The normal D0 as MISO / D1 as MOSI. - */ - conf &= ~OMAP3_MCSPI_CHCONF_DPE0; - conf |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1; -#else - conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); - conf |= OMAP3_MCSPI_CHCONF_DPE0; -#endif - - /* wordlength */ - conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; - conf |= (ds->slave.wordlen - 1) << 7; - - /* set chipselect polarity; manage with FORCE */ - if (!(ds->mode & SPI_CS_HIGH)) - conf |= OMAP3_MCSPI_CHCONF_EPOL; /* active-low; normal */ - else - conf &= ~OMAP3_MCSPI_CHCONF_EPOL; - - /* set clock divisor */ - conf &= ~OMAP3_MCSPI_CHCONF_CLKD_MASK; - conf |= div << 2; - - /* set SPI mode 0..3 */ - if (ds->mode & SPI_CPOL) - conf |= OMAP3_MCSPI_CHCONF_POL; - else - conf &= ~OMAP3_MCSPI_CHCONF_POL; - if (ds->mode & SPI_CPHA) - conf |= OMAP3_MCSPI_CHCONF_PHA; - else - conf &= ~OMAP3_MCSPI_CHCONF_PHA; - - /* Transmit & receive mode */ - conf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK; - - omap3_spi_write_chconf(ds,conf); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct omap3_spi_slave *ds = to_omap3_spi(slave); - - /* Reset the SPI hardware */ - spi_reset(ds); + readl(&priv->regs->channel[priv->cs].chctrl); } -int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp, - unsigned long flags) +static int omap3_spi_write(struct omap3_spi_priv *priv, unsigned int len, + const void *txp, unsigned long flags) { - struct omap3_spi_slave *ds = to_omap3_spi(slave); - int i; ulong start; - int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + int i, chconf; + + chconf = readl(&priv->regs->channel[priv->cs].chconf); /* Enable the channel */ - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_EN); chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK); - chconf |= (ds->slave.wordlen - 1) << 7; + chconf |= (priv->wordlen - 1) << 7; chconf |= OMAP3_MCSPI_CHCONF_TRM_TX_ONLY; chconf |= OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); for (i = 0; i < len; i++) { /* wait till TX register is empty (TXS == 1) */ start = get_timer(0); - while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + while (!(readl(&priv->regs->channel[priv->cs].chstat) & OMAP3_MCSPI_CHSTAT_TXS)) { if (get_timer(start) > SPI_WAIT_TIMEOUT) { printf("SPI TXS timed out, status=0x%08x\n", - readl(&ds->regs->channel[ds->slave.cs].chstat)); + readl(&priv->regs->channel[priv->cs].chstat)); return -1; } } /* Write the data */ - unsigned int *tx = &ds->regs->channel[ds->slave.cs].tx; - if (ds->slave.wordlen > 16) + unsigned int *tx = &priv->regs->channel[priv->cs].tx; + if (priv->wordlen > 16) writel(((u32 *)txp)[i], tx); - else if (ds->slave.wordlen > 8) + else if (priv->wordlen > 8) writel(((u16 *)txp)[i], tx); else writel(((u8 *)txp)[i], tx); } /* wait to finish of transfer */ - while ((readl(&ds->regs->channel[ds->slave.cs].chstat) & - (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS)) != - (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS)); + while ((readl(&priv->regs->channel[priv->cs].chstat) & + (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS)) != + (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS)) + ; /* Disable the channel otherwise the next immediate RX will get affected */ - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_DIS); if (flags & SPI_XFER_END) { chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); } return 0; } -int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp, - unsigned long flags) +static int omap3_spi_read(struct omap3_spi_priv *priv, unsigned int len, + void *rxp, unsigned long flags) { - struct omap3_spi_slave *ds = to_omap3_spi(slave); - int i; + int i, chconf; ulong start; - int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + + chconf = readl(&priv->regs->channel[priv->cs].chconf); /* Enable the channel */ - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_EN); chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK); - chconf |= (ds->slave.wordlen - 1) << 7; + chconf |= (priv->wordlen - 1) << 7; chconf |= OMAP3_MCSPI_CHCONF_TRM_RX_ONLY; chconf |= OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); - writel(0, &ds->regs->channel[ds->slave.cs].tx); + writel(0, &priv->regs->channel[priv->cs].tx); for (i = 0; i < len; i++) { start = get_timer(0); /* Wait till RX register contains data (RXS == 1) */ - while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + while (!(readl(&priv->regs->channel[priv->cs].chstat) & OMAP3_MCSPI_CHSTAT_RXS)) { if (get_timer(start) > SPI_WAIT_TIMEOUT) { printf("SPI RXS timed out, status=0x%08x\n", - readl(&ds->regs->channel[ds->slave.cs].chstat)); + readl(&priv->regs->channel[priv->cs].chstat)); return -1; } } /* Disable the channel to prevent furher receiving */ - if(i == (len - 1)) - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS); + if (i == (len - 1)) + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_DIS); /* Read the data */ - unsigned int *rx = &ds->regs->channel[ds->slave.cs].rx; - if (ds->slave.wordlen > 16) + unsigned int *rx = &priv->regs->channel[priv->cs].rx; + if (priv->wordlen > 16) ((u32 *)rxp)[i] = readl(rx); - else if (ds->slave.wordlen > 8) + else if (priv->wordlen > 8) ((u16 *)rxp)[i] = (u16)readl(rx); else ((u8 *)rxp)[i] = (u8)readl(rx); @@ -323,133 +227,452 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp, if (flags & SPI_XFER_END) { chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); } return 0; } /*McSPI Transmit Receive Mode*/ -int omap3_spi_txrx(struct spi_slave *slave, unsigned int len, - const void *txp, void *rxp, unsigned long flags) +static int omap3_spi_txrx(struct omap3_spi_priv *priv, unsigned int len, + const void *txp, void *rxp, unsigned long flags) { - struct omap3_spi_slave *ds = to_omap3_spi(slave); ulong start; - int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); - int i=0; + int chconf, i = 0; + + chconf = readl(&priv->regs->channel[priv->cs].chconf); /*Enable SPI channel*/ - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_EN); /*set TRANSMIT-RECEIVE Mode*/ chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK); - chconf |= (ds->slave.wordlen - 1) << 7; + chconf |= (priv->wordlen - 1) << 7; chconf |= OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); /*Shift in and out 1 byte at time*/ for (i=0; i < len; i++){ /* Write: wait for TX empty (TXS == 1)*/ start = get_timer(0); - while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + while (!(readl(&priv->regs->channel[priv->cs].chstat) & OMAP3_MCSPI_CHSTAT_TXS)) { if (get_timer(start) > SPI_WAIT_TIMEOUT) { printf("SPI TXS timed out, status=0x%08x\n", - readl(&ds->regs->channel[ds->slave.cs].chstat)); + readl(&priv->regs->channel[priv->cs].chstat)); return -1; } } /* Write the data */ - unsigned int *tx = &ds->regs->channel[ds->slave.cs].tx; - if (ds->slave.wordlen > 16) + unsigned int *tx = &priv->regs->channel[priv->cs].tx; + if (priv->wordlen > 16) writel(((u32 *)txp)[i], tx); - else if (ds->slave.wordlen > 8) + else if (priv->wordlen > 8) writel(((u16 *)txp)[i], tx); else writel(((u8 *)txp)[i], tx); /*Read: wait for RX containing data (RXS == 1)*/ start = get_timer(0); - while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + while (!(readl(&priv->regs->channel[priv->cs].chstat) & OMAP3_MCSPI_CHSTAT_RXS)) { if (get_timer(start) > SPI_WAIT_TIMEOUT) { printf("SPI RXS timed out, status=0x%08x\n", - readl(&ds->regs->channel[ds->slave.cs].chstat)); + readl(&priv->regs->channel[priv->cs].chstat)); return -1; } } /* Read the data */ - unsigned int *rx = &ds->regs->channel[ds->slave.cs].rx; - if (ds->slave.wordlen > 16) + unsigned int *rx = &priv->regs->channel[priv->cs].rx; + if (priv->wordlen > 16) ((u32 *)rxp)[i] = readl(rx); - else if (ds->slave.wordlen > 8) + else if (priv->wordlen > 8) ((u16 *)rxp)[i] = (u16)readl(rx); else ((u8 *)rxp)[i] = (u8)readl(rx); } /* Disable the channel */ - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_DIS); /*if transfer must be terminated disable the channel*/ if (flags & SPI_XFER_END) { chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); } return 0; } -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int _spi_xfer(struct omap3_spi_priv *priv, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { - struct omap3_spi_slave *ds = to_omap3_spi(slave); unsigned int len; int ret = -1; - if (ds->slave.wordlen < 4 || ds->slave.wordlen > 32) { - printf("omap3_spi: invalid wordlen %d\n", ds->slave.wordlen); + if (priv->wordlen < 4 || priv->wordlen > 32) { + printf("omap3_spi: invalid wordlen %d\n", priv->wordlen); return -1; } - if (bitlen % ds->slave.wordlen) + if (bitlen % priv->wordlen) return -1; - len = bitlen / ds->slave.wordlen; + len = bitlen / priv->wordlen; if (bitlen == 0) { /* only change CS */ - int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + int chconf = readl(&priv->regs->channel[priv->cs].chconf); if (flags & SPI_XFER_BEGIN) { - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_EN); chconf |= OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); + omap3_spi_write_chconf(priv, chconf); } if (flags & SPI_XFER_END) { chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; - omap3_spi_write_chconf(ds,chconf); - omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS); + omap3_spi_write_chconf(priv, chconf); + omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_DIS); } ret = 0; } else { if (dout != NULL && din != NULL) - ret = omap3_spi_txrx(slave, len, dout, din, flags); + ret = omap3_spi_txrx(priv, len, dout, din, flags); else if (dout != NULL) - ret = omap3_spi_write(slave, len, dout, flags); + ret = omap3_spi_write(priv, len, dout, flags); else if (din != NULL) - ret = omap3_spi_read(slave, len, din, flags); + ret = omap3_spi_read(priv, len, din, flags); } return ret; } -int spi_cs_is_valid(unsigned int bus, unsigned int cs) +static void _omap3_spi_set_speed(struct omap3_spi_priv *priv) +{ + uint32_t confr, div = 0; + + confr = readl(&priv->regs->channel[priv->cs].chconf); + + /* Calculate clock divisor. Valid range: 0x0 - 0xC ( /1 - /4096 ) */ + if (priv->freq) { + while (div <= 0xC && (OMAP3_MCSPI_MAX_FREQ / (1 << div)) + > priv->freq) + div++; + } else { + div = 0xC; + } + + /* set clock divisor */ + confr &= ~OMAP3_MCSPI_CHCONF_CLKD_MASK; + confr |= div << 2; + + omap3_spi_write_chconf(priv, confr); +} + +static void _omap3_spi_set_mode(struct omap3_spi_priv *priv) +{ + uint32_t confr; + + confr = readl(&priv->regs->channel[priv->cs].chconf); + + /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS + * REVISIT: this controller could support SPI_3WIRE mode. + */ + if (priv->pin_dir == MCSPI_PINDIR_D0_IN_D1_OUT) { + confr &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); + confr |= OMAP3_MCSPI_CHCONF_DPE0; + } else { + confr &= ~OMAP3_MCSPI_CHCONF_DPE0; + confr |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1; + } + + /* set SPI mode 0..3 */ + confr &= ~(OMAP3_MCSPI_CHCONF_POL | OMAP3_MCSPI_CHCONF_PHA); + if (priv->mode & SPI_CPHA) + confr |= OMAP3_MCSPI_CHCONF_PHA; + if (priv->mode & SPI_CPOL) + confr |= OMAP3_MCSPI_CHCONF_POL; + + /* set chipselect polarity; manage with FORCE */ + if (!(priv->mode & SPI_CS_HIGH)) + confr |= OMAP3_MCSPI_CHCONF_EPOL; /* active-low; normal */ + else + confr &= ~OMAP3_MCSPI_CHCONF_EPOL; + + /* Transmit & receive mode */ + confr &= ~OMAP3_MCSPI_CHCONF_TRM_MASK; + + omap3_spi_write_chconf(priv, confr); +} + +static void _omap3_spi_set_wordlen(struct omap3_spi_priv *priv) +{ + unsigned int confr; + + /* McSPI individual channel configuration */ + confr = readl(&priv->regs->channel[priv->wordlen].chconf); + + /* wordlength */ + confr &= ~OMAP3_MCSPI_CHCONF_WL_MASK; + confr |= (priv->wordlen - 1) << 7; + + omap3_spi_write_chconf(priv, confr); +} + +static void spi_reset(struct mcspi *regs) +{ + unsigned int tmp; + + writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, ®s->sysconfig); + do { + tmp = readl(®s->sysstatus); + } while (!(tmp & OMAP3_MCSPI_SYSSTATUS_RESETDONE)); + + writel(OMAP3_MCSPI_SYSCONFIG_AUTOIDLE | + OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP | + OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, ®s->sysconfig); + + writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, ®s->wakeupenable); +} + +static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) +{ + unsigned int conf; + + spi_reset(priv->regs); + + /* + * setup when switching from (reset default) slave mode + * to single-channel master mode + */ + conf = readl(&priv->regs->modulctrl); + conf &= ~(OMAP3_MCSPI_MODULCTRL_STEST | OMAP3_MCSPI_MODULCTRL_MS); + conf |= OMAP3_MCSPI_MODULCTRL_SINGLE; + + writel(conf, &priv->regs->modulctrl); + + _omap3_spi_set_mode(priv); + _omap3_spi_set_speed(priv); +} + +#ifndef CONFIG_DM_SPI + +struct omap3_spi_slave { + struct spi_slave slave; + struct omap3_spi_priv spi_priv; +}; + +struct omap3_spi_priv *priv; + +static inline struct omap3_spi_slave *to_omap3_spi(struct spi_slave *slave) +{ + return container_of(slave, struct omap3_spi_slave, slave); +} + +void spi_init(void) +{ + /* do nothing */ +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + + free(ds); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + _omap3_spi_claim_bus(priv); + _omap3_spi_set_wordlen(priv); + _omap3_spi_set_mode(priv); + _omap3_spi_set_speed(priv); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + /* Reset the SPI hardware */ + spi_reset(priv->regs); +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct omap3_spi_slave *ds; + struct mcspi *regs; + + /* + * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) + * with different number of chip selects (CS, channels): + * McSPI1 has 4 CS (bus 0, cs 0 - 3) + * McSPI2 has 2 CS (bus 1, cs 0 - 1) + * McSPI3 has 2 CS (bus 2, cs 0 - 1) + * McSPI4 has 1 CS (bus 3, cs 0) + */ + + switch (bus) { + case 0: + regs = (struct mcspi *)OMAP3_MCSPI1_BASE; + break; +#ifdef OMAP3_MCSPI2_BASE + case 1: + regs = (struct mcspi *)OMAP3_MCSPI2_BASE; + break; +#endif +#ifdef OMAP3_MCSPI3_BASE + case 2: + regs = (struct mcspi *)OMAP3_MCSPI3_BASE; + break; +#endif +#ifdef OMAP3_MCSPI4_BASE + case 3: + regs = (struct mcspi *)OMAP3_MCSPI4_BASE; + break; +#endif + default: + printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus); + return NULL; + } + + if (((bus == 0) && (cs > 3)) || + ((bus == 1) && (cs > 1)) || + ((bus == 2) && (cs > 1)) || + ((bus == 3) && (cs > 0))) { + printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus); + return NULL; + } + + if (max_hz > OMAP3_MCSPI_MAX_FREQ) { + printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 Mhz\n", max_hz); + return NULL; + } + + if (mode > SPI_MODE_3) { + printf("SPI error: unsupported SPI mode %i\n", mode); + return NULL; + } + + ds = spi_alloc_slave(struct omap3_spi_slave, bus, cs); + if (!ds) { + printf("SPI error: malloc of SPI structure failed\n"); + return NULL; + } + + priv = &ds->spi_priv; + + priv->regs = regs; + priv->cs = cs; + priv->freq = max_hz; + priv->mode = mode; + priv->wordlen = ds->slave.wordlen; +#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED + priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; +#endif + + return &ds->slave; +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ return _spi_xfer(priv, bitlen, dout, din, flags); } + +#else + +static int omap3_spi_claim_bus(struct udevice *dev) { - return 1; + struct udevice *bus = dev->parent; + struct omap3_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + + priv->cs = slave_plat->cs; + priv->mode = slave_plat->mode; + priv->freq = slave_plat->max_hz; + _omap3_spi_claim_bus(priv); + + return 0; } -void spi_cs_activate(struct spi_slave *slave) +static int omap3_spi_release_bus(struct udevice *dev) { + struct udevice *bus = dev->parent; + struct omap3_spi_priv *priv = dev_get_priv(bus); + + /* Reset the SPI hardware */ + spi_reset(priv->regs); + + return 0; } -void spi_cs_deactivate(struct spi_slave *slave) +static int omap3_spi_set_wordlen(struct udevice *dev, unsigned int wordlen) { + struct udevice *bus = dev->parent; + struct omap3_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + + priv->cs = slave_plat->cs; + priv->wordlen = wordlen; + _omap3_spi_set_wordlen(priv); + + return 0; } + +static int omap3_spi_probe(struct udevice *dev) +{ + struct omap3_spi_priv *priv = dev_get_priv(dev); + const void *blob = gd->fdt_blob; + int node = dev->of_offset; + + priv->regs = (struct mcspi *)dev_get_addr(dev); + priv->pin_dir = fdtdec_get_uint(blob, node, "ti,pindir-d0-out-d1-in", + MCSPI_PINDIR_D0_IN_D1_OUT); + priv->wordlen = SPI_DEFAULT_WORDLEN; + return 0; +} + +static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev->parent; + struct omap3_spi_priv *priv = dev_get_priv(bus); + + return _spi_xfer(priv, bitlen, dout, din, flags); +} + +static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed) +{ + return 0; +} + +static int omap3_spi_set_mode(struct udevice *bus, uint mode) +{ + return 0; +} + +static const struct dm_spi_ops omap3_spi_ops = { + .claim_bus = omap3_spi_claim_bus, + .release_bus = omap3_spi_release_bus, + .set_wordlen = omap3_spi_set_wordlen, + .xfer = omap3_spi_xfer, + .set_speed = omap3_spi_set_speed, + .set_mode = omap3_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id omap3_spi_ids[] = { + { .compatible = "ti,omap2-mcspi" }, + { .compatible = "ti,omap4-mcspi" }, + { } +}; + +U_BOOT_DRIVER(omap3_spi) = { + .name = "omap3_spi", + .id = UCLASS_SPI, + .of_match = omap3_spi_ids, + .probe = omap3_spi_probe, + .ops = &omap3_spi_ops, + .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), + .probe = omap3_spi_probe, +}; +#endif diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h deleted file mode 100644 index 6a07c6d9a1..0000000000 --- a/drivers/spi/omap3_spi.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Register definitions for the OMAP3 McSPI Controller - * - * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com> - * - * Parts taken from linux/drivers/spi/omap2_mcspi.c - * Copyright (C) 2005, 2006 Nokia Corporation - * - * Modified by Ruslan Araslanov <ruslan.araslanov@vitecmm.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _OMAP3_SPI_H_ -#define _OMAP3_SPI_H_ - -#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX) -#define OMAP3_MCSPI1_BASE 0x48030100 -#define OMAP3_MCSPI2_BASE 0x481A0100 -#else -#define OMAP3_MCSPI1_BASE 0x48098000 -#define OMAP3_MCSPI2_BASE 0x4809A000 -#define OMAP3_MCSPI3_BASE 0x480B8000 -#define OMAP3_MCSPI4_BASE 0x480BA000 -#endif - -#define OMAP3_MCSPI_MAX_FREQ 48000000 - -/* OMAP3 McSPI registers */ -struct mcspi_channel { - unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ - unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ - unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ - unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ - unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ -}; - -struct mcspi { - unsigned char res1[0x10]; - unsigned int sysconfig; /* 0x10 */ - unsigned int sysstatus; /* 0x14 */ - unsigned int irqstatus; /* 0x18 */ - unsigned int irqenable; /* 0x1C */ - unsigned int wakeupenable; /* 0x20 */ - unsigned int syst; /* 0x24 */ - unsigned int modulctrl; /* 0x28 */ - struct mcspi_channel channel[4]; /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ - /* channel1: 0x40 - 0x50, bus 0 & 1 */ - /* channel2: 0x54 - 0x64, bus 0 & 1 */ - /* channel3: 0x68 - 0x78, bus 0 */ -}; - -/* per-register bitmasks */ -#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) -#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) -#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) -#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) - -#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) - -#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) -#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) -#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) - -#define OMAP3_MCSPI_CHCONF_PHA BIT(0) -#define OMAP3_MCSPI_CHCONF_POL BIT(1) -#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) -#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) -#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) -#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) -#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) -#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) -#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) -#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) -#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) -#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) -#define OMAP3_MCSPI_CHCONF_IS BIT(18) -#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) -#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) - -#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) -#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) -#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) - -#define OMAP3_MCSPI_CHCTRL_EN BIT(0) -#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) - -#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) - -struct omap3_spi_slave { - struct spi_slave slave; - struct mcspi *regs; - unsigned int freq; - unsigned int mode; -}; - -static inline struct omap3_spi_slave *to_omap3_spi(struct spi_slave *slave) -{ - return container_of(slave, struct omap3_spi_slave, slave); -} - -int omap3_spi_txrx(struct spi_slave *slave, unsigned int len, const void *txp, - void *rxp, unsigned long flags); -int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp, - unsigned long flags); -int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp, - unsigned long flags); - -#endif /* _OMAP3_SPI_H_ */ diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index 3bb38c522c..7422e0a653 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -79,7 +79,8 @@ static int omap_timer_ofdata_to_platdata(struct udevice *dev) { struct omap_timer_priv *priv = dev_get_priv(dev); - priv->regs = (struct omap_gptimer_regs *)dev_get_addr(dev); + priv->regs = map_physmem(dev_get_addr(dev), + sizeof(struct omap_gptimer_regs), MAP_NOCACHE); return 0; } diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 382c0f2bd1..f8ddf93cf8 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -82,11 +82,9 @@ int notrace dm_timer_init(void) node = fdtdec_get_chosen_node(blob, "tick-timer"); if (node < 0) { /* No chosen timer, trying first available timer */ - ret = uclass_first_device(UCLASS_TIMER, &dev); + ret = uclass_first_device_err(UCLASS_TIMER, &dev); if (ret) return ret; - if (!dev) - return -ENODEV; } else { if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) { /* diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 832e90aea2..c8cc05e3c2 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -240,8 +240,7 @@ static int do_video_setcursor(cmd_tbl_t *cmdtp, int flag, int argc, if (argc != 3) return CMD_RET_USAGE; - uclass_first_device(UCLASS_VIDEO_CONSOLE, &dev); - if (!dev) + if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev)) return CMD_RET_FAILURE; col = simple_strtoul(argv[1], NULL, 10); row = simple_strtoul(argv[2], NULL, 10); @@ -259,8 +258,7 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc, if (argc != 2) return CMD_RET_USAGE; - uclass_first_device(UCLASS_VIDEO_CONSOLE, &dev); - if (!dev) + if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev)) return CMD_RET_FAILURE; for (s = argv[1]; *s; s++) vidconsole_put_char(dev, *s); |