summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/da8xx_gpio.c77
-rw-r--r--drivers/gpio/mpc83xx_gpio.c199
-rw-r--r--drivers/gpio/mvgpio.c74
-rw-r--r--drivers/gpio/mxc_gpio.c42
-rw-r--r--drivers/gpio/mxs_gpio.c42
-rw-r--r--drivers/gpio/s5p_gpio.c47
-rw-r--r--drivers/gpio/tegra2_gpio.c165
-rw-r--r--drivers/mmc/arm_pl180_mmci.c1
-rw-r--r--drivers/mmc/bfin_sdh.c1
-rw-r--r--drivers/mmc/davinci_mmc.c1
-rw-r--r--drivers/mmc/fsl_esdhc.c42
-rw-r--r--drivers/mmc/ftsdc010_esdhc.c189
-rw-r--r--drivers/mmc/gen_atmel_mci.c1
-rw-r--r--drivers/mmc/mmc.c32
-rw-r--r--drivers/mmc/mmc_spi.c1
-rw-r--r--drivers/mmc/mv_sdhci.c3
-rw-r--r--drivers/mmc/mxcmmc.c1
-rw-r--r--drivers/mmc/mxsmmc.c1
-rw-r--r--drivers/mmc/omap_hsmmc.c1
-rw-r--r--drivers/mmc/pxa_mmc_gen.c1
-rw-r--r--drivers/mmc/s5p_mmc.c1
-rw-r--r--drivers/mmc/sdhci.c1
-rw-r--r--drivers/mmc/sh_mmcif.c1
-rw-r--r--drivers/mmc/tegra2_mmc.c32
25 files changed, 612 insertions, 345 deletions
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index e22c09689d..4375a55267 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -37,6 +37,7 @@ COBJS-$(CONFIG_S5P) += s5p_gpio.o
COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o
COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
+COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 74b58e889f..84d2b77d92 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -23,7 +23,6 @@
#include <common.h>
#include <asm/io.h>
#include <asm/gpio.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
@@ -181,87 +180,93 @@ static const struct pinmux_config gpio_pinmux[] = {
{ pinmux(18), 8, 2 },
};
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MAX_NUM_GPIOS)
+ if (gpio >= MAX_NUM_GPIOS)
return -1;
- if (gpio_registry[gp].is_registered)
+ if (gpio_registry[gpio].is_registered)
return -1;
- gpio_registry[gp].is_registered = 1;
- strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE);
- gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0;
+ gpio_registry[gpio].is_registered = 1;
+ strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
+ gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1);
+ davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
- gpio_registry[gp].is_registered = 0;
-}
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
+ if (!gpio_registry[gpio].is_registered)
+ return -1;
+
+ gpio_registry[gpio].is_registered = 0;
+ gpio_registry[gpio].name[0] = '\0';
+ /* Do not configure as input or change pin mux here */
+ return 0;
}
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
- setbits_le32(&bank->dir, 1U << GPIO_BIT(gp));
+ bank = GPIO_BANK(gpio);
+ setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
- clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp));
- gpio_set_value(gp, value);
+ bank = GPIO_BANK(gpio);
+ clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
struct davinci_gpio *bank;
unsigned int ip;
- bank = GPIO_BANK(gp);
- ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp));
+ bank = GPIO_BANK(gpio);
+ ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
return ip ? 1 : 0;
}
-void gpio_set_value(int gp, int value)
+int gpio_set_value(unsigned gpio, int value)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
+ bank = GPIO_BANK(gpio);
if (value)
- bank->set_data = 1U << GPIO_BIT(gp);
+ bank->set_data = 1U << GPIO_BIT(gpio);
else
- bank->clr_data = 1U << GPIO_BIT(gp);
+ bank->clr_data = 1U << GPIO_BIT(gpio);
+
+ return 0;
}
void gpio_info(void)
{
- int gp, dir, val;
+ unsigned gpio, dir, val;
struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) {
- bank = GPIO_BANK(gp);
- dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp));
- val = gpio_get_value(gp);
+ for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
+ bank = GPIO_BANK(gpio);
+ dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
+ val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n",
- gp, dir ? " in" : "out", val,
- gpio_registry[gp].is_registered ? 'x' : ' ',
- gpio_registry[gp].name);
+ gpio, dir ? " in" : "out", val,
+ gpio_registry[gpio].is_registered ? 'x' : ' ',
+ gpio_registry[gpio].name);
}
}
diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c
new file mode 100644
index 0000000000..a9afcb2dd6
--- /dev/null
+++ b/drivers/gpio/mpc83xx_gpio.c
@@ -0,0 +1,199 @@
+/*
+ * Freescale MPC83xx GPIO handling.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc83xx.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
+#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
+#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
+#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
+#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE
+#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE
+#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0
+#endif
+
+static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS];
+
+/*
+ * Generic_GPIO primitives.
+ */
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ /* Do not set to input */
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an input */
+int gpio_direction_input(unsigned gpio)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ clrbits_be32(&im->gpio[ctrlr].dir, line_mask);
+
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an output, with polarity 'value' */
+int gpio_direction_output(unsigned gpio, int value)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ if (value != 0 && value != 1) {
+ printf("Error: Value parameter must be 0 or 1.\n");
+ return -1;
+ }
+
+ gpio_set_value(gpio, value);
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Make the line output */
+ setbits_be32(&im->gpio[ctrlr].dir, line_mask);
+
+ return 0;
+}
+
+/* read GPIO IN value of pin 'gpio' */
+int gpio_get_value(unsigned gpio)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Read the value and mask off the bit */
+ return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0;
+}
+
+/* write GPIO OUT value to pin 'gpio' */
+int gpio_set_value(unsigned gpio, int value)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ if (value != 0 && value != 1) {
+ printf("Error: Value parameter must be 0 or 1.\n");
+ return -1;
+ }
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Update the local output buffer soft copy */
+ gpio_output_value[ctrlr] =
+ (gpio_output_value[ctrlr] & ~line_mask) | \
+ (value ? line_mask : 0);
+
+ /* Write the output */
+ out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]);
+
+ return 0;
+}
+
+/* Configure GPIO registers early */
+void mpc83xx_gpio_init_f()
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+#if MPC83XX_GPIO_CTRLRS >= 1
+ out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION);
+ out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE);
+ out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */
+ out_be32(&im->gpio[0].imr, 0);
+ out_be32(&im->gpio[0].icr, 0);
+#endif
+
+#if MPC83XX_GPIO_CTRLRS >= 2
+ out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION);
+ out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE);
+ out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */
+ out_be32(&im->gpio[1].imr, 0);
+ out_be32(&im->gpio[1].icr, 0);
+#endif
+}
+
+/* Initialize GPIO soft-copies */
+void mpc83xx_gpio_init_r()
+{
+#if MPC83XX_GPIO_CTRLRS >= 1
+ gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE;
+#endif
+
+#if MPC83XX_GPIO_CTRLRS >= 2
+ gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE;
+#endif
+}
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
index 276f206ccd..c80891cd50 100644
--- a/drivers/gpio/mvgpio.c
+++ b/drivers/gpio/mvgpio.c
@@ -35,81 +35,79 @@
#define MV_MAX_GPIO 128
#endif
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO requested %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO requested %d\n", __func__, gpio);
+ return -1;
}
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ return 0;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
-}
-
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gcdr);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr);
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gsdr);
- gpio_set_value(gp, value);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gsdr);
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
struct gpio_reg *gpio_reg_bank;
- u32 gp_val;
+ u32 gpio_val;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- gp_val = readl(&gpio_reg_bank->gplr);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ gpio_val = readl(&gpio_reg_bank->gplr);
- return GPIO_VAL(gp, gp_val);
+ return GPIO_VAL(gpio, gpio_val);
}
-void gpio_set_value(int gp, int value)
+int gpio_set_value(unsigned gpio, int value)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
if (value)
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpsr);
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpsr);
else
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpcr);
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpcr);
+
+ return 0;
}
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 908808d50e..df6bbbbc4b 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -58,7 +58,7 @@ static int mxc_gpio_direction(unsigned int gpio,
u32 l;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
gpio &= 0x1f;
@@ -78,14 +78,14 @@ static int mxc_gpio_direction(unsigned int gpio,
return 0;
}
-void gpio_set_value(int gpio, int value)
+int gpio_set_value(unsigned gpio, int value)
{
unsigned int port = gpio >> 5;
struct gpio_regs *regs;
u32 l;
if (port >= ARRAY_SIZE(gpio_ports))
- return;
+ return -1;
gpio &= 0x1f;
@@ -97,55 +97,53 @@ void gpio_set_value(int gpio, int value)
else
l &= ~(1 << gpio);
writel(l, &regs->gpio_dr);
+
+ return 0;
}
-int gpio_get_value(int gpio)
+int gpio_get_value(unsigned gpio)
{
unsigned int port = gpio >> 5;
struct gpio_regs *regs;
- u32 l;
+ u32 val;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
gpio &= 0x1f;
regs = (struct gpio_regs *)gpio_ports[port];
- l = (readl(&regs->gpio_dr) >> gpio) & 0x01;
+ val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
- return l;
+ return val;
}
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- unsigned int port = gp >> 5;
+ unsigned int port = gpio >> 5;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ return 0;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
-}
-
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
- return mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_IN);
+ return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN);
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
- int ret = mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_OUT);
+ int ret = mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
if (ret < 0)
return ret;
- gpio_set_value(gp, value);
+ gpio_set_value(gpio, value);
return 0;
}
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 539738be9b..0365812c0a 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -69,68 +69,64 @@ void mxs_gpio_init(void)
}
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DIN(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- return (readl(&reg->reg) >> PAD_PIN(gp)) & 1;
+ return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
}
-void gpio_set_value(int gp, int value)
+void gpio_set_value(unsigned gpio, int value)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOUT(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
if (value)
- writel(1 << PAD_PIN(gp), &reg->reg_set);
+ writel(1 << PAD_PIN(gpio), &reg->reg_set);
else
- writel(1 << PAD_PIN(gp), &reg->reg_clr);
+ writel(1 << PAD_PIN(gpio), &reg->reg_clr);
}
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- writel(1 << PAD_PIN(gp), &reg->reg_clr);
+ writel(1 << PAD_PIN(gpio), &reg->reg_clr);
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- writel(1 << PAD_PIN(gp), &reg->reg_set);
+ writel(1 << PAD_PIN(gpio), &reg->reg_set);
- gpio_set_value(gp, value);
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (PAD_BANK(gp) >= PINCTRL_BANKS)
- return -EINVAL;
+ if (PAD_BANK(gpio) >= PINCTRL_BANKS)
+ return -1;
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
-}
-
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
+ return 0;
}
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 1edf9a26a2..47f3213927 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -20,7 +20,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#define CON_MASK(x) (0xf << ((x) << 2))
#define CON_SFR(x, v) ((v) << ((x) << 2))
@@ -142,46 +142,55 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
writel(value, &bank->drv);
}
-struct s5p_gpio_bank *s5p_gpio_get_bank(int nr)
+struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
{
- int bank = nr / GPIO_PER_BANK;
+ int bank = gpio / GPIO_PER_BANK;
bank *= sizeof(struct s5p_gpio_bank);
- return (struct s5p_gpio_bank *) (s5p_gpio_base(nr) + bank);
+ return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank);
}
-int s5p_gpio_get_pin(int nr)
+int s5p_gpio_get_pin(unsigned gpio)
{
- return nr % GPIO_PER_BANK;
+ return gpio % GPIO_PER_BANK;
}
-int gpio_request(int gpio, const char *label)
+/* Common GPIO API */
+
+int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
-int gpio_direction_input(int nr)
+int gpio_free(unsigned gpio)
{
- s5p_gpio_direction_input(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr));
return 0;
}
-int gpio_direction_output(int nr, int value)
+int gpio_direction_input(unsigned gpio)
{
- s5p_gpio_direction_output(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr), value);
+ s5p_gpio_direction_input(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio));
return 0;
}
-int gpio_get_value(int nr)
+int gpio_direction_output(unsigned gpio, int value)
{
- return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr));
+ s5p_gpio_direction_output(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio), value);
+ return 0;
}
-void gpio_set_value(int nr, int value)
+int gpio_get_value(unsigned gpio)
{
- s5p_gpio_set_value(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr), value);
+ return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio));
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ s5p_gpio_set_value(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio), value);
+
+ return 0;
}
diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c
index 22669b6160..70ca46fae5 100644
--- a/drivers/gpio/tegra2_gpio.c
+++ b/drivers/gpio/tegra2_gpio.c
@@ -49,188 +49,192 @@ static char *get_name(int i)
return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
}
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */
-static int get_config(int gp)
+/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
+static int get_config(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
- type = (u >> GPIO_BIT(gp)) & 1;
+ u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
+ type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type;
}
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */
-static void set_config(int gp, int type)
+/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
+static void set_config(unsigned gpio, int type)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_config: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
if (type) /* GPIO */
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_config[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_config[GPIO_PORT(gpio)]);
}
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */
-static int get_direction(int gp)
+/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */
+static int get_direction(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
- dir = (u >> GPIO_BIT(gp)) & 1;
+ u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
+ dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir;
}
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */
-static void set_direction(int gp, int output)
+/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
+static void set_direction(unsigned gpio, int output)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_direction: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
if (output)
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]);
}
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */
-static void set_level(int gp, int high)
+/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */
+static void set_level(unsigned gpio, int high)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_level: port = %d, bit %d == %d\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), high);
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
if (high)
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_out[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_out[GPIO_PORT(gpio)]);
}
/*
* Generic_GPIO primitives.
*/
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MAX_NUM_GPIOS)
+ if (gpio >= MAX_NUM_GPIOS)
return -1;
if (label != NULL) {
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
- gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
+ strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE);
+ gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
}
/* Configure as a GPIO */
- set_config(gp, 1);
+ set_config(gpio, 1);
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
+
+ gpio_names[gpio].name[0] = '\0';
+ /* Do not configure as input or change pin mux here */
+ return 0;
}
-/* read GPIO OUT value of pin 'gp' */
-static int gpio_get_output_value(int gp)
+/* read GPIO OUT value of pin 'gpio' */
+static int gpio_get_output_value(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
+ val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1;
+ return (val >> GPIO_BIT(gpio)) & 1;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_output_value(gp));
-}
-
-/* set GPIO pin 'gp' as an input */
-int gpio_direction_input(int gp)
+/* set GPIO pin 'gpio' as an input */
+int gpio_direction_input(unsigned gpio)
{
debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */
- set_direction(gp, 0);
+ set_direction(gpio, 0);
return 0;
}
-/* set GPIO pin 'gp' as an output, with polarity 'value' */
-int gpio_direction_output(int gp, int value)
+/* set GPIO pin 'gpio' as an output, with polarity 'value' */
+int gpio_direction_output(unsigned gpio, int value)
{
debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW");
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio),
+ value ? "HIGH" : "LOW");
/* Configure GPIO output value. */
- set_level(gp, value);
+ set_level(gpio, value);
/* Configure GPIO direction as output. */
- set_direction(gp, 1);
+ set_direction(gpio, 1);
return 0;
}
-/* read GPIO IN value of pin 'gp' */
-int gpio_get_value(int gp)
+/* read GPIO IN value of pin 'gpio' */
+int gpio_get_value(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]);
+ val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1;
+ return (val >> GPIO_BIT(gpio)) & 1;
}
-/* write GPIO OUT value to pin 'gp' */
-void gpio_set_value(int gp, int value)
+/* write GPIO OUT value to pin 'gpio' */
+int gpio_set_value(unsigned gpio, int value)
{
debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value);
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */
- set_level(gp, value);
+ set_level(gpio, value);
+
+ return 0;
}
/*
@@ -238,7 +242,8 @@ void gpio_set_value(int gp, int value)
*/
void gpio_info(void)
{
- int c, type;
+ unsigned c;
+ int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) {
type = get_config(c); /* GPIO, not SFPIO */
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index e6467a2d18..09d443ee39 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -385,6 +385,7 @@ static int arm_pl180_mmci_host_init(struct mmc *dev)
dev->send_cmd = host_request;
dev->set_ios = host_set_ios;
dev->init = mmc_host_reset;
+ dev->getcd = NULL;
dev->host_caps = 0;
dev->voltages = VOLTAGE_WINDOW_MMC;
dev->f_min = dev->clock;
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index bc9057fa9a..08fc5c1d3e 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -250,6 +250,7 @@ int bfin_mmc_init(bd_t *bis)
mmc->send_cmd = bfin_sdh_request;
mmc->set_ios = bfin_sdh_set_ios;
mmc->init = bfin_sdh_init;
+ mmc->getcd = NULL;
mmc->host_caps = MMC_MODE_4BIT;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index ce96736942..ee8f2614de 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -387,6 +387,7 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
mmc->send_cmd = dmmc_send_cmd;
mmc->set_ios = dmmc_set_ios;
mmc->init = dmmc_init;
+ mmc->getcd = NULL;
mmc->f_min = 200000;
mmc->f_max = 25000000;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index ec953f07d7..a2f35e3e99 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -58,7 +58,8 @@ struct fsl_esdhc {
uint autoc12err;
uint hostcapblt;
uint wml;
- char reserved1[8];
+ uint mixctrl;
+ char reserved1[4];
uint fevt;
char reserved2[168];
uint hostver;
@@ -113,7 +114,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
static void
esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
{
- struct fsl_esdhc *regs = mmc->priv;
+ struct fsl_esdhc_cfg *cfg = mmc->priv;
+ struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
uint blocks;
char *buffer;
uint databuf;
@@ -298,8 +300,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
/* Send the command */
esdhc_write32(&regs->cmdarg, cmd->cmdarg);
+#if defined(CONFIG_FSL_USDHC)
+ esdhc_write32(&regs->mixctrl,
+ (esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
+ esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000);
+#else
esdhc_write32(&regs->xfertyp, xfertyp);
-
+#endif
/* Wait for the command to complete */
while (!(esdhc_read32(&regs->irqstat) & IRQSTAT_CC))
;
@@ -412,8 +419,6 @@ static int esdhc_init(struct mmc *mmc)
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
int timeout = 1000;
- int ret = 0;
- u8 card_absent;
/* Reset the entire host controller */
esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
@@ -440,21 +445,19 @@ static int esdhc_init(struct mmc *mmc)
/* Set timout to the maximum value */
esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
- /* Check if there is a callback for detecting the card */
- if (board_mmc_getcd(&card_absent, mmc)) {
- timeout = 1000;
- while (!(esdhc_read32(&regs->prsstat) & PRSSTAT_CINS) &&
- --timeout)
- udelay(1000);
+ return 0;
+}
- if (timeout <= 0)
- ret = NO_CARD_ERR;
- } else {
- if (card_absent)
- ret = NO_CARD_ERR;
- }
+static int esdhc_getcd(struct mmc *mmc)
+{
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
+ int timeout = 1000;
+
+ while (!(esdhc_read32(&regs->prsstat) & PRSSTAT_CINS) && --timeout)
+ udelay(1000);
- return ret;
+ return timeout > 0;
}
static void esdhc_reset(struct fsl_esdhc *regs)
@@ -482,7 +485,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc = malloc(sizeof(struct mmc));
- sprintf(mmc->name, "FSL_ESDHC");
+ sprintf(mmc->name, "FSL_SDHC");
regs = (struct fsl_esdhc *)cfg->esdhc_base;
/* First reset the eSDHC controller */
@@ -492,6 +495,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->send_cmd = esdhc_send_cmd;
mmc->set_ios = esdhc_set_ios;
mmc->init = esdhc_init;
+ mmc->getcd = esdhc_getcd;
voltage_caps = 0;
caps = regs->hostcapblt;
diff --git a/drivers/mmc/ftsdc010_esdhc.c b/drivers/mmc/ftsdc010_esdhc.c
index e38dd87f18..f1702fe33b 100644
--- a/drivers/mmc/ftsdc010_esdhc.c
+++ b/drivers/mmc/ftsdc010_esdhc.c
@@ -90,8 +90,13 @@ static void ftsdc010_pio_read(struct mmc_host *host, char *buf, unsigned int siz
while (size) {
status = readl(&host->reg->status);
+ debug("%s: size: %08x\n", __func__, size);
if (status & FTSDC010_STATUS_FIFO_ORUN) {
+
+ debug("%s: FIFO OVERRUN: sta: %08x\n",
+ __func__, status);
+
fifo = host->fifo_len > size ?
size : host->fifo_len;
@@ -146,7 +151,7 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
while (size) {
status = readl(&host->reg->status);
- if (status & FTSDC010_STATUS_FIFO_ORUN) {
+ if (status & FTSDC010_STATUS_FIFO_URUN) {
fifo = host->fifo_len > size ?
size : host->fifo_len;
@@ -158,7 +163,6 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
writel(*ptr, &host->reg->dwr);
ptr++;
}
-
} else {
udelay(1);
if (++retry >= FTSDC010_PIO_RETRY) {
@@ -169,56 +173,19 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
}
}
-static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
+static int ftsdc010_check_rsp(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
struct mmc_host *host = mmc->priv;
-
unsigned int sta, clear;
- unsigned int i;
-
- /* check response and hardware status */
- clear = 0;
-
- /* chech CMD_SEND */
- for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
- sta = readl(&host->reg->status);
- /* Command Complete */
- if (sta & FTSDC010_STATUS_CMD_SEND) {
- if (!data)
- clear |= FTSDC010_CLR_CMD_SEND;
- break;
- }
- }
-
- if (i > FTSDC010_CMD_RETRY) {
- printf("%s: send command timeout\n", __func__);
- return TIMEOUT;
- }
-
- /* debug: print status register and command index*/
- debug("sta: %08x cmd %d\n", sta, cmd->cmdidx);
- /* handle data FIFO */
- if ((sta & FTSDC010_STATUS_FIFO_ORUN) ||
- (sta & FTSDC010_STATUS_FIFO_URUN)) {
-
- /* Wrong DATA FIFO Flag */
- if (data == NULL)
- printf("%s, data fifo wrong: sta: %08x cmd %d\n",
- __func__, sta, cmd->cmdidx);
-
- if (sta & FTSDC010_STATUS_FIFO_ORUN)
- clear |= FTSDC010_STATUS_FIFO_ORUN;
- if (sta & FTSDC010_STATUS_FIFO_URUN)
- clear |= FTSDC010_STATUS_FIFO_URUN;
- }
+ sta = readl(&host->reg->status);
+ debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
/* check RSP TIMEOUT or FAIL */
if (sta & FTSDC010_STATUS_RSP_TIMEOUT) {
/* RSP TIMEOUT */
- debug("%s: RSP timeout: sta: %08x cmd %d\n",
- __func__, sta, cmd->cmdidx);
+ debug("%s: RSP timeout: sta: %08x\n", __func__, sta);
clear |= FTSDC010_CLR_RSP_TIMEOUT;
writel(clear, &host->reg->clr);
@@ -226,47 +193,62 @@ static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
return TIMEOUT;
} else if (sta & FTSDC010_STATUS_RSP_CRC_FAIL) {
/* clear response fail bit */
- debug("%s: RSP CRC FAIL: sta: %08x cmd %d\n",
- __func__, sta, cmd->cmdidx);
+ debug("%s: RSP CRC FAIL: sta: %08x\n", __func__, sta);
clear |= FTSDC010_CLR_RSP_CRC_FAIL;
writel(clear, &host->reg->clr);
- return 0;
+ return COMM_ERR;
} else if (sta & FTSDC010_STATUS_RSP_CRC_OK) {
/* clear response CRC OK bit */
clear |= FTSDC010_CLR_RSP_CRC_OK;
}
+ writel(clear, &host->reg->clr);
+ return 0;
+}
+
+static int ftsdc010_check_data(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct mmc_host *host = mmc->priv;
+ unsigned int sta, clear;
+
+ sta = readl(&host->reg->status);
+ debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
+
/* check DATA TIMEOUT or FAIL */
if (data) {
+
+ /* Transfer Complete */
+ if (sta & FTSDC010_STATUS_DATA_END)
+ clear |= FTSDC010_STATUS_DATA_END;
+
+ /* Data CRC_OK */
+ if (sta & FTSDC010_STATUS_DATA_CRC_OK)
+ clear |= FTSDC010_STATUS_DATA_CRC_OK;
+
+ /* DATA TIMEOUT or DATA CRC FAIL */
if (sta & FTSDC010_STATUS_DATA_TIMEOUT) {
/* DATA TIMEOUT */
- debug("%s: DATA TIMEOUT: sta: %08x\n",
- __func__, sta);
+ debug("%s: DATA TIMEOUT: sta: %08x\n", __func__, sta);
clear |= FTSDC010_STATUS_DATA_TIMEOUT;
- writel(sta, &host->reg->clr);
+ writel(clear, &host->reg->clr);
+
return TIMEOUT;
} else if (sta & FTSDC010_STATUS_DATA_CRC_FAIL) {
- /* Error Interrupt */
- debug("%s: DATA CRC FAIL: sta: %08x\n",
- __func__, sta);
+ /* DATA CRC FAIL */
+ debug("%s: DATA CRC FAIL: sta: %08x\n", __func__, sta);
clear |= FTSDC010_STATUS_DATA_CRC_FAIL;
writel(clear, &host->reg->clr);
- return 0;
- } else if (sta & FTSDC010_STATUS_DATA_END) {
- /* Transfer Complete */
- clear |= FTSDC010_STATUS_DATA_END;
+ return COMM_ERR;
}
+ writel(clear, &host->reg->clr);
}
-
- /* transaction is success and clear status register */
- writel(clear, &host->reg->clr);
-
return 0;
}
@@ -281,6 +263,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
unsigned int ccon;
unsigned int mask, tmpmask;
unsigned int ret;
+ unsigned int sta, i;
+
+ ret = 0;
if (data)
mask = FTSDC010_INT_MASK_RSP_TIMEOUT;
@@ -290,13 +275,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
mask = FTSDC010_INT_MASK_CMD_SEND;
/* write argu reg */
- debug("%s: cmd->arg: %08x\n", __func__, cmd->cmdarg);
+ debug("%s: argu: %08x\n", __func__, host->reg->argu);
writel(cmd->cmdarg, &host->reg->argu);
- /* setup cmd reg */
- debug("cmd: %d\n", cmd->cmdidx);
- debug("resp: %08x\n", cmd->resp_type);
-
/* setup commnad */
ccon = FTSDC010_CMD_IDX(cmd->cmdidx);
@@ -340,7 +321,51 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
/* write cmd reg */
debug("%s: ccon: %08x\n", __func__, ccon);
writel(ccon, &host->reg->cmd);
- udelay(4*FTSDC010_DELAY_UNIT);
+
+ /* check CMD_SEND */
+ for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
+ /*
+ * If we read status register too fast
+ * will lead hardware error and the RSP_TIMEOUT
+ * flag will be raised incorrectly.
+ */
+ udelay(16*FTSDC010_DELAY_UNIT);
+ sta = readl(&host->reg->status);
+
+ /* Command Complete */
+ /*
+ * Note:
+ * Do not clear FTSDC010_CLR_CMD_SEND flag.
+ * (by writing FTSDC010_CLR_CMD_SEND bit to clear register)
+ * It will make the driver becomes very slow.
+ * If the operation hasn't been finished, hardware will
+ * clear this bit automatically.
+ * In origin, the driver will clear this flag if there is
+ * no data need to be read.
+ */
+ if (sta & FTSDC010_STATUS_CMD_SEND)
+ break;
+ }
+
+ if (i > FTSDC010_CMD_RETRY) {
+ printf("%s: send command timeout\n", __func__);
+ return TIMEOUT;
+ }
+
+ /* check rsp status */
+ ret = ftsdc010_check_rsp(mmc, cmd, data);
+ if (ret)
+ return ret;
+
+ /* read response if we have RSP_OK */
+ if (ccon & FTSDC010_CMD_LONG_RSP) {
+ cmd->response[0] = readl(&host->reg->rsp3);
+ cmd->response[1] = readl(&host->reg->rsp2);
+ cmd->response[2] = readl(&host->reg->rsp1);
+ cmd->response[3] = readl(&host->reg->rsp0);
+ } else {
+ cmd->response[0] = readl(&host->reg->rsp0);
+ }
/* read/write data */
if (data && (data->flags & MMC_DATA_READ)) {
@@ -351,19 +376,11 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
data->blocksize * data->blocks);
}
- /* pio check response status */
- ret = ftsdc010_pio_check_status(mmc, cmd, data);
- if (!ret) {
- /* if it is long response */
- if (ccon & FTSDC010_CMD_LONG_RSP) {
- cmd->response[0] = readl(&host->reg->rsp3);
- cmd->response[1] = readl(&host->reg->rsp2);
- cmd->response[2] = readl(&host->reg->rsp1);
- cmd->response[3] = readl(&host->reg->rsp0);
-
- } else {
- cmd->response[0] = readl(&host->reg->rsp0);
- }
+ /* check data status */
+ if (data) {
+ ret = ftsdc010_check_data(mmc, cmd, data);
+ if (ret)
+ return ret;
}
udelay(FTSDC010_DELAY_UNIT);
@@ -431,8 +448,6 @@ static int ftsdc010_setup_data(struct mmc *mmc, struct mmc_data *data)
/* always reset fifo since last transfer may fail */
dcon |= FTSDC010_DCR_FIFO_RST;
- /* handle sdio */
- dcon = data->blocksize | data->blocks << 15;
if (data->blocks > 1)
dcon |= FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE;
#endif
@@ -497,7 +512,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
{
struct mmc_host *host = mmc->priv;
unsigned char clk_div;
- unsigned char real_rate;
+ unsigned int real_rate;
unsigned int clock;
debug("%s: mmc_set_clock: %x\n", __func__, mmc->clock);
@@ -518,7 +533,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
break;
}
- debug("%s: computed real_rete: %x, clk_div: %x\n",
+ debug("%s: computed real_rate: %x, clk_div: %x\n",
__func__, real_rate, clk_div);
if (clk_div > 127)
@@ -579,6 +594,7 @@ static void ftsdc010_set_ios(struct mmc *mmc)
static void ftsdc010_reset(struct mmc_host *host)
{
unsigned int timeout;
+ unsigned int sta;
/* Do SDC_RST: Software reset for all register */
writel(FTSDC010_CMD_SDC_RST, &host->reg->cmd);
@@ -598,6 +614,10 @@ static void ftsdc010_reset(struct mmc_host *host)
timeout--;
udelay(10*FTSDC010_DELAY_UNIT);
}
+
+ sta = readl(&host->reg->status);
+ if (sta & FTSDC010_STATUS_CARD_CHANGE)
+ writel(FTSDC010_CLR_CARD_CHANGE, &host->reg->clr);
}
static int ftsdc010_core_init(struct mmc *mmc)
@@ -645,13 +665,12 @@ int ftsdc010_mmc_init(int dev_index)
mmc->send_cmd = ftsdc010_request;
mmc->set_ios = ftsdc010_set_ios;
mmc->init = ftsdc010_core_init;
+ mmc->getcd = NULL;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
- mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-
mmc->f_min = CONFIG_SYS_CLK_FREQ / 2 / (2*128);
mmc->f_max = CONFIG_SYS_CLK_FREQ / 2 / 2;
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index f346b244be..4968c5e491 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -337,6 +337,7 @@ int atmel_mci_init(void *regs)
mmc->send_cmd = mci_send_cmd;
mmc->set_ios = mci_set_ios;
mmc->init = mci_init;
+ mmc->getcd = NULL;
/* need to be able to pass these in on a board by board basis */
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 21665ecc5b..6db37b1fc5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -40,11 +40,11 @@
static struct list_head mmc_devices;
static int cur_dev_num = -1;
-int __board_mmc_getcd(u8 *cd, struct mmc *mmc) {
+int __board_mmc_getcd(struct mmc *mmc) {
return -1;
}
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak,
+int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
alias("__board_mmc_getcd")));
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
@@ -674,6 +674,18 @@ int mmc_switch_part(int dev_num, unsigned int part_num)
| (part_num & PART_ACCESS_MASK));
}
+int mmc_getcd(struct mmc *mmc)
+{
+ int cd;
+
+ cd = board_mmc_getcd(mmc);
+
+ if ((cd < 0) && mmc->getcd)
+ cd = mmc->getcd(mmc);
+
+ return cd;
+}
+
int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
{
struct mmc_cmd cmd;
@@ -785,6 +797,16 @@ retry_scr:
if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
return 0;
+ /*
+ * If the host doesn't support SD_HIGHSPEED, do not switch card to
+ * HIGHSPEED mode even if the card support SD_HIGHSPPED.
+ * This can avoid furthur problem when the card runs in different
+ * mode between the host.
+ */
+ if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
+ (mmc->host_caps & MMC_MODE_HS)))
+ return 0;
+
err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
if (err)
@@ -1192,6 +1214,12 @@ int mmc_init(struct mmc *mmc)
{
int err;
+ if (mmc_getcd(mmc) == 0) {
+ mmc->has_init = 0;
+ printf("MMC: no card present\n");
+ return NO_CARD_ERR;
+ }
+
if (mmc->has_init)
return 0;
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index 49fb9e02a9..de43a85355 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -272,6 +272,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
mmc->send_cmd = mmc_spi_request;
mmc->set_ios = mmc_spi_set_ios;
mmc->init = mmc_spi_init_p;
+ mmc->getcd = NULL;
mmc->host_caps = MMC_MODE_SPI;
mmc->voltages = MMC_SPI_VOLTAGE;
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
index 1501974e2f..2fe34b6993 100644
--- a/drivers/mmc/mv_sdhci.c
+++ b/drivers/mmc/mv_sdhci.c
@@ -44,8 +44,7 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
host->quirks = quirks;
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
memset(&mv_ops, 0, sizeof(struct sdhci_ops));
- if (mv_sdhci_writeb != NULL)
- mv_ops.write_b = mv_sdhci_writeb;
+ mv_ops.write_b = mv_sdhci_writeb;
host->ops = &mv_ops;
#endif
if (quirks & SDHCI_QUIRK_REG32_RW)
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index ab1fc82fbb..8afb22159a 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -500,6 +500,7 @@ static int mxcmci_initialize(bd_t *bis)
mmc->send_cmd = mxcmci_request;
mmc->set_ios = mxcmci_set_ios;
mmc->init = mxcmci_init;
+ mmc->getcd = NULL;
mmc->host_caps = MMC_MODE_4BIT;
host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE;
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 2a9949eb94..5f87a1efd6 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -329,6 +329,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
mmc->send_cmd = mxsmmc_send_cmd;
mmc->set_ios = mxsmmc_set_ios;
mmc->init = mxsmmc_init;
+ mmc->getcd = NULL;
mmc->priv = priv;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index c38b9e6038..ef64e37411 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -472,6 +472,7 @@ int omap_mmc_init(int dev_index)
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_init_setup;
+ mmc->getcd = NULL;
switch (dev_index) {
case 0:
diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c
index 4a7c67a6bd..2c5bf17bb3 100644
--- a/drivers/mmc/pxa_mmc_gen.c
+++ b/drivers/mmc/pxa_mmc_gen.c
@@ -411,6 +411,7 @@ int pxa_mmc_register(int card_index)
mmc->send_cmd = pxa_mmc_request;
mmc->set_ios = pxa_mmc_set_ios;
mmc->init = pxa_mmc_init;
+ mmc->getcd = NULL;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->f_max = PXAMMC_MAX_SPEED;
diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c
index 7786ecf2be..4ae3aaf773 100644
--- a/drivers/mmc/s5p_mmc.c
+++ b/drivers/mmc/s5p_mmc.c
@@ -463,6 +463,7 @@ static int s5p_mmc_initialize(int dev_index, int bus_width)
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_core_init;
+ mmc->getcd = NULL;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
if (bus_width == 8)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index fce0ef0911..fc904b5308 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -390,6 +390,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
mmc->send_cmd = sdhci_send_command;
mmc->set_ios = sdhci_set_ios;
mmc->init = sdhci_init;
+ mmc->getcd = NULL;
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
#ifdef CONFIG_MMC_SDMA
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 567e2cb61d..2835e242f8 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -598,6 +598,7 @@ int mmcif_mmc_init(void)
mmc->send_cmd = sh_mmcif_request;
mmc->set_ios = sh_mmcif_set_ios;
mmc->init = sh_mmcif_init;
+ mmc->getcd = NULL;
host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
host->clk = CONFIG_SH_MMCIF_CLK;
mmc->priv = host;
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 035a8687df..5b4c9f69a1 100644
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -474,6 +474,18 @@ static int mmc_core_init(struct mmc *mmc)
return 0;
}
+int tegra2_mmc_getcd(struct mmc *mmc)
+{
+ struct mmc_host *host = (struct mmc_host *)mmc->priv;
+
+ debug("tegra2_mmc_getcd called\n");
+
+ if (host->cd_gpio >= 0)
+ return !gpio_get_value(host->cd_gpio);
+
+ return 1;
+}
+
int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
{
struct mmc_host *host;
@@ -512,6 +524,7 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_core_init;
+ mmc->getcd = tegra2_mmc_getcd;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
if (bus_width == 8)
@@ -535,22 +548,3 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
return 0;
}
-
-/* this is a weak define that we are overriding */
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
-{
- struct mmc_host *host = (struct mmc_host *)mmc->priv;
-
- debug("board_mmc_getcd called\n");
-
- *cd = 1; /* Assume card is inserted, or eMMC */
-
- if (IS_SD(mmc)) {
- if (host->cd_gpio >= 0) {
- if (gpio_get_value(host->cd_gpio))
- *cd = 0;
- }
- }
-
- return 0;
-}
generated by cgit (git 2.34.1) at 2025-01-01 17:51:02 +0000