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-rw-r--r--drivers/Makefile3
-rw-r--r--drivers/dfu/Makefile12
-rw-r--r--drivers/misc/i2c_eeprom.c1
-rw-r--r--drivers/mmc/fsl_esdhc.c43
-rw-r--r--drivers/mmc/hi6220_dw_mmc.c1
-rw-r--r--drivers/mmc/mtk-sd.c26
-rw-r--r--drivers/pinctrl/meson/Kconfig1
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c10
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c10
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.c101
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h8
-rw-r--r--drivers/serial/serial_arc.c1
-rw-r--r--drivers/usb/gadget/Makefile2
13 files changed, 189 insertions, 30 deletions
diff --git a/drivers/Makefile b/drivers/Makefile
index 4105864e2b..eca023ac04 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/
obj-$(CONFIG_$(SPL_TPL_)GPIO_SUPPORT) += gpio/
obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
@@ -50,7 +51,6 @@ obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
-obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu/
obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/
obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/
obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
@@ -86,7 +86,6 @@ obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_NVME) += nvme/
obj-y += pcmcia/
-obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += phy/allwinner/
obj-y += phy/marvell/
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index 56f9b0c5f4..4164f342ac 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -3,9 +3,9 @@
# Copyright (C) 2012 Samsung Electronics
# Lukasz Majewski <l.majewski@samsung.com>
-obj-$(CONFIG_DFU) += dfu.o
-obj-$(CONFIG_DFU_MMC) += dfu_mmc.o
-obj-$(CONFIG_DFU_NAND) += dfu_nand.o
-obj-$(CONFIG_DFU_RAM) += dfu_ram.o
-obj-$(CONFIG_DFU_SF) += dfu_sf.o
-obj-$(CONFIG_DFU_TFTP) += dfu_tftp.o
+obj-$(CONFIG_$(SPL_)DFU) += dfu.o
+obj-$(CONFIG_$(SPL_)DFU_MMC) += dfu_mmc.o
+obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
+obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
+obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
+obj-$(CONFIG_$(SPL_)DFU_TFTP) += dfu_tftp.o
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 243e7ae5ab..29ad87c1d7 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -69,6 +69,7 @@ static const struct udevice_id i2c_eeprom_std_ids[] = {
{ .compatible = "atmel,24c01a", .data = 3 },
{ .compatible = "atmel,24c02", .data = 3 },
{ .compatible = "atmel,24c04", .data = 4 },
+ { .compatible = "atmel,24c08", .data = 4 },
{ .compatible = "atmel,24c08a", .data = 4 },
{ .compatible = "atmel,24c16a", .data = 4 },
{ .compatible = "atmel,24mac402", .data = 4 },
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 2fa61c4259..21fa2ab1d4 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -384,6 +384,25 @@ static void check_and_invalidate_dcache_range
invalidate_dcache_range(start, end);
}
+#ifdef CONFIG_MCF5441x
+/*
+ * Swaps 32-bit words to little-endian byte order.
+ */
+static inline void sd_swap_dma_buff(struct mmc_data *data)
+{
+ int i, size = data->blocksize >> 2;
+ u32 *buffer = (u32 *)data->dest;
+ u32 sw;
+
+ while (data->blocks--) {
+ for (i = 0; i < size; i++) {
+ sw = __sw32(*buffer);
+ *buffer++ = sw;
+ }
+ }
+}
+#endif
+
/*
* Sends a command out on the bus. Takes the mmc pointer,
* a command pointer, and an optional data pointer.
@@ -546,8 +565,12 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
* cache-fill during the DMA operations such as the
* speculative pre-fetching etc.
*/
- if (data->flags & MMC_DATA_READ)
+ if (data->flags & MMC_DATA_READ) {
check_and_invalidate_dcache_range(cmd, data);
+#ifdef CONFIG_MCF5441x
+ sd_swap_dma_buff(data);
+#endif
+ }
#endif
}
@@ -1029,8 +1052,12 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
+#ifdef CONFIG_MCF5441x
+ esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD);
+#else
/* Put the PROCTL reg back to the default */
esdhc_write32(&regs->proctl, PROCTL_INIT);
+#endif
/* Set timout to the maximum value */
esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@ -1138,6 +1165,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
if (ret)
return ret;
+#ifdef CONFIG_MCF5441x
+ /* ColdFire, using SDHC_DATA[3] for card detection */
+ esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD);
+#endif
+
#ifndef CONFIG_FSL_USDHC
esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
| SYSCTL_IPGEN | SYSCTL_CKEN);
@@ -1162,6 +1194,15 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
voltage_caps = 0;
caps = esdhc_read32(&regs->hostcapblt);
+#ifdef CONFIG_MCF5441x
+ /*
+ * MCF5441x RM declares in more points that sdhc clock speed must
+ * never exceed 25 Mhz. From this, the HS bit needs to be disabled
+ * from host capabilities.
+ */
+ caps &= ~ESDHC_HOSTCAPBLT_HSS;
+#endif
+
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index cc58aff38c..effd1e4c7c 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -77,6 +77,7 @@ static int hi6220_dwmmc_bind(struct udevice *dev)
static const struct udevice_id hi6220_dwmmc_ids[] = {
{ .compatible = "hisilicon,hi6220-dw-mshc" },
+ { .compatible = "hisilicon,hi3798cv200-dw-mshc" },
{ }
};
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index 0741a525c0..d3f0778368 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -269,7 +269,7 @@ struct msdc_host {
bool builtin_cd;
/* card detection / write protection GPIOs */
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
struct gpio_desc gpio_wp;
struct gpio_desc gpio_cd;
#endif
@@ -554,6 +554,14 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size)
break;
}
+ chksz = min(size, (u32)MSDC_FIFO_SIZE);
+
+ if (msdc_fifo_rx_bytes(host) >= chksz) {
+ msdc_fifo_read(host, ptr, chksz);
+ ptr += chksz;
+ size -= chksz;
+ }
+
if (status & MSDC_INT_XFER_COMPL) {
if (size) {
pr_err("data not fully read\n");
@@ -562,15 +570,7 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size)
break;
}
-
- chksz = min(size, (u32)MSDC_FIFO_SIZE);
-
- if (msdc_fifo_rx_bytes(host) >= chksz) {
- msdc_fifo_read(host, ptr, chksz);
- ptr += chksz;
- size -= chksz;
- }
- }
+}
return ret;
}
@@ -849,7 +849,7 @@ static int msdc_ops_get_cd(struct udevice *dev)
return !(val & MSDC_PS_CDSTS);
}
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
if (!host->gpio_cd.dev)
return 1;
@@ -861,9 +861,9 @@ static int msdc_ops_get_cd(struct udevice *dev)
static int msdc_ops_get_wp(struct udevice *dev)
{
+#if IS_ENABLED(DM_GPIO)
struct msdc_host *host = dev_get_priv(dev);
-#ifdef CONFIG_DM_GPIO
if (!host->gpio_wp.dev)
return 0;
@@ -1332,7 +1332,7 @@ static int msdc_ofdata_to_platdata(struct udevice *dev)
if (ret < 0)
return ret;
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
gpio_request_by_name(dev, "wp-gpios", 0, &host->gpio_wp, GPIOD_IS_IN);
gpio_request_by_name(dev, "cd-gpios", 0, &host->gpio_cd, GPIOD_IS_IN);
#endif
diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig
index ee820a57a0..162642d728 100644
--- a/drivers/pinctrl/meson/Kconfig
+++ b/drivers/pinctrl/meson/Kconfig
@@ -2,6 +2,7 @@ if ARCH_MESON
config PINCTRL_MESON
select PINCTRL_GENERIC
+ select PINCONF
bool
config PINCTRL_MESON_GX_PMX
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index c82413d08f..f23b188f2f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -93,6 +93,12 @@ static int meson_axg_pinmux_group_set(struct udevice *dev,
return 0;
}
+const struct pinconf_param meson_axg_pinconf_params[] = {
+ { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+ { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+ { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+};
+
const struct pinctrl_ops meson_axg_pinctrl_ops = {
.get_groups_count = meson_pinctrl_get_groups_count,
.get_group_name = meson_pinctrl_get_group_name,
@@ -100,6 +106,10 @@ const struct pinctrl_ops meson_axg_pinctrl_ops = {
.get_function_name = meson_pinmux_get_function_name,
.pinmux_group_set = meson_axg_pinmux_group_set,
.set_state = pinctrl_generic_set_state,
+ .pinconf_params = meson_axg_pinconf_params,
+ .pinconf_num_params = ARRAY_SIZE(meson_axg_pinconf_params),
+ .pinconf_set = meson_pinconf_set,
+ .pinconf_group_set = meson_pinconf_group_set,
};
static int meson_axg_gpio_request(struct udevice *dev,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
index fc1538ea71..cf72576b6c 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
@@ -72,6 +72,12 @@ static int meson_gx_pinmux_group_set(struct udevice *dev,
return 0;
}
+const struct pinconf_param meson_gx_pinconf_params[] = {
+ { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+ { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+ { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+};
+
const struct pinctrl_ops meson_gx_pinctrl_ops = {
.get_groups_count = meson_pinctrl_get_groups_count,
.get_group_name = meson_pinctrl_get_group_name,
@@ -79,6 +85,10 @@ const struct pinctrl_ops meson_gx_pinctrl_ops = {
.get_function_name = meson_pinmux_get_function_name,
.pinmux_group_set = meson_gx_pinmux_group_set,
.set_state = pinctrl_generic_set_state,
+ .pinconf_params = meson_gx_pinconf_params,
+ .pinconf_num_params = ARRAY_SIZE(meson_gx_pinconf_params),
+ .pinconf_set = meson_pinconf_set,
+ .pinconf_group_set = meson_pinconf_group_set,
};
static const struct dm_gpio_ops meson_gx_gpio_ops = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index b539749752..fa3d78858a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -57,7 +57,7 @@ static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset,
enum meson_reg_type reg_type,
unsigned int *reg, unsigned int *bit)
{
- struct meson_pinctrl *priv = dev_get_priv(dev->parent);
+ struct meson_pinctrl *priv = dev_get_priv(dev);
struct meson_bank *bank = NULL;
struct meson_reg_desc *desc;
unsigned int pin;
@@ -89,7 +89,8 @@ int meson_gpio_get(struct udevice *dev, unsigned int offset)
unsigned int reg, bit;
int ret;
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_IN, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_IN, &reg,
+ &bit);
if (ret)
return ret;
@@ -102,7 +103,8 @@ int meson_gpio_set(struct udevice *dev, unsigned int offset, int value)
unsigned int reg, bit;
int ret;
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, &reg,
+ &bit);
if (ret)
return ret;
@@ -117,7 +119,8 @@ int meson_gpio_get_direction(struct udevice *dev, unsigned int offset)
unsigned int reg, bit, val;
int ret;
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg,
+ &bit);
if (ret)
return ret;
@@ -132,7 +135,8 @@ int meson_gpio_direction_input(struct udevice *dev, unsigned int offset)
unsigned int reg, bit;
int ret;
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg,
+ &bit);
if (ret)
return ret;
@@ -148,13 +152,15 @@ int meson_gpio_direction_output(struct udevice *dev,
unsigned int reg, bit;
int ret;
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg,
+ &bit);
if (ret)
return ret;
clrbits_le32(priv->reg_gpio + reg, BIT(bit));
- ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, &reg, &bit);
+ ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, &reg,
+ &bit);
if (ret)
return ret;
@@ -163,6 +169,72 @@ int meson_gpio_direction_output(struct udevice *dev,
return 0;
}
+static int meson_pinconf_bias_set(struct udevice *dev, unsigned int pin,
+ unsigned int param)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+ unsigned int offset = pin - priv->data->pin_base;
+ unsigned int reg, bit;
+ int ret;
+
+ ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULLEN, &reg, &bit);
+ if (ret)
+ return ret;
+
+ if (param == PIN_CONFIG_BIAS_DISABLE) {
+ clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 0);
+ return 0;
+ }
+
+ /* othewise, enable the bias and select level */
+ clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 1);
+ ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULL, &reg, &bit);
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(priv->reg_pull + reg, BIT(bit),
+ param == PIN_CONFIG_BIAS_PULL_UP);
+
+ return 0;
+}
+
+int meson_pinconf_set(struct udevice *dev, unsigned int pin,
+ unsigned int param, unsigned int arg)
+{
+ int ret;
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_PULL_UP:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ ret = meson_pinconf_bias_set(dev, pin, param);
+ break;
+
+ default:
+ dev_err(dev, "unsupported configuration parameter %u\n", param);
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+int meson_pinconf_group_set(struct udevice *dev,
+ unsigned int group_selector,
+ unsigned int param, unsigned int arg)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+ struct meson_pmx_group *grp = &priv->data->groups[group_selector];
+ int i, ret;
+
+ for (i = 0; i < grp->num_pins; i++) {
+ ret = meson_pinconf_set(dev, grp->pins[i], param, arg);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
int meson_gpio_probe(struct udevice *dev)
{
struct meson_pinctrl *priv = dev_get_priv(dev->parent);
@@ -240,6 +312,21 @@ int meson_pinctrl_probe(struct udevice *dev)
return -EINVAL;
}
priv->reg_gpio = (void __iomem *)addr;
+
+ addr = parse_address(gpio, "pull", na, ns);
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("pull address not found\n");
+ return -EINVAL;
+ }
+ priv->reg_pull = (void __iomem *)addr;
+
+ addr = parse_address(gpio, "pull-enable", na, ns);
+ /* Use pull region if pull-enable one is not present */
+ if (addr == FDT_ADDR_T_NONE)
+ priv->reg_pullen = priv->reg_pull;
+ else
+ priv->reg_pullen = (void __iomem *)addr;
+
priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev);
/* Lookup GPIO driver */
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index bdee721fc0..28085a7495 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -39,6 +39,8 @@ struct meson_pinctrl {
struct meson_pinctrl_data *data;
void __iomem *reg_mux;
void __iomem *reg_gpio;
+ void __iomem *reg_pull;
+ void __iomem *reg_pullen;
};
/**
@@ -130,4 +132,10 @@ int meson_gpio_direction_output(struct udevice *dev, unsigned int offset,
int value);
int meson_gpio_probe(struct udevice *dev);
+int meson_pinconf_set(struct udevice *dev, unsigned int pin,
+ unsigned int param, unsigned int arg);
+int meson_pinconf_group_set(struct udevice *dev,
+ unsigned int group_selector,
+ unsigned int param, unsigned int arg);
+
#endif /* __PINCTRL_MESON_H__ */
diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c
index 980b38d2a1..70dbc6d6b5 100644
--- a/drivers/serial/serial_arc.c
+++ b/drivers/serial/serial_arc.c
@@ -126,6 +126,7 @@ U_BOOT_DRIVER(serial_arc) = {
.id = UCLASS_SERIAL,
.of_match = arc_serial_ids,
.ofdata_to_platdata = arc_serial_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct arc_serial_platdata),
.probe = arc_serial_probe,
.ops = &arc_serial_ops,
};
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 01e2b3abf2..70f3bf43e7 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -8,7 +8,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_USB_GADGET) += g_dnl.o
-obj-$(CONFIG_SPL_DFU_SUPPORT) += f_dfu.o
+obj-$(CONFIG_SPL_DFU) += f_dfu.o
obj-$(CONFIG_SPL_USB_SDP_SUPPORT) += f_sdp.o
endif