diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/fpga/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/gpio/Kconfig | 5 | ||||
| -rw-r--r-- | drivers/i2c/Kconfig | 32 | ||||
| -rw-r--r-- | drivers/misc/Kconfig | 6 | ||||
| -rw-r--r-- | drivers/mmc/Kconfig | 22 | ||||
| -rw-r--r-- | drivers/mmc/mmc.c | 20 | ||||
| -rw-r--r-- | drivers/mmc/omap_hsmmc.c | 31 | ||||
| -rw-r--r-- | drivers/mmc/zynq_sdhci.c | 4 | ||||
| -rw-r--r-- | drivers/net/designware.c | 2 | ||||
| -rw-r--r-- | drivers/net/e1000.c | 2 | ||||
| -rw-r--r-- | drivers/net/phy/marvell.c | 47 | ||||
| -rw-r--r-- | drivers/net/phy/phy.c | 94 | ||||
| -rw-r--r-- | drivers/net/phy/smsc.c | 11 | ||||
| -rw-r--r-- | drivers/net/tsec.c | 116 |
14 files changed, 254 insertions, 150 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 6b2c866319..d36c4c5e28 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -45,4 +45,16 @@ config FPGA_ZYNQMPPL Enable FPGA driver for loading bitstream in BIT and BIN format on Xilinx Zynq UltraScale+ (ZynqMP) device. +config FPGA_SPARTAN3 + bool "Enable Spartan3 FPGA driver" + help + Enable Spartan3 FPGA driver for loading in BIT format. + +config FPGA_ZYNQPL + bool "Enable Xilinx FPGA for Zynq" + depends on ARCH_ZYNQ + help + Enable FPGA driver for loading bitstream in BIT and BIN format + on Xilinx Zynq devices. + endmenu diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 34d4409116..cc75aece6a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -183,6 +183,11 @@ config SANDBOX_GPIO_COUNT of 'anonymous' GPIOs that do not belong to any device or bank. Select a suitable value depending on your needs. +config XILINX_GPIO + bool "Xilinx GPIO driver" + help + This config enable the Xilinx GPIO driver for Microblaze. + config CMD_TCA642X bool "tca642x - Command to access tca642x state" help diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 9d43690503..932abd3059 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -268,6 +268,38 @@ config SYS_I2C_BUS_MAX help Define the maximum number of available I2C buses. +config SYS_I2C_ZYNQ + bool "Xilinx I2C driver" + depends on ARCH_ZYNQMP || ARCH_ZYNQ + help + Support for Xilinx I2C controller. + +config SYS_I2C_ZYNQ_SLAVE + hex "Set slave addr" + depends on SYS_I2C_ZYNQ + default 0 + help + Set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr. + +config SYS_I2C_ZYNQ_SPEED + int "Set I2C speed" + depends on SYS_I2C_ZYNQ + default 100000 + help + Set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting. + +config ZYNQ_I2C0 + bool "Xilinx I2C0 controller" + depends on SYS_I2C_ZYNQ + help + Enable Xilinx I2C0 controller. + +config ZYNQ_I2C1 + bool "Xilinx I2C1 controller" + depends on SYS_I2C_ZYNQ + help + Enable Xilinx I2C1 controller. + config SYS_I2C_IHS bool "gdsys IHS I2C driver" depends on DM_I2C diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f1c15cb9fa..d774569cbc 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -214,6 +214,12 @@ config SPL_I2C_EEPROM This option is an SPL-variant of the I2C_EEPROM option. See the help of I2C_EEPROM for details. +config ZYNQ_GEM_I2C_MAC_OFFSET + hex "Set the I2C MAC offset" + default 0x0 + help + Set the MAC offset for i2C. + if I2C_EEPROM config SYS_I2C_EEPROM_ADDR diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f2d8256582..5f67e336db 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -239,6 +239,15 @@ config MMC_OMAP_HS If unsure, say N. +config MMC_OMAP_HS_ADMA + bool "ADMA support for OMAP HS MMC" + depends on MMC_OMAP_HS && !OMAP34XX + default y if !AM33XX + help + This enables support for the ADMA2 controller (SDA3.00 Part A2 DMA + controller). If supported by the hardware, selecting this option will + increase performances. + config MMC_OMAP36XX_PINS bool "Enable MMC1 on OMAP36xx/37xx" depends on OMAP34XX && MMC_OMAP_HS @@ -472,6 +481,19 @@ config MMC_SDHCI_ZYNQ help Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform +config ZYNQ_SDHCI_MAX_FREQ + int "Set the maximum frequency of the controller" + depends on MMC_SDHCI_ZYNQ + help + Set the maximum frequency of the controller. + +config ZYNQ_SDHCI_MIN_FREQ + int "Set the minimum frequency of the controller" + depends on MMC_SDHCI_ZYNQ + default 0 + help + Set the minimum frequency of the controller. + config MMC_SUNXI bool "Allwinner sunxi SD/MMC Host Controller support" depends on ARCH_SUNXI && !UART0_PORT_F diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index fb303dc21e..c930893300 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -181,23 +181,18 @@ const char *mmc_mode_name(enum bus_mode mode) static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode) { static const int freqs[] = { + [MMC_LEGACY] = 25000000, [SD_LEGACY] = 25000000, [MMC_HS] = 26000000, [SD_HS] = 50000000, -#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) + [MMC_HS_52] = 52000000, + [MMC_DDR_52] = 52000000, [UHS_SDR12] = 25000000, [UHS_SDR25] = 50000000, [UHS_SDR50] = 100000000, [UHS_DDR50] = 50000000, -#ifdef MMC_SUPPORTS_TUNING [UHS_SDR104] = 208000000, -#endif -#endif - [MMC_HS_52] = 52000000, - [MMC_DDR_52] = 52000000, -#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) [MMC_HS_200] = 200000000, -#endif }; if (mode == MMC_LEGACY) @@ -1974,7 +1969,7 @@ static int mmc_startup_v4(struct mmc *mmc) return -ENOMEM; memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN); - if (ext_csd[EXT_CSD_REV] > ARRAY_SIZE(mmc_versions)) + if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions)) return -EINVAL; mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]]; @@ -2658,12 +2653,7 @@ void mmc_set_preinit(struct mmc *mmc, int preinit) mmc->preinit = preinit; } -#if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD) -static int mmc_probe(bd_t *bis) -{ - return 0; -} -#elif CONFIG_IS_ENABLED(DM_MMC) +#if CONFIG_IS_ENABLED(DM_MMC) static int mmc_probe(bd_t *bis) { int ret, i; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 02970f29b2..caaa914604 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -93,7 +93,7 @@ struct omap_hsmmc_data { enum bus_mode mode; #endif u8 controller_flags; -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA struct omap_hsmmc_adma_desc *adma_desc_table; uint desc_slot; #endif @@ -117,7 +117,7 @@ struct omap_mmc_of_data { u8 controller_flags; }; -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA struct omap_hsmmc_adma_desc { u8 attr; u8 reserved; @@ -741,7 +741,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) return -ETIMEDOUT; } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA reg_val = readl(&mmc_base->hl_hwinfo); if (reg_val & MADMA_EN) priv->controller_flags |= OMAP_HSMMC_USE_ADMA; @@ -834,7 +834,7 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end) { struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); @@ -1037,7 +1037,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, else flags |= (DP_DATA | DDIR_WRITE); -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && !mmc_is_tuning_cmd(cmd->cmdidx)) { omap_hsmmc_prepare_data(mmc, data); @@ -1082,7 +1082,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data && !mmc_is_tuning_cmd(cmd->cmdidx)) { u32 sz_mb, timeout; @@ -1181,8 +1181,9 @@ static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size) return 0; } +#if CONFIG_IS_ENABLED(MMC_WRITE) static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, - unsigned int size) + unsigned int size) { unsigned int *input_buf = (unsigned int *)buf; unsigned int mmc_stat; @@ -1235,7 +1236,13 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, } return 0; } - +#else +static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, + unsigned int size) +{ + return -ENOTSUPP; +} +#endif static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base) { writel(readl(&mmc_base->sysctl) & ~CEN_ENABLE, &mmc_base->sysctl); @@ -1825,6 +1832,8 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) if (ret < 0) return ret; + if (!cfg->f_max) + cfg->f_max = 52000000; cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; cfg->f_min = 400000; cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; @@ -1858,8 +1867,8 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) static int omap_hsmmc_bind(struct udevice *dev) { struct omap_hsmmc_plat *plat = dev_get_platdata(dev); - - return mmc_bind(dev, &plat->mmc, &plat->cfg); + plat->mmc = calloc(1, sizeof(struct mmc)); + return mmc_bind(dev, plat->mmc, &plat->cfg); } #endif static int omap_hsmmc_probe(struct udevice *dev) @@ -1882,7 +1891,7 @@ static int omap_hsmmc_probe(struct udevice *dev) #endif #ifdef CONFIG_BLK - mmc = &plat->mmc; + mmc = plat->mmc; #else mmc = mmc_create(cfg, priv); if (mmc == NULL) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 0fddb420dc..414778cc4a 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -16,10 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ -# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0 -#endif - struct arasan_sdhci_plat { struct mmc_config cfg; struct mmc mmc; diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 6d5307128d..43670a7d0c 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -684,7 +684,7 @@ int designware_eth_probe(struct udevice *dev) break; err = clk_enable(&priv->clocks[i]); - if (err) { + if (err && err != -ENOSYS && err != -ENOTSUPP) { pr_err("failed to enable clock %d\n", i); clk_free(&priv->clocks[i]); goto clk_err; diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 8316854bc1..5cc54efe48 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -1181,7 +1181,7 @@ e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw) return; swsm = E1000_READ_REG(hw, SWSM); - if (hw->mac_type == e1000_80003es2lan) { + if (hw->mac_type == e1000_80003es2lan || hw->mac_type == e1000_igb) { /* Release both semaphores. */ swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI); } else diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 0b9a9fce8a..2932340455 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -159,7 +159,7 @@ static int m88e1xxx_parse_status(struct phy_device *phydev) mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS); if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) && - !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) { + !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) { int i = 0; puts("Waiting for PHY realtime link"); @@ -175,10 +175,10 @@ static int m88e1xxx_parse_status(struct phy_device *phydev) putc('.'); udelay(1000); mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, - MIIM_88E1xxx_PHY_STATUS); + MIIM_88E1xxx_PHY_STATUS); } puts(" done\n"); - udelay(500000); /* another 500 ms (results in faster booting) */ + mdelay(500); /* another 500 ms (results in faster booting) */ } else { if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) phydev->link = 1; @@ -226,9 +226,9 @@ static int m88e1111s_config(struct phy_device *phydev) if (phy_interface_is_rgmii(phydev)) { reg = phy_read(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR); if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || - (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) { + (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) { reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY); } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { reg &= ~MIIM_88E1111_TX_DELAY; @@ -239,10 +239,10 @@ static int m88e1111s_config(struct phy_device *phydev) } phy_write(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg); reg = phy_read(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR); reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK); @@ -252,47 +252,47 @@ static int m88e1111s_config(struct phy_device *phydev) reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RGMII; phy_write(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg); } if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { reg = phy_read(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR); reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK); reg |= MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK; reg |= MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO; phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_88E1111_PHY_EXT_SR, reg); + MIIM_88E1111_PHY_EXT_SR, reg); } if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { reg = phy_read(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR); reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY); phy_write(phydev, - MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg); + MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg); reg = phy_read(phydev, MDIO_DEVAD_NONE, - MIIM_88E1111_PHY_EXT_SR); + MIIM_88E1111_PHY_EXT_SR); reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK | MIIM_88E1111_HWCFG_FIBER_COPPER_RES); reg |= 0x7 | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO; phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_88E1111_PHY_EXT_SR, reg); + MIIM_88E1111_PHY_EXT_SR, reg); /* soft reset */ phy_reset(phydev); reg = phy_read(phydev, MDIO_DEVAD_NONE, - MIIM_88E1111_PHY_EXT_SR); + MIIM_88E1111_PHY_EXT_SR); reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK | - MIIM_88E1111_HWCFG_FIBER_COPPER_RES); + MIIM_88E1111_HWCFG_FIBER_COPPER_RES); reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RTBI | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO; phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_88E1111_PHY_EXT_SR, reg); + MIIM_88E1111_PHY_EXT_SR, reg); } /* soft reset */ @@ -308,7 +308,7 @@ static int m88e1111s_config(struct phy_device *phydev) * m88e1518_phy_writebits - write bits to a register */ void m88e1518_phy_writebits(struct phy_device *phydev, - u8 reg_num, u16 offset, u16 len, u16 data) + u8 reg_num, u16 offset, u16 len, u16 data) { u16 reg, mask; @@ -382,7 +382,8 @@ static int m88e1518_config(struct phy_device *phydev) reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E151x_PHY_MSCR); reg &= ~MIIM_88E151x_RGMII_RXTX_DELAY; - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + if (phydev->interface == PHY_INTERFACE_MODE_RGMII || + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) reg |= MIIM_88E151x_RGMII_RXTX_DELAY; else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) reg |= MIIM_88E151x_RGMII_RX_DELAY; @@ -471,10 +472,10 @@ static int m88e1121_config(struct phy_device *phydev) /* Switch the page to access the led register */ pg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE); phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE, - MIIM_88E1121_PHY_LED_PAGE); + MIIM_88E1121_PHY_LED_PAGE); /* Configure leds */ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_LED_CTRL, - MIIM_88E1121_PHY_LED_DEF); + MIIM_88E1121_PHY_LED_DEF); /* Restore the page pointer */ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE, pg); @@ -497,7 +498,7 @@ static int m88e1145_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_CAL_OV, 0xa2da); phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_SCR, - MIIM_88E1xxx_PHY_MDI_X_AUTO); + MIIM_88E1xxx_PHY_MDI_X_AUTO); reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR); if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) @@ -524,7 +525,7 @@ static int m88e1145_startup(struct phy_device *phydev) return ret; phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_LED_CONTROL, - MIIM_88E1145_PHY_LED_DIRECT); + MIIM_88E1145_PHY_LED_DIRECT); return m88e1xxx_parse_status(phydev); } diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index e31f3aa3a9..1d8e81be2d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; /* Generic PHY support and helper functions */ /** - * genphy_config_advert - sanitize and advertise auto-negotation parameters + * genphy_config_advert - sanitize and advertise auto-negotiation parameters * @phydev: target phy_device struct * * Description: Writes MII_ADVERTISE with the appropriate values, @@ -117,7 +117,6 @@ static int genphy_config_advert(struct phy_device *phydev) return changed; } - /** * genphy_setup_forced - configures/forces speed/duplex from @phydev * @phydev: target phy_device struct @@ -130,14 +129,15 @@ static int genphy_setup_forced(struct phy_device *phydev) int err; int ctl = BMCR_ANRESTART; - phydev->pause = phydev->asym_pause = 0; + phydev->pause = 0; + phydev->asym_pause = 0; - if (SPEED_1000 == phydev->speed) + if (phydev->speed == SPEED_1000) ctl |= BMCR_SPEED1000; - else if (SPEED_100 == phydev->speed) + else if (phydev->speed == SPEED_100) ctl |= BMCR_SPEED100; - if (DUPLEX_FULL == phydev->duplex) + if (phydev->duplex == DUPLEX_FULL) ctl |= BMCR_FULLDPLX; err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); @@ -145,7 +145,6 @@ static int genphy_setup_forced(struct phy_device *phydev) return err; } - /** * genphy_restart_aneg - Enable and Restart Autonegotiation * @phydev: target phy_device struct @@ -169,7 +168,6 @@ int genphy_restart_aneg(struct phy_device *phydev) return ctl; } - /** * genphy_config_aneg - restart auto-negotiation or write BMCR * @phydev: target phy_device struct @@ -182,7 +180,7 @@ int genphy_config_aneg(struct phy_device *phydev) { int result; - if (AUTONEG_ENABLE != phydev->autoneg) + if (phydev->autoneg != AUTONEG_ENABLE) return genphy_setup_forced(phydev); result = genphy_config_advert(phydev); @@ -191,8 +189,10 @@ int genphy_config_aneg(struct phy_device *phydev) return result; if (result == 0) { - /* Advertisment hasn't changed, but maybe aneg was never on to - * begin with? Or maybe phy was isolated? */ + /* + * Advertisment hasn't changed, but maybe aneg was never on to + * begin with? Or maybe phy was isolated? + */ int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); if (ctl < 0) @@ -202,8 +202,10 @@ int genphy_config_aneg(struct phy_device *phydev) result = 1; /* do restart aneg */ } - /* Only restart aneg if we are advertising something different - * than we were before. */ + /* + * Only restart aneg if we are advertising something different + * than we were before. + */ if (result > 0) result = genphy_restart_aneg(phydev); @@ -240,7 +242,7 @@ int genphy_update_link(struct phy_device *phydev) int i = 0; printf("%s Waiting for PHY auto negotiation to complete", - phydev->dev->name); + phydev->dev->name); while (!(mii_reg & BMSR_ANEGCOMPLETE)) { /* * Timeout reached ? @@ -305,7 +307,8 @@ int genphy_parse_link(struct phy_device *phydev) */ gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); if (gblpa < 0) { - debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); + debug("Could not read MII_STAT1000. "); + debug("Ignoring gigabit capability\n"); gblpa = 0; } gblpa &= phy_read(phydev, @@ -338,8 +341,9 @@ int genphy_parse_link(struct phy_device *phydev) if (lpa & LPA_100FULL) phydev->duplex = DUPLEX_FULL; - } else if (lpa & LPA_10FULL) + } else if (lpa & LPA_10FULL) { phydev->duplex = DUPLEX_FULL; + } /* * Extended status may indicate that the PHY supports @@ -580,7 +584,9 @@ static int phy_probe(struct phy_device *phydev) { int err = 0; - phydev->advertising = phydev->supported = phydev->drv->features; + phydev->advertising = phydev->drv->features; + phydev->supported = phydev->drv->features; + phydev->mmds = phydev->drv->mmds; if (phydev->drv->probe) @@ -600,7 +606,7 @@ static struct phy_driver *generic_for_interface(phy_interface_t interface) } static struct phy_driver *get_phy_driver(struct phy_device *phydev, - phy_interface_t interface) + phy_interface_t interface) { struct list_head *entry; int phy_id = phydev->phy_id; @@ -622,12 +628,14 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, { struct phy_device *dev; - /* We allocate the device, and initialize the - * default values */ + /* + * We allocate the device, and initialize the + * default values + */ dev = malloc(sizeof(*dev)); if (!dev) { printf("Failed to allocate PHY device for %s:%d\n", - bus->name, addr); + bus->name, addr); return NULL; } @@ -665,8 +673,10 @@ int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) { int phy_reg; - /* Grab the bits from PHYIR1, and put them - * in the upper half */ + /* + * Grab the bits from PHYIR1, and put them + * in the upper half + */ phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); if (phy_reg < 0) @@ -686,9 +696,11 @@ int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) } static struct phy_device *create_phy_by_mask(struct mii_dev *bus, - unsigned phy_mask, int devad, phy_interface_t interface) + uint phy_mask, int devad, + phy_interface_t interface) { u32 phy_id = 0xffffffff; + while (phy_mask) { int addr = ffs(phy_mask) - 1; int r = get_phy_id(bus, addr, devad, &phy_id); @@ -701,11 +713,13 @@ static struct phy_device *create_phy_by_mask(struct mii_dev *bus, } static struct phy_device *search_for_existing_phy(struct mii_dev *bus, - unsigned phy_mask, phy_interface_t interface) + uint phy_mask, + phy_interface_t interface) { /* If we have one, return the existing device, with new interface */ while (phy_mask) { int addr = ffs(phy_mask) - 1; + if (bus->phymap[addr]) { bus->phymap[addr]->interface = interface; return bus->phymap[addr]; @@ -716,7 +730,8 @@ static struct phy_device *search_for_existing_phy(struct mii_dev *bus, } static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, - unsigned phy_mask, phy_interface_t interface) + uint phy_mask, + phy_interface_t interface) { int i; struct phy_device *phydev; @@ -728,7 +743,7 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, /* Otherwise we have to try Clause 45 */ for (i = 0; i < 5; i++) { phydev = create_phy_by_mask(bus, phy_mask, - i ? i : MDIO_DEVAD_NONE, interface); + i ? i : MDIO_DEVAD_NONE, interface); if (IS_ERR(phydev)) return NULL; if (phydev) @@ -738,6 +753,7 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, debug("\n%s PHY: ", bus->name); while (phy_mask) { int addr = ffs(phy_mask) - 1; + debug("%d ", addr); phy_mask &= ~(1 << addr); } @@ -747,7 +763,8 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, } /** - * get_phy_device - reads the specified PHY device and returns its @phy_device struct + * get_phy_device - reads the specified PHY device and returns its + * @phy_device struct * @bus: the target MII bus * @addr: PHY address on the MII bus * @@ -826,15 +843,15 @@ int miiphy_reset(const char *devname, unsigned char addr) return phy_reset(phydev); } -struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, - phy_interface_t interface) +struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask, + phy_interface_t interface) { /* Reset the bus */ if (bus->reset) { bus->reset(bus); /* Wait 15ms to make sure the PHY has come out of hard reset */ - udelay(15000); + mdelay(15); } return get_phy_device_by_mask(bus, phy_mask, interface); @@ -850,8 +867,8 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) phy_reset(phydev); if (phydev->dev && phydev->dev != dev) { printf("%s:%d is connected to %s. Reconnecting to %s\n", - phydev->bus->name, phydev->addr, - phydev->dev->name, dev->name); + phydev->bus->name, phydev->addr, + phydev->dev->name, dev->name); } phydev->dev = dev; debug("%s connected to %s\n", dev->name, phydev->drv->name); @@ -859,20 +876,23 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) #ifdef CONFIG_DM_ETH struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct udevice *dev, phy_interface_t interface) + struct udevice *dev, + phy_interface_t interface) #else struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct eth_device *dev, phy_interface_t interface) + struct eth_device *dev, + phy_interface_t interface) #endif { struct phy_device *phydev = NULL; #ifdef CONFIG_PHY_FIXED int sn; const char *name; + sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); while (sn > 0) { name = fdt_get_name(gd->fdt_blob, sn, NULL); - if (name != NULL && strcmp(name, "fixed-link") == 0) { + if (name && strcmp(name, "fixed-link") == 0) { phydev = phy_device_create(bus, sn, PHY_FIXED_ID, interface); break; @@ -880,7 +900,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, sn = fdt_next_subnode(gd->fdt_blob, sn); } #endif - if (phydev == NULL) + if (!phydev) phydev = phy_find_by_mask(bus, 1 << addr, interface); if (phydev) diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index 41ffbe9d0e..73ed144061 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -83,6 +83,16 @@ static struct phy_driver lan8740_driver = { .shutdown = &genphy_shutdown, }; +static struct phy_driver lan8741_driver = { + .name = "SMSC LAN8741", + .uid = 0x0007c120, + .mask = 0xffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + static struct phy_driver lan8742_driver = { .name = "SMSC LAN8742", .uid = 0x0007c130, @@ -99,6 +109,7 @@ int phy_smsc_init(void) phy_register(&lan911x_driver); phy_register(&lan8700_driver); phy_register(&lan8740_driver); + phy_register(&lan8741_driver); phy_register(&lan8742_driver); return 0; diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 18e7a83d0f..6829e32dae 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -20,8 +20,6 @@ #include <asm/processor.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - #ifndef CONFIG_DM_ETH /* Default initializations for TSEC controllers. */ @@ -74,11 +72,11 @@ static void tsec_configure_serdes(struct tsec_private *priv) * to the register offset used for external PHY accesses */ tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), - 0, TBI_ANA, TBIANA_SETTINGS); + 0, TBI_ANA, TBIANA_SETTINGS); tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), - 0, TBI_TBICON, TBICON_CLK_SELECT); + 0, TBI_TBICON, TBICON_CLK_SELECT); tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), - 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS); + 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS); } #ifdef CONFIG_MCAST_TFTP @@ -116,7 +114,7 @@ static int tsec_mcast_addr(struct udevice *dev, const u8 *mcast_mac, int set) whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */ whichreg = result >> 29; /* the 3 MSB = which reg to set it in */ - value = 1 << (31-whichbit); + value = BIT(31 - whichbit); if (set) setbits_be32(®s->hash.gaddr0 + whichreg, value); @@ -171,7 +169,6 @@ static void init_registers(struct tsec __iomem *regs) out_be32(®s->attr, ATTR_INIT_SETTINGS); out_be32(®s->attreli, ATTRELI_INIT_SETTINGS); - } /* @@ -222,8 +219,8 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) out_be32(®s->maccfg2, maccfg2); printf("Speed: %d, %s duplex%s\n", phydev->speed, - (phydev->duplex) ? "full" : "half", - (phydev->port == PORT_FIBRE) ? ", fiber mode" : ""); + (phydev->duplex) ? "full" : "half", + (phydev->port == PORT_FIBRE) ? ", fiber mode" : ""); } /* @@ -240,7 +237,7 @@ static int tsec_send(struct udevice *dev, void *packet, int length) { struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec __iomem *regs = priv->regs; - uint16_t status; + u16 status; int result = 0; int i; @@ -287,7 +284,7 @@ static int tsec_recv(struct eth_device *dev) while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) { int length = in_be16(&priv->rxbd[priv->rx_idx].length); - uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status); + u16 status = in_be16(&priv->rxbd[priv->rx_idx].status); uchar *packet = net_rx_packets[priv->rx_idx]; /* Send the packet up if there were no errors */ @@ -323,8 +320,8 @@ static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) { int length = in_be16(&priv->rxbd[priv->rx_idx].length); - uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status); - uint32_t buf; + u16 status = in_be16(&priv->rxbd[priv->rx_idx].status); + u32 buf; /* Send the packet up if there were no errors */ if (!(status & RXBD_STATS)) { @@ -347,7 +344,7 @@ static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length) { struct tsec_private *priv = (struct tsec_private *)dev->priv; - uint16_t status; + u16 status; out_be16(&priv->rxbd[priv->rx_idx].length, 0); @@ -427,7 +424,8 @@ void redundant_init(struct tsec_private *priv) clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); do { - uint16_t status; + u16 status; + tsec_send(priv->dev, (void *)pkt, sizeof(pkt)); /* Wait for buffer to be received */ @@ -478,7 +476,7 @@ void redundant_init(struct tsec_private *priv) static void startup_tsec(struct tsec_private *priv) { struct tsec __iomem *regs = priv->regs; - uint16_t status; + u16 status; int i; /* reset the indices to zero */ @@ -532,7 +530,7 @@ static void startup_tsec(struct tsec_private *priv) * This allows U-Boot to find the first active controller. */ #ifndef CONFIG_DM_ETH -static int tsec_init(struct eth_device *dev, bd_t * bd) +static int tsec_init(struct eth_device *dev, bd_t *bd) #else static int tsec_init(struct udevice *dev) #endif @@ -616,22 +614,23 @@ static phy_interface_t tsec_get_interface(struct tsec_private *priv) } if (ecntrl & ECNTRL_REDUCED_MODE) { + phy_interface_t interface; + if (ecntrl & ECNTRL_REDUCED_MII_MODE) return PHY_INTERFACE_MODE_RMII; - else { - phy_interface_t interface = priv->interface; - - /* - * This isn't autodetected, so it must - * be set by the platform code. - */ - if ((interface == PHY_INTERFACE_MODE_RGMII_ID) || - (interface == PHY_INTERFACE_MODE_RGMII_TXID) || - (interface == PHY_INTERFACE_MODE_RGMII_RXID)) - return interface; - - return PHY_INTERFACE_MODE_RGMII; - } + + interface = priv->interface; + + /* + * This isn't autodetected, so it must + * be set by the platform code. + */ + if (interface == PHY_INTERFACE_MODE_RGMII_ID || + interface == PHY_INTERFACE_MODE_RGMII_TXID || + interface == PHY_INTERFACE_MODE_RGMII_RXID) + return interface; + + return PHY_INTERFACE_MODE_RGMII; } if (priv->flags & TSEC_GIGABIT) @@ -691,17 +690,19 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info) int i; struct tsec_private *priv; - dev = (struct eth_device *)malloc(sizeof *dev); + dev = (struct eth_device *)malloc(sizeof(*dev)); - if (NULL == dev) + if (!dev) return 0; - memset(dev, 0, sizeof *dev); + memset(dev, 0, sizeof(*dev)); priv = (struct tsec_private *)malloc(sizeof(*priv)); - if (NULL == priv) + if (!priv) { + free(dev); return 0; + } priv->regs = tsec_info->regs; priv->phyregs_sgmii = tsec_info->miiregs_sgmii; @@ -747,10 +748,11 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info) int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num) { int i; - int ret, count = 0; + int count = 0; for (i = 0; i < num; i++) { - ret = tsec_initialize(bis, &tsecs[i]); + int ret = tsec_initialize(bis, &tsecs[i]); + if (ret > 0) count += ret; } @@ -775,45 +777,43 @@ int tsec_probe(struct udevice *dev) struct tsec_private *priv = dev_get_priv(dev); struct eth_pdata *pdata = dev_get_platdata(dev); struct fsl_pq_mdio_info mdio_info; - int offset = 0; - int reg; + struct ofnode_phandle_args phandle_args; + ofnode parent; const char *phy_mode; int ret; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = (phys_addr_t)dev_read_addr(dev); priv->regs = (struct tsec *)pdata->iobase; - offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), - "phy-handle"); - if (offset > 0) { - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); - priv->phyaddr = reg; - } else { + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) { debug("phy-handle does not exist under tsec %s\n", dev->name); return -ENOENT; + } else { + int reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); + + priv->phyaddr = reg; } - offset = fdt_parent_offset(gd->fdt_blob, offset); - if (offset > 0) { - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); + parent = ofnode_get_parent(phandle_args.node); + if (ofnode_valid(parent)) { + int reg = ofnode_read_u32_default(parent, "reg", 0); priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520); } else { debug("No parent node for PHY?\n"); return -ENOENT; } - offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), - "tbi-handle"); - if (offset > 0) { - reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", - CONFIG_SYS_TBIPA_VALUE); - priv->tbiaddr = reg; - } else { + if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, 0, 0, + &phandle_args)) { priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE; + } else { + int reg = ofnode_read_u32_default(phandle_args.node, "reg", + CONFIG_SYS_TBIPA_VALUE); + priv->tbiaddr = reg; } - phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), - "phy-connection-type", NULL); + phy_mode = dev_read_prop(dev, "phy-connection-type", NULL); if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); if (pdata->phy_interface == -1) { |