diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/davinci_nand.c | 12 | ||||
| -rw-r--r-- | drivers/net/kirkwood_egiga.c | 1 | ||||
| -rw-r--r-- | drivers/serial/Makefile | 2 | ||||
| -rw-r--r-- | drivers/serial/serial.c | 3 | ||||
| -rw-r--r-- | drivers/serial/serial_mxc.c (renamed from drivers/serial/serial_mx31.c) | 21 | ||||
| -rw-r--r-- | drivers/spi/Makefile | 1 | ||||
| -rw-r--r-- | drivers/spi/kirkwood_spi.c | 185 |
7 files changed, 215 insertions, 10 deletions
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index a974667dc9..8ef18b8124 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -386,9 +386,6 @@ static int nand_davinci_waitfunc(struct mtd_info *mtd, struct nand_chip *this) static void nand_flash_init(void) { u_int32_t acfg1 = 0x3ffffffc; - u_int32_t acfg2 = 0x3ffffffc; - u_int32_t acfg3 = 0x3ffffffc; - u_int32_t acfg4 = 0x3ffffffc; emifregs emif_regs; /*------------------------------------------------------------------* @@ -413,12 +410,9 @@ static void nand_flash_init(void) emif_regs = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE; - emif_regs->AWCCR |= 0x10000000; - emif_regs->AB1CR = acfg1; /* 0x08244128 */; - emif_regs->AB2CR = acfg2; - emif_regs->AB3CR = acfg3; - emif_regs->AB4CR = acfg4; - emif_regs->NANDFCR = 0x00000101; + emif_regs->AB1CR = acfg1; /* CS2 */ + + emif_regs->NANDFCR = 0x00000101; /* NAND flash on CS2 */ } int board_nand_init(struct nand_chip *nand) diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index b43bbf2b3d..3c5db19cb0 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -662,3 +662,4 @@ int kirkwood_egiga_initialize(bd_t * bis) #endif } return 0; +} diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index ab5d5654d6..64882a2e8e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -41,7 +41,7 @@ COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o COBJS-$(CONFIG_LH7A40X_SERIAL) += serial_lh7a40x.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o -COBJS-$(CONFIG_MX31_UART) += serial_mx31.o +COBJS-$(CONFIG_MXC_UART) += serial_mxc.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 966df9ac3b..dd5f332ba9 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -27,6 +27,9 @@ #ifdef CONFIG_NS87308 #include <ns87308.h> #endif +#ifdef CONFIG_KIRKWOOD +#include <asm/arch/kirkwood.h> +#endif #if defined (CONFIG_SERIAL_MULTI) #include <serial.h> diff --git a/drivers/serial/serial_mx31.c b/drivers/serial/serial_mxc.c index 7c0682ad77..acc5b7d83b 100644 --- a/drivers/serial/serial_mx31.c +++ b/drivers/serial/serial_mxc.c @@ -18,7 +18,12 @@ */ #include <common.h> +#ifdef CONFIG_MX31 #include <asm/arch/mx31.h> +#else +#include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> +#endif #define __REG(x) (*((volatile u32 *)(x))) @@ -32,6 +37,18 @@ #define UART_PHYS 0x43fb0000 #elif defined(CONFIG_SYS_MX31_UART5) #define UART_PHYS 0x43fb4000 +#elif defined(CONFIG_SYS_MX27_UART1) +#define UART_PHYS 0x1000a000 +#elif defined(CONFIG_SYS_MX27_UART2) +#define UART_PHYS 0x1000b000 +#elif defined(CONFIG_SYS_MX27_UART3) +#define UART_PHYS 0x1000c000 +#elif defined(CONFIG_SYS_MX27_UART4) +#define UART_PHYS 0x1000d000 +#elif defined(CONFIG_SYS_MX27_UART5) +#define UART_PHYS 0x1001b000 +#elif defined(CONFIG_SYS_MX27_UART6) +#define UART_PHYS 0x1001c000 #else #error "define CONFIG_SYS_MX31_UARTx to use the mx31 UART driver" #endif @@ -149,7 +166,11 @@ DECLARE_GLOBAL_DATA_PTR; void serial_setbrg (void) { +#ifdef CONFIG_MX31 u32 clk = mx31_get_ipg_clk(); +#else + u32 clk = imx_get_perclk1(); +#endif if (!gd->baudrate) gd->baudrate = CONFIG_BAUDRATE; diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 1272c17761..a9f67a0ac0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libspi.a COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o +COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c new file mode 100644 index 0000000000..a1c307059c --- /dev/null +++ b/drivers/spi/kirkwood_spi.c @@ -0,0 +1,185 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * Derived from drivers/spi/mpc8xxx_spi.c + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <malloc.h> +#include <spi.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/spi.h> +#include <asm/arch/mpp.h> + +static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + u32 data; + u32 kwspi_mpp_config[] = { + MPP0_GPIO, + MPP7_SPI_SCn, + 0 + }; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->bus = bus; + slave->cs = cs; + + writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); + + /* calculate spi clock prescaller using max_hz */ + data = ((CONFIG_SYS_TCLK / 2) / max_hz) & KWSPI_CLKPRESCL_MASK; + data |= 0x10; + + /* program spi clock prescaller using max_hz */ + writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); + debug("data = 0x%08x \n", data); + + writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); + writel(KWSPI_IRQMASK, spireg->irq_mask); + + /* program mpp registers to select SPI_CSn */ + if (cs) { + kwspi_mpp_config[0] = MPP0_GPIO; + kwspi_mpp_config[1] = MPP7_SPI_SCn; + } else { + kwspi_mpp_config[0] = MPP0_SPI_SCn; + kwspi_mpp_config[1] = MPP7_GPO; + } + kirkwood_mpp_conf(kwspi_mpp_config); + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ +} + +#ifndef CONFIG_SPI_CS_IS_VALID +/* + * you can define this function board specific + * define above CONFIG in board specific config file and + * provide the function in board specific src file + */ +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return (bus == 0 && (cs == 0 || cs == 1)); +} +#endif + +void spi_cs_activate(struct spi_slave *slave) +{ + writel(readl(&spireg->ctrl) | KWSPI_IRQUNMASK, &spireg->ctrl); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + writel(readl(&spireg->ctrl) & KWSPI_IRQMASK, &spireg->ctrl); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + unsigned int tmpdout, tmpdin; + int tm, isread = 0; + + debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + slave->bus, slave->cs, dout, din, bitlen); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + /* + * handle data in 8-bit chunks + * TBD: 2byte xfer mode to be enabled + */ + writel(((readl(&spireg->cfg) & ~KWSPI_XFERLEN_MASK) | + KWSPI_XFERLEN_1BYTE), &spireg->cfg); + + while (bitlen > 4) { + debug("loopstart bitlen %d\n", bitlen); + tmpdout = 0; + + /* Shift data so it's msb-justified */ + if (dout) + tmpdout = *(u32 *) dout & 0x0ff; + + writel(~KWSPI_SMEMRDIRQ, &spireg->irq_cause); + writel(tmpdout, &spireg->dout); /* Write the data out */ + debug("*** spi_xfer: ... %08x written, bitlen %d\n", + tmpdout, bitlen); + + /* + * Wait for SPI transmit to get out + * or time out (1 second = 1000 ms) + * The NE event must be read and cleared first + */ + for (tm = 0, isread = 0; tm < KWSPI_TIMEOUT; ++tm) { + if (readl(&spireg->irq_cause) & KWSPI_SMEMRDIRQ) { + isread = 1; + tmpdin = readl(&spireg->din); + debug + ("spi_xfer: din %08x..%08x read\n", + din, tmpdin); + + if (din) { + *((u8 *) din) = (u8) tmpdin; + din += 1; + } + if (dout) + dout += 1; + bitlen -= 8; + } + if (isread) + break; + } + if (tm >= KWSPI_TIMEOUT) + printf("*** spi_xfer: Time out during SPI transfer\n"); + + debug("loopend bitlen %d\n", bitlen); + } + + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return 0; +} |