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-rw-r--r--drivers/mtd/nand/fsl_ifc_nand.c37
-rw-r--r--drivers/net/fsl-mc/dpbp.c2
-rw-r--r--drivers/net/fsl-mc/dpio/dpio.c2
-rw-r--r--drivers/net/fsl-mc/dpmac.c2
-rw-r--r--drivers/net/fsl-mc/dpni.c2
-rw-r--r--drivers/net/fsl-mc/dprc.c2
-rw-r--r--drivers/net/fsl-mc/fsl_dpmng_cmd.h2
-rw-r--r--drivers/net/fsl-mc/mc.c4
-rw-r--r--drivers/net/ldpaa_eth/ldpaa_eth.c2
-rw-r--r--drivers/net/ldpaa_eth/ldpaa_eth.h2
-rw-r--r--drivers/spi/fsl_qspi.c31
11 files changed, 46 insertions, 42 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index a82913cac1..a47226bd21 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -269,14 +269,9 @@ static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
/* returns nonzero if entire page is blank */
static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
- u32 *eccstat, unsigned int bufnum)
+ u32 eccstat, unsigned int bufnum)
{
- u32 reg = eccstat[bufnum / 4];
- int errors;
-
- errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
-
- return errors;
+ return (eccstat >> ((3 - bufnum % 4) * 8)) & 15;
}
/*
@@ -290,7 +285,7 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
u32 time_start;
- u32 eccstat[8] = {0};
+ u32 eccstat;
int i;
/* set the chip select for NAND Transaction */
@@ -320,20 +315,17 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
if (ctrl->eccread) {
int errors;
int bufnum = ctrl->page & priv->bufnum_mask;
- int sector = bufnum * chip->ecc.steps;
- int sector_end = sector + chip->ecc.steps - 1;
-
- for (i = sector / 4; i <= sector_end / 4; i++) {
- if (i >= ARRAY_SIZE(eccstat)) {
- printf("%s: eccstat too small for %d\n",
- __func__, i);
- return -EIO;
- }
+ int sector_start = bufnum * chip->ecc.steps;
+ int sector_end = sector_start + chip->ecc.steps - 1;
+ u32 *eccstat_regs;
- eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]);
- }
+ eccstat_regs = ifc->ifc_nand.nand_eccstat;
+ eccstat = ifc_in32(&eccstat_regs[sector_start / 4]);
+
+ for (i = sector_start; i <= sector_end; i++) {
+ if ((i != sector_start) && !(i % 4))
+ eccstat = ifc_in32(&eccstat_regs[i / 4]);
- for (i = sector; i <= sector_end; i++) {
errors = check_read_ecc(mtd, ctrl, eccstat, i);
if (errors == 15) {
@@ -708,6 +700,7 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
u32 nand_fsr;
+ int status;
if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
return NAND_STATUS_FAIL;
@@ -728,10 +721,10 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
return NAND_STATUS_FAIL;
nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
+ status = nand_fsr >> 24;
/* Chip sometimes reporting write protect even when it's not */
- nand_fsr = nand_fsr | NAND_STATUS_WP;
- return nand_fsr;
+ return status | NAND_STATUS_WP;
}
static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
diff --git a/drivers/net/fsl-mc/dpbp.c b/drivers/net/fsl-mc/dpbp.c
index 327bee935a..c609efb9ab 100644
--- a/drivers/net/fsl-mc/dpbp.c
+++ b/drivers/net/fsl-mc/dpbp.c
@@ -2,7 +2,7 @@
/*
* Freescale Layerscape MC I/O wrapper
*
- * Copyright (C) 2013-2016 Freescale Semiconductor, Inc.
+ * Copyright 2013-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
#include <fsl-mc/fsl_mc_sys.h>
diff --git a/drivers/net/fsl-mc/dpio/dpio.c b/drivers/net/fsl-mc/dpio/dpio.c
index 0bbb760728..8884455963 100644
--- a/drivers/net/fsl-mc/dpio/dpio.c
+++ b/drivers/net/fsl-mc/dpio/dpio.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2013-2016 Freescale Semiconductor
+ * Copyright 2013-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
diff --git a/drivers/net/fsl-mc/dpmac.c b/drivers/net/fsl-mc/dpmac.c
index 2aadd4ada2..43a2ff43f8 100644
--- a/drivers/net/fsl-mc/dpmac.c
+++ b/drivers/net/fsl-mc/dpmac.c
@@ -2,7 +2,7 @@
/*
* Freescale Layerscape MC I/O wrapper
*
- * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
* Author: Prabhakar Kushwaha <prabhakar@freescale.com>
*/
diff --git a/drivers/net/fsl-mc/dpni.c b/drivers/net/fsl-mc/dpni.c
index 5cf5eebea6..443e430695 100644
--- a/drivers/net/fsl-mc/dpni.c
+++ b/drivers/net/fsl-mc/dpni.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2013-2016 Freescale Semiconductor
+ * Copyright 2013-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
diff --git a/drivers/net/fsl-mc/dprc.c b/drivers/net/fsl-mc/dprc.c
index 38d19a4063..e0a2865ab8 100644
--- a/drivers/net/fsl-mc/dprc.c
+++ b/drivers/net/fsl-mc/dprc.c
@@ -2,7 +2,7 @@
/*
* Freescale Layerscape MC I/O wrapper
*
- * Copyright (C) 2013-2016 Freescale Semiconductor, Inc.
+ * Copyright 2013-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
diff --git a/drivers/net/fsl-mc/fsl_dpmng_cmd.h b/drivers/net/fsl-mc/fsl_dpmng_cmd.h
index 9e6f27afdc..e18c88da09 100644
--- a/drivers/net/fsl-mc/fsl_dpmng_cmd.h
+++ b/drivers/net/fsl-mc/fsl_dpmng_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0+ */
-/* Copyright 2013-2016 Freescale Semiconductor Inc.
+/* Copyright 2013-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
#ifndef __FSL_DPMNG_CMD_H
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 58612cfca3..982024e31e 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2017 NXP Semiconductors
- * Copyright (C) 2014 Freescale Semiconductor
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*/
#include <common.h>
#include <errno.h>
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 8688dd4419..79facb4a44 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2014-2016 Freescale Semiconductor
+ * Copyright 2014-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.h b/drivers/net/ldpaa_eth/ldpaa_eth.h
index 54cb633e01..ee784a55ee 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.h
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright (C) 2014-2016 Freescale Semiconductor
+ * Copyright 2014-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 79781b5d4a..3684249484 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -155,6 +155,25 @@ static void qspi_write32(u32 flags, u32 *addr, u32 val)
out_be32(addr, val) : out_le32(addr, val);
}
+static inline int is_controller_busy(const struct fsl_qspi_priv *priv)
+{
+ u32 val;
+ const u32 mask = QSPI_SR_BUSY_MASK | QSPI_SR_AHB_ACC_MASK |
+ QSPI_SR_IP_ACC_MASK;
+ unsigned int retry = 5;
+
+ do {
+ val = qspi_read32(priv->flags, &priv->regs->sr);
+
+ if ((~val & mask) == mask)
+ return 0;
+
+ udelay(1);
+ } while (--retry);
+
+ return -ETIMEDOUT;
+}
+
/* QSPI support swapping the flash read/write data
* in hardware for LS102xA, but not for VF610 */
static inline u32 qspi_endian_xchg(u32 data)
@@ -1017,11 +1036,7 @@ static int fsl_qspi_probe(struct udevice *bus)
priv->num_chipselect = plat->num_chipselect;
/* make sure controller is not busy anywhere */
- ret = wait_for_bit_le32(&priv->regs->sr,
- QSPI_SR_BUSY_MASK |
- QSPI_SR_AHB_ACC_MASK |
- QSPI_SR_IP_ACC_MASK,
- false, 100, false);
+ ret = is_controller_busy(priv);
if (ret) {
debug("ERROR : The controller is busy\n");
@@ -1184,11 +1199,7 @@ static int fsl_qspi_claim_bus(struct udevice *dev)
priv = dev_get_priv(bus);
/* make sure controller is not busy anywhere */
- ret = wait_for_bit_le32(&priv->regs->sr,
- QSPI_SR_BUSY_MASK |
- QSPI_SR_AHB_ACC_MASK |
- QSPI_SR_IP_ACC_MASK,
- false, 100, false);
+ ret = is_controller_busy(priv);
if (ret) {
debug("ERROR : The controller is busy\n");
generated by cgit (git 2.34.1) at 2024-12-25 04:58:02 +0000