diff options
Diffstat (limited to 'examples/standalone')
| -rw-r--r-- | examples/standalone/Makefile | 4 | ||||
| -rw-r--r-- | examples/standalone/interrupt.c | 65 | ||||
| -rw-r--r-- | examples/standalone/mem_to_mem_idma2intr.c | 379 | ||||
| -rw-r--r-- | examples/standalone/test_burst.c | 284 | ||||
| -rw-r--r-- | examples/standalone/test_burst.h | 22 | ||||
| -rw-r--r-- | examples/standalone/test_burst_lib.S | 154 | ||||
| -rw-r--r-- | examples/standalone/timer.c | 333 |
7 files changed, 0 insertions, 1241 deletions
diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 5a6ae0013c..c9d6206f29 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -9,9 +9,6 @@ extra-y := hello_world extra-$(CONFIG_SMC91111) += smc91111_eeprom extra-$(CONFIG_SMC911X) += smc911x_eeprom extra-$(CONFIG_SPI_FLASH_ATMEL) += atmel_df_pow2 -extra-$(CONFIG_MPC5xxx) += interrupt -extra-$(CONFIG_8xx) += test_burst timer -extra-$(CONFIG_MPC8260) += mem_to_mem_idma2intr extra-$(CONFIG_PPC) += sched # @@ -29,7 +26,6 @@ COBJS := $(ELF:=.o) LIB = $(obj)/libstubs.o LIBOBJS-$(CONFIG_PPC) += ppc_longjmp.o ppc_setjmp.o -LIBOBJS-$(CONFIG_8xx) += test_burst_lib.o LIBOBJS-y += stubs.o .SECONDARY: $(call objectify,$(COBJS)) diff --git a/examples/standalone/interrupt.c b/examples/standalone/interrupt.c deleted file mode 100644 index 6e0086015b..0000000000 --- a/examples/standalone/interrupt.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * (C) Copyright 2006 - * Detlev Zundel, DENX Software Engineering, dzu@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - * - * This is a very simple standalone application demonstrating - * catching IRQs on the MPC52xx architecture. - * - * The interrupt to be intercepted can be specified as an argument - * to the application. Specifying nothing will intercept IRQ1 on the - * MPC5200 platform. On the CR825 carrier board from MicroSys this - * maps to the ABORT switch :) - * - * Note that the specified vector is only a logical number specified - * by the respective header file. - */ - -#include <common.h> -#include <exports.h> -#include <config.h> - -#if defined(CONFIG_MPC5xxx) -#define DFL_IRQ MPC5XXX_IRQ1 -#else -#define DFL_IRQ 0 -#endif - -static void irq_handler (void *arg); - -int interrupt (int argc, char * const argv[]) -{ - int c, irq = -1; - - app_startup (argv); - - if (argc > 1) - irq = simple_strtoul (argv[1], NULL, 0); - if ((irq < 0) || (irq > NR_IRQS)) - irq = DFL_IRQ; - - printf ("Installing handler for irq vector %d and doing busy wait\n", - irq); - printf ("Press 'q' to quit\n"); - - /* Install interrupt handler */ - install_hdlr (irq, irq_handler, NULL); - while ((c = getc ()) != 'q') { - printf ("Ok, ok, I am still alive!\n"); - } - - free_hdlr (irq); - printf ("\nInterrupt handler has been uninstalled\n"); - - return (0); -} - -/* - * Handler for interrupt - */ -static void irq_handler (void *arg) -{ - /* just for demonstration */ - printf ("+"); -} diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c deleted file mode 100644 index ce6e6c4a10..0000000000 --- a/examples/standalone/mem_to_mem_idma2intr.c +++ /dev/null @@ -1,379 +0,0 @@ -/* The dpalloc function used and implemented in this file was derieved - * from PPCBoot/U-Boot file "arch/powerpc/cpu/mpc8260/commproc.c". - */ - -/* Author: Arun Dharankar <ADharankar@ATTBI.Com> - * This example is meant to only demonstrate how the IDMA could be used. - */ - -/* - * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's - * copyright notice: - * - * General Purpose functions for the global management of the - * 8260 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) - * 2.3.99 Updates - * - * In addition to the individual control of the communication - * channels, there are a few functions that globally affect the - * communication processor. - * - * Buffer descriptors must be allocated from the dual ported memory - * space. The allocator for that is here. When the communication - * process is reset, we reclaim the memory available. There is - * currently no deallocator for this memory. - */ - - -#include <common.h> -#include <console.h> -#include <exports.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define STANDALONE - -#ifndef STANDALONE /* Linked into/Part of PPCBoot */ -#include <command.h> -#include <watchdog.h> -#else /* Standalone app of PPCBoot */ -#define WATCHDOG_RESET() { \ - *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0x556c; \ - *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0xaa39; \ - } -#endif /* STANDALONE */ - -static int debug = 1; - -#define DEBUG(fmt, args...) { \ - if(debug != 0) { \ - printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \ - printf(fmt, ##args); \ - } \ -} - -#define CPM_CR_IDMA1_SBLOCK (0x14) -#define CPM_CR_IDMA2_SBLOCK (0x15) -#define CPM_CR_IDMA3_SBLOCK (0x16) -#define CPM_CR_IDMA4_SBLOCK (0x17) -#define CPM_CR_IDMA1_PAGE (0x07) -#define CPM_CR_IDMA2_PAGE (0x08) -#define CPM_CR_IDMA3_PAGE (0x09) -#define CPM_CR_IDMA4_PAGE (0x0a) -#define PROFF_IDMA1_BASE ((uint)0x87fe) -#define PROFF_IDMA2_BASE ((uint)0x88fe) -#define PROFF_IDMA3_BASE ((uint)0x89fe) -#define PROFF_IDMA4_BASE ((uint)0x8afe) - -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_FLG ((ushort)0x0001) - -#define mk_cr_cmd(PG, SBC, MCN, OP) \ - ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) - - -#pragma pack(1) -typedef struct ibdbits { - unsigned b_valid:1; - unsigned b_resv1:1; - unsigned b_wrap:1; - unsigned b_interrupt:1; - unsigned b_last:1; - unsigned b_resv2:1; - unsigned b_cm:1; - unsigned b_resv3:2; - unsigned b_sdn:1; - unsigned b_ddn:1; - unsigned b_dgbl:1; - unsigned b_dbo:2; - unsigned b_resv4:1; - unsigned b_ddtb:1; - unsigned b_resv5:2; - unsigned b_sgbl:1; - unsigned b_sbo:2; - unsigned b_resv6:1; - unsigned b_sdtb:1; - unsigned b_resv7:9; -} ibdbits_t; - -#pragma pack(1) -typedef union ibdbitsu { - ibdbits_t b; - uint i; -} ibdbitsu_t; - -#pragma pack(1) -typedef struct idma_buf_desc { - ibdbitsu_t ibd_bits; /* Status and Control */ - uint ibd_datlen; /* Data length in buffer */ - uint ibd_sbuf; /* Source buffer addr in host mem */ - uint ibd_dbuf; /* Destination buffer addr in host mem */ -} ibd_t; - - -#pragma pack(1) -typedef struct dcmbits { - unsigned b_fb:1; - unsigned b_lp:1; - unsigned b_resv1:3; - unsigned b_tc2:1; - unsigned b_resv2:1; - unsigned b_wrap:3; - unsigned b_sinc:1; - unsigned b_dinc:1; - unsigned b_erm:1; - unsigned b_dt:1; - unsigned b_sd:2; -} dcmbits_t; - -#pragma pack(1) -typedef union dcmbitsu { - dcmbits_t b; - ushort i; -} dcmbitsu_t; - -#pragma pack(1) -typedef struct pram_idma { - ushort pi_ibase; - dcmbitsu_t pi_dcmbits; - ushort pi_ibdptr; - ushort pi_dprbuf; - ushort pi_bufinv; /* internal to CPM */ - ushort pi_ssmax; - ushort pi_dprinptr; /* internal to CPM */ - ushort pi_sts; - ushort pi_dproutptr; /* internal to CPM */ - ushort pi_seob; - ushort pi_deob; - ushort pi_dts; - ushort pi_retadd; - ushort pi_resv1; /* internal to CPM */ - uint pi_bdcnt; - uint pi_sptr; - uint pi_dptr; - uint pi_istate; -} pram_idma_t; - - -volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; -volatile ibd_t *bdf; -volatile pram_idma_t *piptr; - -volatile int dmadone; -volatile int *dmadonep = &dmadone; -void dmadone_handler (void *); - -int idma_init (void); -void idma_start (int, int, int, uint, uint, int); -uint dpalloc (uint, uint); - - -uint dpinit_done = 0; - - -#ifdef STANDALONE -int ctrlc (void) -{ - if (tstc()) { - switch (getc ()) { - case 0x03: /* ^C - Control C */ - return 1; - default: - break; - } - } - return 0; -} -int memcmp(const void * cs,const void * ct,size_t count) -{ - const unsigned char *su1, *su2; - int res = 0; - for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--) - if ((res = *su1 - *su2) != 0) - break; - return res; -} -#endif /* STANDALONE */ - -#ifdef STANDALONE -int mem_to_mem_idma2intr (int argc, char * const argv[]) -#else -int do_idma (bd_t * bd, int argc, char * const argv[]) -#endif /* STANDALONE */ -{ - int i; - - app_startup(argv); - dpinit_done = 0; - - idma_init (); - - DEBUG ("Installing dma handler\n"); - install_hdlr (7, dmadone_handler, (void *) bdf); - - memset ((void *) 0x100000, 'a', 512); - memset ((void *) 0x200000, 'b', 512); - - for (i = 0; i < 32; i++) { - printf ("Startin IDMA, iteration=%d\n", i); - idma_start (1, 1, 512, 0x100000, 0x200000, 3); - } - - DEBUG ("Uninstalling dma handler\n"); - free_hdlr (7); - - return 0; -} - -void -idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype) -{ - /* ttype is for M-M, M-P, P-M or P-P: not used for now */ - - piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */ - piptr->pi_dcmbits.b.b_resv1 = 0; - - if (sinc == 1) - piptr->pi_dcmbits.b.b_sinc = 1; - else - piptr->pi_dcmbits.b.b_sinc = 0; - - if (dinc == 1) - piptr->pi_dcmbits.b.b_dinc = 1; - else - piptr->pi_dcmbits.b.b_dinc = 0; - - piptr->pi_dcmbits.b.b_erm = 0; - piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */ - - bdf->ibd_sbuf = sbuf; - bdf->ibd_dbuf = dbuf; - bdf->ibd_bits.b.b_cm = 0; - bdf->ibd_bits.b.b_interrupt = 1; - bdf->ibd_bits.b.b_wrap = 1; - bdf->ibd_bits.b.b_last = 1; - bdf->ibd_bits.b.b_sdn = 0; - bdf->ibd_bits.b.b_ddn = 0; - bdf->ibd_bits.b.b_dgbl = 0; - bdf->ibd_bits.b.b_ddtb = 0; - bdf->ibd_bits.b.b_sgbl = 0; - bdf->ibd_bits.b.b_sdtb = 0; - bdf->ibd_bits.b.b_dbo = 1; - bdf->ibd_bits.b.b_sbo = 1; - bdf->ibd_bits.b.b_valid = 1; - bdf->ibd_datlen = 512; - - *dmadonep = 0; - - immap->im_sdma.sdma_idmr2 = (uchar) 0xf; - - immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE, - CPM_CR_IDMA2_SBLOCK, 0x0, - 0x9) | 0x00010000; - - while (*dmadonep != 1) { - if (ctrlc ()) { - DEBUG ("\nInterrupted waiting for DMA interrupt.\n"); - goto done; - } - printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n", - dmadone, bdf->ibd_bits.b.b_valid); - udelay (1000000); - } - printf ("DMA complete notification received!\n"); - - done: - DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n", - sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512)); - - return; -} - -#define MAX_INT_BUFSZ 64 -#define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */ - -int idma_init (void) -{ - uint memaddr; - - immap->im_cpm.cp_rccr &= ~0x00F3FFFF; - immap->im_cpm.cp_rccr |= 0x00A00A00; - - memaddr = dpalloc (sizeof (pram_idma_t), 64); - - *(volatile u16 *)&immap->im_dprambase16 - [PROFF_IDMA2_BASE / sizeof(u16)] = memaddr; - piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr); - - piptr->pi_resv1 = 0; /* manual says: clear it */ - piptr->pi_dcmbits.b.b_fb = 0; - piptr->pi_dcmbits.b.b_lp = 1; - piptr->pi_dcmbits.b.b_erm = 0; - piptr->pi_dcmbits.b.b_dt = 0; - - memaddr = (uint) dpalloc (sizeof (ibd_t), 64); - piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr; - bdf = (volatile ibd_t *) ((uint) (immap) + memaddr); - bdf->ibd_bits.b.b_valid = 0; - - memaddr = (uint) dpalloc (64, 64); - piptr->pi_dprbuf = (volatile ushort) memaddr; - piptr->pi_dcmbits.b.b_wrap = 4; - piptr->pi_ssmax = 32; - - piptr->pi_sts = piptr->pi_ssmax; - piptr->pi_dts = piptr->pi_ssmax; - - return 1; -} - -void dmadone_handler (void *arg) -{ - immap->im_sdma.sdma_idmr2 = (uchar) 0x0; - - *dmadonep = 1; - - return; -} - - -static uint dpbase = 0; - -uint dpalloc (uint size, uint align) -{ - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - uint retloc; - uint align_mask, off; - uint savebase; - - /* Pointer to initial global data area */ - - if (dpinit_done == 0) { - dpbase = gd->arch.dp_alloc_base; - dpinit_done = 1; - } - - align_mask = align - 1; - savebase = dpbase; - - if ((off = (dpbase & align_mask)) != 0) - dpbase += (align - off); - - if ((off = size & align_mask) != 0) - size += align - off; - - if ((dpbase + size) >= gd->arch.dp_alloc_top) { - dpbase = savebase; - printf ("dpalloc: ran out of dual port ram!"); - return 0; - } - - retloc = dpbase; - dpbase += size; - - memset ((void *) &immr->im_dprambase[retloc], 0, size); - - return (retloc); -} diff --git a/examples/standalone/test_burst.c b/examples/standalone/test_burst.c deleted file mode 100644 index f2fdbf19dc..0000000000 --- a/examples/standalone/test_burst.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * (C) Copyright 2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - * - * The test exercises SDRAM accesses in burst mode - */ - -#include <common.h> -#include <exports.h> - -#include <commproc.h> -#include <asm/mmu.h> -#include <asm/processor.h> - -#include <serial.h> -#include <watchdog.h> - -#include "test_burst.h" - -/* 8 MB test region of physical RAM */ -#define TEST_PADDR 0x00800000 -/* The uncached virtual region */ -#define TEST_VADDR_NC 0x00800000 -/* The cached virtual region */ -#define TEST_VADDR_C 0x01000000 -/* When an error is detected, the address where the error has been found, - and also the current and the expected data will be written to - the following flash address -*/ -#define TEST_FLASH_ADDR 0x40100000 - -static void test_prepare (void); -static int test_burst_start (unsigned long size, unsigned long pattern); -static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached); -static int test_mmu_is_on(void); -static void test_desc(unsigned long size); -static void test_error(char * step, volatile void * addr, unsigned long val, unsigned long pattern); -static void signal_init(void); -static void signal_start(void); -static void signal_error(void); -static void test_usage(void); - -static unsigned long test_pattern [] = { - 0x00000000, - 0xffffffff, - 0x55555555, - 0xaaaaaaaa, -}; - - -int test_burst (int argc, char * const argv[]) -{ - unsigned long size = CACHE_LINE_SIZE; - unsigned int pass = 0; - int res = 0; - int i, j; - - if (argc == 3) { - char * d; - for (size = 0, d = argv[1]; *d >= '0' && *d <= '9'; d++) { - size *= 10; - size += *d - '0'; - } - if (size == 0 || *d) { - test_usage(); - return 1; - } - for (d = argv[2]; *d >= '0' && *d <= '9'; d++) { - pass *= 10; - pass += *d - '0'; - } - if (*d) { - test_usage(); - return 1; - } - } else if (argc > 3) { - test_usage(); - return 1; - } - - size += (CACHE_LINE_SIZE - 1); - size &= ~(CACHE_LINE_SIZE - 1); - - if (!test_mmu_is_on()) { - test_prepare(); - } - - test_desc(size); - - for (j = 0; !pass || j < pass; j++) { - for (i = 0; i < sizeof(test_pattern) / sizeof(test_pattern[0]); - i++) { - res = test_burst_start(size, test_pattern[i]); - if (res != 0) { - goto Done; - } - } - - printf ("Iteration #%d passed\n", j + 1); - - if (tstc() && 0x03 == getc()) - break; - } -Done: - return res; -} - -static void test_prepare (void) -{ - printf ("\n"); - - caches_init(); - disable_interrupts(); - mmu_init(); - - printf ("Interrupts are disabled\n"); - printf ("I-Cache is ON\n"); - printf ("D-Cache is ON\n"); - printf ("MMU is ON\n"); - - printf ("\n"); - - test_map_8M (TEST_PADDR, TEST_VADDR_NC, 0); - test_map_8M (TEST_PADDR, TEST_VADDR_C, 1); - - test_map_8M (TEST_FLASH_ADDR & 0xFF800000, TEST_FLASH_ADDR & 0xFF800000, 0); - - /* Configure GPIO ports */ - signal_init(); -} - -static int test_burst_start (unsigned long size, unsigned long pattern) -{ - volatile unsigned long * vaddr_c = (unsigned long *)TEST_VADDR_C; - volatile unsigned long * vaddr_nc = (unsigned long *)TEST_VADDR_NC; - int i, n; - int res = 1; - - printf ("Test pattern %08lx ...", pattern); - - n = size / 4; - - for (i = 0; i < n; i ++) { - vaddr_c [i] = pattern; - } - signal_start(); - flush_dcache_range((unsigned long)vaddr_c, (unsigned long)(vaddr_c + n) - 1); - - for (i = 0; i < n; i ++) { - register unsigned long tmp = vaddr_nc [i]; - if (tmp != pattern) { - test_error("2a", vaddr_nc + i, tmp, pattern); - goto Done; - } - } - - for (i = 0; i < n; i ++) { - register unsigned long tmp = vaddr_c [i]; - if (tmp != pattern) { - test_error("2b", vaddr_c + i, tmp, pattern); - goto Done; - } - } - - for (i = 0; i < n; i ++) { - vaddr_nc [i] = pattern; - } - - for (i = 0; i < n; i ++) { - register unsigned long tmp = vaddr_nc [i]; - if (tmp != pattern) { - test_error("3a", vaddr_nc + i, tmp, pattern); - goto Done; - } - } - - signal_start(); - for (i = 0; i < n; i ++) { - register unsigned long tmp = vaddr_c [i]; - if (tmp != pattern) { - test_error("3b", vaddr_c + i, tmp, pattern); - goto Done; - } - } - - res = 0; -Done: - printf(" %s\n", res == 0 ? "OK" : ""); - - return res; -} - -static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached) -{ - mtspr (MD_EPN, (vaddr & 0xFFFFFC00) | MI_EVALID); - mtspr (MD_TWC, MI_PS8MEG | MI_SVALID); - mtspr (MD_RPN, (paddr & 0xFFFFF000) | MI_BOOTINIT | (cached ? 0 : 2)); - mtspr (MD_AP, MI_Kp); -} - -static int test_mmu_is_on(void) -{ - unsigned long msr; - - asm volatile("mfmsr %0" : "=r" (msr) :); - - return msr & MSR_DR; -} - -static void test_desc(unsigned long size) -{ - printf( - "The following tests will be conducted:\n" - "1) Map %ld-byte region of physical RAM at 0x%08x\n" - " into two virtual regions:\n" - " one cached at 0x%08x and\n" - " the the other uncached at 0x%08x.\n", - size, TEST_PADDR, TEST_VADDR_NC, TEST_VADDR_C); - - puts( - "2) Fill the cached region with a pattern, and flush the cache\n" - "2a) Check the uncached region to match the pattern\n" - "2b) Check the cached region to match the pattern\n" - "3) Fill the uncached region with a pattern\n" - "3a) Check the cached region to match the pattern\n" - "3b) Check the uncached region to match the pattern\n" - "2b) Change the patterns and go to step 2\n" - "\n" - ); -} - -static void test_error( - char * step, volatile void * addr, unsigned long val, unsigned long pattern) -{ - volatile unsigned long * p = (void *)TEST_FLASH_ADDR; - - signal_error(); - - p[0] = (unsigned long)addr; - p[1] = val; - p[2] = pattern; - - printf ("\nError at step %s, addr %08lx: read %08lx, pattern %08lx", - step, (unsigned long)addr, val, pattern); -} - -static void signal_init(void) -{ -#if defined(GPIO1_INIT) - GPIO1_INIT; -#endif -#if defined(GPIO2_INIT) - GPIO2_INIT; -#endif -} - -static void signal_start(void) -{ -#if defined(GPIO1_INIT) - if (GPIO1_DAT & GPIO1_BIT) { - GPIO1_DAT &= ~GPIO1_BIT; - } else { - GPIO1_DAT |= GPIO1_BIT; - } -#endif -} - -static void signal_error(void) -{ -#if defined(GPIO2_INIT) - if (GPIO2_DAT & GPIO2_BIT) { - GPIO2_DAT &= ~GPIO2_BIT; - } else { - GPIO2_DAT |= GPIO2_BIT; - } -#endif -} - -static void test_usage(void) -{ - printf("Usage: go 0x40004 [size] [count]\n"); -} diff --git a/examples/standalone/test_burst.h b/examples/standalone/test_burst.h deleted file mode 100644 index 87f5927a8e..0000000000 --- a/examples/standalone/test_burst.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * (C) Copyright 2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEST_BURST_H -#define _TEST_BURST_H - -/* Cache line size */ -#define CACHE_LINE_SIZE 16 -/* Binary logarithm of the cache line size */ -#define LG_CACHE_LINE_SIZE 4 - -#ifndef __ASSEMBLY__ -extern void mmu_init(void); -extern void caches_init(void); -extern void flush_dcache_range(unsigned long start, unsigned long stop); -#endif - -#endif /* _TEST_BURST_H */ diff --git a/examples/standalone/test_burst_lib.S b/examples/standalone/test_burst_lib.S deleted file mode 100644 index fd3256e88b..0000000000 --- a/examples/standalone/test_burst_lib.S +++ /dev/null @@ -1,154 +0,0 @@ -/* - * (C) Copyright 2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> - -#include <ppc_asm.tmpl> -#include <ppc_defs.h> -#include <asm/cache.h> -#include <asm/mmu.h> -#include "test_burst.h" - - .text -/* - * void mmu_init(void); - * - * This function turns the MMU on - * - * Three 8 MByte regions are mapped 1:1, uncached - * - SDRAM lower 8 MByte - * - SDRAM higher 8 MByte - * - IMMR - */ - .global mmu_init -mmu_init: - tlbia /* Invalidate all TLB entries */ - li r8, 0 - mtspr MI_CTR, r8 /* Set instruction control to zero */ - lis r8, MD_RESETVAL@h - mtspr MD_CTR, r8 /* Set data TLB control */ - - /* Now map the lower 8 Meg into the TLBs. For this quick hack, - * we can load the instruction and data TLB registers with the - * same values. - */ - li r8, MI_EVALID /* Create EPN for address 0 */ - mtspr MI_EPN, r8 - mtspr MD_EPN, r8 - li r8, MI_PS8MEG /* Set 8M byte page */ - ori r8, r8, MI_SVALID /* Make it valid */ - mtspr MI_TWC, r8 - mtspr MD_TWC, r8 - li r8, MI_BOOTINIT|0x2 /* Create RPN for address 0 */ - mtspr MI_RPN, r8 /* Store TLB entry */ - mtspr MD_RPN, r8 - lis r8, MI_Kp@h /* Set the protection mode */ - mtspr MI_AP, r8 - mtspr MD_AP, r8 - - /* Now map the higher 8 Meg into the TLBs. For this quick hack, - * we can load the instruction and data TLB registers with the - * same values. - */ - lwz r9,20(r2) /* gd->ram_size */ - addis r9,r9,-0x80 - - mr r8, r9 /* Higher 8 Meg in SDRAM */ - ori r8, r8, MI_EVALID /* Mark page valid */ - mtspr MI_EPN, r8 - mtspr MD_EPN, r8 - li r8, MI_PS8MEG /* Set 8M byte page */ - ori r8, r8, MI_SVALID /* Make it valid */ - mtspr MI_TWC, r8 - mtspr MD_TWC, r8 - mr r8, r9 - ori r8, r8, MI_BOOTINIT|0x2 - mtspr MI_RPN, r8 /* Store TLB entry */ - mtspr MD_RPN, r8 - lis r8, MI_Kp@h /* Set the protection mode */ - mtspr MI_AP, r8 - mtspr MD_AP, r8 - - /* Map another 8 MByte at the IMMR to get the processor - * internal registers (among other things). - */ - mfspr r9, 638 /* Get current IMMR */ - andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */ - - mr r8, r9 /* Create vaddr for TLB */ - ori r8, r8, MD_EVALID /* Mark it valid */ - mtspr MD_EPN, r8 - li r8, MD_PS8MEG /* Set 8M byte page */ - ori r8, r8, MD_SVALID /* Make it valid */ - mtspr MD_TWC, r8 - mr r8, r9 /* Create paddr for TLB */ - ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ - mtspr MD_RPN, r8 - - /* We now have the lower and higher 8 Meg mapped into TLB entries, - * and the caches ready to work. - */ - mfmsr r0 - ori r0,r0,MSR_DR|MSR_IR - mtspr SRR1,r0 - mflr r0 - mtspr SRR0,r0 - SYNC - rfi /* enables MMU */ - -/* - * void caches_init(void); - */ - .globl caches_init -caches_init: - sync - - mfspr r3, IC_CST /* Clear error bits */ - mfspr r3, DC_CST - - lis r3, IDC_UNALL@h /* Unlock all */ - mtspr IC_CST, r3 - mtspr DC_CST, r3 - - lis r3, IDC_INVALL@h /* Invalidate all */ - mtspr IC_CST, r3 - mtspr DC_CST, r3 - - lis r3, IDC_ENABLE@h /* Enable all */ - mtspr IC_CST, r3 - mtspr DC_CST, r3 - - blr - -/* - * void flush_dcache_range(unsigned long start, unsigned long stop); - */ - .global flush_dcache_range -flush_dcache_range: - li r5,CACHE_LINE_SIZE-1 - andc r3,r3,r5 - subf r4,r3,r4 - add r4,r4,r5 - srwi. r4,r4,LG_CACHE_LINE_SIZE - beqlr - mtctr r4 - -1: dcbf 0,r3 - addi r3,r3,CACHE_LINE_SIZE - bdnz 1b - sync /* wait for dcbf's to get to ram */ - blr - -/* - * void disable_interrupts(void); - */ - .global disable_interrupts -disable_interrupts: - mfmsr r0 - rlwinm r0,r0,0,17,15 - mtmsr r0 - blr diff --git a/examples/standalone/timer.c b/examples/standalone/timer.c deleted file mode 100644 index dbd5c16f97..0000000000 --- a/examples/standalone/timer.c +++ /dev/null @@ -1,333 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <commproc.h> -#include <mpc8xx_irq.h> -#include <exports.h> - -DECLARE_GLOBAL_DATA_PTR; - -#undef DEBUG - -#define TIMER_PERIOD 1000000 /* 1 second clock */ - -static void timer_handler (void *arg); - - -/* Access functions for the Machine State Register */ -static __inline__ unsigned long get_msr(void) -{ - unsigned long msr; - - asm volatile("mfmsr %0" : "=r" (msr) :); - return msr; -} - -static __inline__ void set_msr(unsigned long msr) -{ - asm volatile("mtmsr %0" : : "r" (msr)); -} - -/* - * Definitions to access the CPM Timer registers - * See 8xx_immap.h for Internal Memory Map layout, - * and commproc.h for CPM Interrupt vectors (aka "IRQ"s) - */ - -typedef struct tid_8xx_cpmtimer_s { - int cpm_vec; /* CPM Interrupt Vector for this timer */ - ushort *tgcrp; /* Pointer to Timer Global Config Reg. */ - ushort *tmrp; /* Pointer to Timer Mode Register */ - ushort *trrp; /* Pointer to Timer Reference Register */ - ushort *tcrp; /* Pointer to Timer Capture Register */ - ushort *tcnp; /* Pointer to Timer Counter Register */ - ushort *terp; /* Pointer to Timer Event Register */ -} tid_8xx_cpmtimer_t; - -#ifndef CLOCKRATE -# define CLOCKRATE 64 -#endif - -#define CPMT_CLOCK_DIV 16 -#define CPMT_MAX_PRESCALER 256 -#define CPMT_MAX_REFERENCE 65535 /* max. unsigned short */ - -#define CPMT_MAX_TICKS (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER) -#define CPMT_MAX_TICKS_WITH_DIV (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER * CPMT_CLOCK_DIV) -#define CPMT_MAX_INTERVAL (CPMT_MAX_TICKS_WITH_DIV / CLOCKRATE) - -/* For now: always use max. prescaler value */ -#define CPMT_PRESCALER (CPMT_MAX_PRESCALER) - -/* CPM Timer Event Register Bits */ -#define CPMT_EVENT_CAP 0x0001 /* Capture Event */ -#define CPMT_EVENT_REF 0x0002 /* Reference Counter Event */ - -/* CPM Timer Global Config Register */ -#define CPMT_GCR_RST 0x0001 /* Reset Timer */ -#define CPMT_GCR_STP 0x0002 /* Stop Timer */ -#define CPMT_GCR_FRZ 0x0004 /* Freeze Timer */ -#define CPMT_GCR_GM_CAS 0x0008 /* Gate Mode / Cascade Timers */ -#define CPMT_GCR_MASK (CPMT_GCR_RST|CPMT_GCR_STP|CPMT_GCR_FRZ|CPMT_GCR_GM_CAS) - -/* CPM Timer Mode register */ -#define CPMT_MR_GE 0x0001 /* Gate Enable */ -#define CPMT_MR_ICLK_CASC 0x0000 /* Clock internally cascaded */ -#define CPMT_MR_ICLK_CLK 0x0002 /* Clock = system clock */ -#define CPMT_MR_ICLK_CLKDIV 0x0004 /* Clock = system clock / 16 */ -#define CPMT_MR_ICLK_TIN 0x0006 /* Clock = TINx signal */ -#define CPMT_MR_FRR 0x0008 /* Free Run / Restart */ -#define CPMT_MR_ORI 0x0010 /* Out. Reference Interrupt En. */ -#define CPMT_MR_OM 0x0020 /* Output Mode */ -#define CPMT_MR_CE_DIS 0x0000 /* Capture/Interrupt disabled */ -#define CPMT_MR_CE_RISE 0x0040 /* Capt./Interr. on rising TIN */ -#define CPMT_MR_CE_FALL 0x0080 /* Capt./Interr. on falling TIN */ -#define CPMT_MR_CE_ANY 0x00C0 /* Capt./Interr. on any TIN edge*/ - - -/* - * which CPM timer to use - index starts at 0 (= timer 1) - */ -#define TID_TIMER_ID 0 /* use CPM timer 1 */ - -void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval); - -static const char usage[] = "\n[q, b, e, ?] "; - -int timer (int argc, char * const argv[]) -{ - cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */ - tid_8xx_cpmtimer_t hw; - tid_8xx_cpmtimer_t *hwp = &hw; - int c; - int running; - - app_startup(argv); - - /* Pointer to CPM Timer structure */ - cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer; - - printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp); - - /* Initialize pointers depending on which timer we use */ - switch (TID_TIMER_ID) { - case 0: - hwp->tmrp = &(cpmtimerp->cpmt_tmr1); - hwp->trrp = &(cpmtimerp->cpmt_trr1); - hwp->tcrp = &(cpmtimerp->cpmt_tcr1); - hwp->tcnp = &(cpmtimerp->cpmt_tcn1); - hwp->terp = &(cpmtimerp->cpmt_ter1); - hwp->cpm_vec = CPMVEC_TIMER1; - break; - case 1: - hwp->tmrp = &(cpmtimerp->cpmt_tmr2); - hwp->trrp = &(cpmtimerp->cpmt_trr2); - hwp->tcrp = &(cpmtimerp->cpmt_tcr2); - hwp->tcnp = &(cpmtimerp->cpmt_tcn2); - hwp->terp = &(cpmtimerp->cpmt_ter2); - hwp->cpm_vec = CPMVEC_TIMER2; - break; - case 2: - hwp->tmrp = &(cpmtimerp->cpmt_tmr3); - hwp->trrp = &(cpmtimerp->cpmt_trr3); - hwp->tcrp = &(cpmtimerp->cpmt_tcr3); - hwp->tcnp = &(cpmtimerp->cpmt_tcn3); - hwp->terp = &(cpmtimerp->cpmt_ter3); - hwp->cpm_vec = CPMVEC_TIMER3; - break; - case 3: - hwp->tmrp = &(cpmtimerp->cpmt_tmr4); - hwp->trrp = &(cpmtimerp->cpmt_trr4); - hwp->tcrp = &(cpmtimerp->cpmt_tcr4); - hwp->tcnp = &(cpmtimerp->cpmt_tcn4); - hwp->terp = &(cpmtimerp->cpmt_ter4); - hwp->cpm_vec = CPMVEC_TIMER4; - break; - } - - hwp->tgcrp = &cpmtimerp->cpmt_tgcr; - - printf ("Using timer %d\n" - "tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x," - " tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n", - TID_TIMER_ID + 1, - (unsigned) hwp->tgcrp, - (unsigned) hwp->tmrp, - (unsigned) hwp->trrp, - (unsigned) hwp->tcrp, - (unsigned) hwp->tcnp, - (unsigned) hwp->terp - ); - - /* reset timer */ - *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID); - - /* clear all events */ - *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF); - - puts(usage); - running = 0; - while ((c = getc()) != 'q') { - if (c == 'b') { - - setPeriod (hwp, TIMER_PERIOD); /* Set period and start ticking */ - - /* Install interrupt handler (enable timer in CIMR) */ - install_hdlr (hwp->cpm_vec, timer_handler, hwp); - - printf ("Enabling timer\n"); - - /* enable timer */ - *hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID); - running = 1; - -#ifdef DEBUG - printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x," - " tcr=0x%x, tcn=0x%x, ter=0x%x\n", - *hwp->tgcrp, *hwp->tmrp, *hwp->trrp, - *hwp->tcrp, *hwp->tcnp, *hwp->terp - ); -#endif - } else if (c == 'e') { - - printf ("Stopping timer\n"); - - *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID); - running = 0; - -#ifdef DEBUG - printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x," - " tcr=0x%x, tcn=0x%x, ter=0x%x\n", - *hwp->tgcrp, *hwp->tmrp, *hwp->trrp, - *hwp->tcrp, *hwp->tcnp, *hwp->terp - ); -#endif - /* Uninstall interrupt handler */ - free_hdlr (hwp->cpm_vec); - - } else if (c == '?') { -#ifdef DEBUG - cpic8xx_t *cpm_icp = &((immap_t *) gd->bd->bi_immr_base)->im_cpic; - sysconf8xx_t *siup = &((immap_t *) gd->bd->bi_immr_base)->im_siu_conf; -#endif - - printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x," - " tcr=0x%x, tcn=0x%x, ter=0x%x\n", - *hwp->tgcrp, *hwp->tmrp, *hwp->trrp, - *hwp->tcrp, *hwp->tcnp, *hwp->terp - ); -#ifdef DEBUG - printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx," - " SIMASK=0x%08lx, SIPEND=0x%08lx\n", - siup->sc_siumcr, - siup->sc_sypcr, - siup->sc_simask, - siup->sc_sipend - ); - - printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n", - cpm_icp->cpic_cimr, - cpm_icp->cpic_cicr, - cpm_icp->cpic_cipr - ); -#endif - } else { - printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n"); - } - puts(usage); - } - if (running) { - printf ("Stopping timer\n"); - *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID); - free_hdlr (hwp->cpm_vec); - } - - return (0); -} - - -/* Set period in microseconds and start. - * Truncate to maximum period if more than this is requested - but warn about it. - */ - -void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval) -{ - unsigned short prescaler; - unsigned long ticks; - - printf ("Set interval %ld us\n", interval); - - /* Warn if requesting longer period than possible */ - if (interval > CPMT_MAX_INTERVAL) { - printf ("Truncate interval %ld to maximum (%d)\n", - interval, CPMT_MAX_INTERVAL); - interval = CPMT_MAX_INTERVAL; - } - /* - * Check if we want to use clock divider: - * Since the reference counter can be incremented only in integer steps, - * we try to keep it as big as possible to allow the resulting period to be - * as precise as possible. - */ - /* prescaler, enable interrupt, restart after ref count is reached */ - prescaler = (ushort) ((CPMT_PRESCALER - 1) << 8) | - CPMT_MR_ORI | - CPMT_MR_FRR; - - ticks = ((ulong) CLOCKRATE * interval); - - if (ticks > CPMT_MAX_TICKS) { - ticks /= CPMT_CLOCK_DIV; - prescaler |= CPMT_MR_ICLK_CLKDIV; /* use system clock divided by 16 */ - } else { - prescaler |= CPMT_MR_ICLK_CLK; /* use system clock without divider */ - } - -#ifdef DEBUG - printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n", - (ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1, - CPMT_PRESCALER, - (ticks / CPMT_PRESCALER), - ticks - ); -#endif - - /* set prescaler register */ - *hwp->tmrp = prescaler; - - /* clear timer counter */ - *hwp->tcnp = 0; - - /* set reference register */ - *hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER); - -#ifdef DEBUG - printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x," - " tcr=0x%x, tcn=0x%x, ter=0x%x\n", - *hwp->tgcrp, *hwp->tmrp, *hwp->trrp, - *hwp->tcrp, *hwp->tcnp, *hwp->terp - ); -#endif -} - -/* - * Handler for CPMVEC_TIMER1 interrupt - */ -static -void timer_handler (void *arg) -{ - tid_8xx_cpmtimer_t *hwp = (tid_8xx_cpmtimer_t *)arg; - - /* printf ("** TER1=%04x ** ", *hwp->terp); */ - - /* just for demonstration */ - printf ("."); - - /* clear all possible events: Ref. and Cap. */ - *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF); -} |