diff options
Diffstat (limited to 'include/configs/MPC8572DS.h')
| -rw-r--r-- | include/configs/MPC8572DS.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index ac0a4641e9..b60b3641f4 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -103,6 +103,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* DDR Setup */ #define CONFIG_SYS_DDR_TLB_START 9 +#define CONFIG_VERY_BIG_RAM #define CONFIG_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ @@ -403,10 +404,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* controller 3, direct to uli, tgtid 3, Base address 8000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 #ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc00000000ull #else +#define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000 #endif #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ @@ -421,10 +423,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* controller 2, Slot 2, tgtid 2, Base address 9000 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 #ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else +#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ @@ -439,10 +442,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* controller 1, Slot 1, tgtid 1, Base address a000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 #ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull #else +#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 #endif #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ |