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Diffstat (limited to 'include/configs/T102xQDS.h')
-rw-r--r--include/configs/T102xQDS.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 303c73bf1b..c9a1334ca5 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -12,9 +12,6 @@
#define __T1024QDS_H
/* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500 /* BOOKE e500 family */
-#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_ENABLE_36BIT_PHYS
@@ -25,7 +22,7 @@
#endif
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE
@@ -251,9 +248,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDR3
-#endif
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51