diff options
Diffstat (limited to 'include/configs/davinci_sffsdr.h')
| -rw-r--r-- | include/configs/davinci_sffsdr.h | 69 |
1 files changed, 21 insertions, 48 deletions
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 41a6763e8f..0e49e6c159 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -1,6 +1,9 @@ /* * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of @@ -21,30 +24,24 @@ #define __CONFIG_H #include <asm/sizes.h> -/*=======*/ /* Board */ -/*=======*/ #define SFFSDR #define CFG_NAND_LARGEPAGE #define CFG_USE_NAND -/*===================*/ +#define CFG_USE_DSPLINK /* This is to prevent U-Boot from + * powering ON the DSP. */ /* SoC Configuration */ -/*===================*/ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ #define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ #define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CFG_HZ 1000 -/*==================================================*/ -/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ -/*==================================================*/ +/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_I2C_EEPROM_ADDR 0x50 #define CFG_EEPROM_PAGE_WRITE_BITS 5 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 -/*=============*/ /* Memory Info */ -/*=============*/ #define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ #define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CFG_MEMTEST_START 0x80000000 /* memtest start address */ @@ -54,9 +51,7 @@ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ -/*====================*/ /* Serial Driver info */ -/*====================*/ #define CFG_NS16550 #define CFG_NS16550_SERIAL #define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ @@ -65,16 +60,12 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -/*===================*/ /* I2C Configuration */ -/*===================*/ #define CONFIG_HARD_I2C #define CONFIG_DRIVER_DAVINCI_I2C #define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ #define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ -/*==================================*/ /* Network & Ethernet Configuration */ -/*==================================*/ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT @@ -83,9 +74,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -/*=====================*/ /* Flash & Environment */ -/*=====================*/ #undef CFG_ENV_IS_IN_FLASH #define CFG_NO_FLASH #define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ @@ -98,28 +87,19 @@ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_MAX_CHIPS 1 #define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -/*=====================*/ -/* Board related stuff */ -/*=====================*/ -/*==========================================*/ -/* I2C switch definitions for PCA9543 chip */ -/* on Lyrtech SFF SDR board. */ -/* This chip has a single register. */ -/*==========================================*/ +/* I2C switch definitions for PCA9543 chip */ #define CFG_I2C_PCA9543_ADDR 0x70 -#define CFG_I2C_PCA9543_ADDR_LEN 0 +#define CFG_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ #define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ -/*==============================*/ /* U-Boot general configuration */ -/*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R -#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -/* Print buffer size */ -#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_PBSIZE \ + (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print buffer size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel @@ -133,25 +113,20 @@ #define CFG_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -/* - * Define this to load an Integrity kernel. - * -#define CONFIG_CMD_ELF - */ - -/*===================*/ /* Linux Information */ -/*===================*/ #define LINUX_BOOT_PARAM_ADDR 0x80000100 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTARGS \ - "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" -#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" - -/*=================*/ +#define CONFIG_BOOTARGS \ + "mem=56M " \ + "console=ttyS0,115200n8 " \ + "root=/dev/nfs rw noinitrd ip=dhcp " \ + "nfsroot=${serverip}:/nfsroot/sffsdr " \ + "eth0=${ethaddr}" +#define CONFIG_BOOTCOMMAND \ + "nand read 87A00000 100000 300000;" \ + "bootelf 87A00000" /* U-Boot commands */ -/*=================*/ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -167,9 +142,7 @@ #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS -/*=======================*/ /* KGDB support (if any) */ -/*=======================*/ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |