summaryrefslogtreecommitdiff
path: root/include/configs/devkit3250.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/configs/devkit3250.h')
-rw-r--r--include/configs/devkit3250.h145
1 files changed, 140 insertions, 5 deletions
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 4f35234ced..cc6a53e675 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -1,7 +1,7 @@
/*
* Embest/Timll DevKit3250 board configuration file
*
- * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
+ * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -21,7 +21,9 @@
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
+#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
#define CONFIG_BOARD_EARLY_INIT_F
/*
@@ -43,10 +45,44 @@
/*
* Serial Driver
*/
-#define CONFIG_SYS_LPC32XX_UART 2 /* UART2 */
+#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
#define CONFIG_BAUDRATE 115200
/*
+ * I2C
+ */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LPC32XX
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_CMD_I2C
+
+/*
+ * GPIO
+ */
+#define CONFIG_LPC32XX_GPIO
+#define CONFIG_CMD_GPIO
+
+/*
+ * SSP/SPI
+ */
+#define CONFIG_LPC32XX_SSP
+#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
+#define CONFIG_CMD_SPI
+
+/*
+ * Ethernet
+ */
+#define CONFIG_RMII
+#define CONFIG_PHY_SMSC
+#define CONFIG_LPC32XX_ETH
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ADDR 0x1F
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+/*
* NOR Flash
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1
@@ -56,6 +92,29 @@
#define CONFIG_SYS_FLASH_CFI
/*
+ * NAND controller
+ */
+#define CONFIG_NAND_LPC32XX_SLC
+#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
+
+/*
+ * NAND chip timings
+ */
+#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
+#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
+#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
+#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
+#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
+#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
+#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
+#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
+
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_CMD_NAND
+
+/*
* U-Boot General Configurations
*/
#define CONFIG_SYS_LONGHELP
@@ -71,8 +130,33 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
-#define CONFIG_ENV_IS_NOWHERE
+/*
+ * Pass open firmware flat tree
+ */
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SIZE SZ_128K
+#define CONFIG_ENV_OFFSET 0x000A0000
+
+#define CONFIG_BOOTCOMMAND \
+ "dhcp; " \
+ "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
+ "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
+ "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \
+ "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \
+ "bootm ${loadaddr} - ${dtbaddr}"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "autoload=no\0" \
+ "ethaddr=00:01:90:00:C0:81\0" \
+ "dtbaddr=0x81000000\0" \
+ "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
+ "tftpdir=vladimir/oe/devkit3250\0" \
+ "userargs=oops=panic\0"
/*
* U-Boot Commands
@@ -85,13 +169,64 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 1
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS2,115200n8"
+#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR 0x80008000
/*
+ * SPL specific defines
+ */
+/* SPL will be executed at offset 0 */
+#define CONFIG_SPL_TEXT_BASE 0x00000000
+
+/* SPL will use SRAM as stack */
+#define CONFIG_SPL_STACK 0x0000FFF8
+#define CONFIG_SPL_BOARD_INIT
+
+/* Use the framework and generic lib */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
+/* SPL will use serial */
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+/* SPL loads an image from NAND */
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+
+#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
+#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
+#define CONFIG_SYS_NAND_ECCSIZE 0x100
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
+ 48, 49, 50, 51, 52, 53, 54, 55, \
+ 56, 57, 58, 59, 60, 61, 62, 63, }
+#define CONFIG_SYS_NAND_ECCBYTES 3
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SOFTECC
+
+#define CONFIG_SPL_MAX_SIZE 0x20000
+#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+
+/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
+/* See common/spl/spl.c spl_set_header_raw_uboot() */
+#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
+
+/*
* Include SoC specific configuration
*/
#include <asm/arch/config.h>