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-rw-r--r--include/configs/p2771-0000.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h
index 564069a665..29940a63de 100644
--- a/include/configs/p2771-0000.h
+++ b/include/configs/p2771-0000.h
@@ -24,9 +24,32 @@
/* PCI host support */
+#define BOARD_EXTRA_ENV_SETTINGS \
+ "calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \
+ "ramdisk_addr_r\0" \
+ "kernel_addr_r_align=00200000\0" \
+ "kernel_addr_r_offset=00080000\0" \
+ "kernel_addr_r_size=02000000\0" \
+ "kernel_addr_r_aliases=loadaddr\0" \
+ "fdt_addr_r_align=00200000\0" \
+ "fdt_addr_r_offset=00000000\0" \
+ "fdt_addr_r_size=00200000\0" \
+ "scriptaddr_align=00200000\0" \
+ "scriptaddr_offset=00000000\0" \
+ "scriptaddr_size=00200000\0" \
+ "pxefile_addr_r_align=00200000\0" \
+ "pxefile_addr_r_offset=00000000\0" \
+ "pxefile_addr_r_size=00200000\0" \
+ "ramdisk_addr_r_align=00200000\0" \
+ "ramdisk_addr_r_offset=00000000\0" \
+ "ramdisk_addr_r_size=02000000\0"
+
#include "tegra-common-post.h"
/* Crystal is 38.4MHz. clk_m runs at half that rate */
#define COUNTER_FREQUENCY 19200000
+#undef CONFIG_NR_DRAM_BANKS
+#define CONFIG_NR_DRAM_BANKS (1024 + 2)
+
#endif