diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/bmips_common.h | 6 | ||||
| -rw-r--r-- | include/configs/ci20.h | 72 | ||||
| -rw-r--r-- | include/configs/edison.h | 10 | ||||
| -rw-r--r-- | include/configs/embestmx6boards.h | 13 | ||||
| -rw-r--r-- | include/configs/helios4.h | 2 | ||||
| -rw-r--r-- | include/configs/imx8mq_evk.h | 252 | ||||
| -rw-r--r-- | include/configs/mt7623.h | 2 | ||||
| -rw-r--r-- | include/configs/omap3_igep00x0.h | 4 | ||||
| -rw-r--r-- | include/configs/pcm058.h | 1 | ||||
| -rw-r--r-- | include/configs/pico-imx7d.h | 14 | ||||
| -rw-r--r-- | include/configs/uniphier.h | 26 | ||||
| -rw-r--r-- | include/configs/vcoreiii.h | 82 |
12 files changed, 466 insertions, 18 deletions
diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 39ca2e0bf3..788f4af70d 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -6,6 +6,10 @@ #ifndef __CONFIG_BMIPS_COMMON_H #define __CONFIG_BMIPS_COMMON_H +/* ETH */ +#define CONFIG_PHY_RESET_DELAY 20 +#define CONFIG_SYS_RX_ETH_BUFFER 6 + /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } @@ -16,7 +20,7 @@ /* Memory usage */ #define CONFIG_SYS_MAXARGS 24 -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/ci20.h b/include/configs/ci20.h new file mode 100644 index 0000000000..9a3621329d --- /dev/null +++ b/include/configs/ci20.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * CI20 configuration + * + * Copyright (c) 2013 Imagination Technologies + * Author: Paul Burton <paul.burton@imgtec.com> + */ + +#ifndef __CONFIG_CI20_H__ +#define __CONFIG_CI20_H__ + +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* Ingenic JZ4780 clock configuration. */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MHZ 1200 +#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) + +/* Memory configuration */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CONFIG_SYS_LOAD_ADDR 0x81000000 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x88000000 + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +/* NS16550-ish UARTs */ +#define CONFIG_SYS_NS16550_CLK 48000000 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* Ethernet: davicom DM9000 */ +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DM9000_BASE 0xb6000000 +#define DM9000_IO CONFIG_DM9000_BASE +#define DM9000_DATA (CONFIG_DM9000_BASE + 2) + +/* Environment */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE (32 << 10) +#define CONFIG_ENV_OFFSET ((14 + 512) << 10) +#define CONFIG_ENV_OVERWRITE + +/* Command line configuration. */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot argument buffer size */ +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ + +/* Miscellaneous configuration options */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) + +/* SPL */ +#define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ + +#define CONFIG_SPL_TEXT_BASE 0xf4000a00 +#define CONFIG_SPL_MAX_SIZE ((14 * 1024) - 0xa00) + +#define CONFIG_SPL_BSS_START_ADDR 0xf4004000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 512KB, arbitrary */ + +#define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" + +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */ + +#endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/edison.h b/include/configs/edison.h index 86c584d73d..a6155ba5a8 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -8,13 +8,6 @@ #include <asm/ibmpc.h> -/* ACPI */ - -/* Boot */ -#define CONFIG_BOOTCOMMAND "run bootcmd" - -/* DISK Partition support */ - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 2048 @@ -43,9 +36,6 @@ #define CONFIG_ENV_OFFSET_REDUND (6 * 1024 * 1024) #define CONFIG_SUPPORT_EMMC_BOOT -/* PCI */ -#define CONFIG_CMD_PCI - /* RTC */ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 71217f07e2..7e7de4dae6 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -109,6 +109,19 @@ #include "mx6_common.h" +#ifdef CONFIG_SPL +#include "imx6_spl.h" +/* RiOTboard */ +#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb" + +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */ + +#endif + /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, * 1M script, 1M pxe and the ramdisk at the end */ #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 3157225f06..4e98f19a40 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -118,7 +118,7 @@ #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h new file mode 100644 index 0000000000..35f81152f2 --- /dev/null +++ b/include/configs/imx8mq_evk.h @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __IMX8M_EVK_H +#define __IMX8M_EVK_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CSF_SIZE 0x2000 /* 8K region */ +#endif + +#define CONFIG_SPL_TEXT_BASE 0x7E1000 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 + +#ifdef CONFIG_SPL_BUILD +/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x187FF0 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_BSS_START_ADDR 0x00180000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ +#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x182000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#undef CONFIG_DM_MMC +#undef CONFIG_DM_PMIC +#undef CONFIG_DM_PMIC_PFUZE100 + +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#undef CONFIG_CMD_EXPORTENV +#undef CONFIG_CMD_IMPORTENV +#undef CONFIG_CMD_IMLS + +#undef CONFIG_CMD_CRC32 +#undef CONFIG_BOOTM_NETBSD + +/* ENET Config */ +/* ENET1 */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_MII +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_FEC_MXC +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC + +#define CONFIG_PHY_GIGE +#define IMX_FEC_BASE 0x30BE0000 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#endif + +#define CONFIG_MFG_ENV_SETTINGS \ + "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + "clk_ignore_unused "\ + "\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffff\0" \ + "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=Image\0" \ + "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \ + "fdt_addr=0x43000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "boot_fdt=try\0" \ + "fdt_file=fsl-imx8mq-evk.dtb\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x40480000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_OFFSET (64 * SZ_64K) +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + (PHYS_SDRAM_SIZE >> 1)) + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR + +/* Monitor Command Prompt */ +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "u-boot=> " +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_IMX_BOOTAUX + +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE +#define CONFIG_CMD_FAT + +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_OCOTP +#define CONFIG_CMD_FUSE + +/* I2C Configs */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_OF_SYSTEM_SETUP + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_DM_PMIC +#endif + +#endif diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 68da920e30..ba763501cf 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -46,7 +46,7 @@ /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* This is neede for kernel booting */ +/* This is needed for kernel booting */ #define FDT_HIGH "fdt_high=0xac000000\0" /* Extra environment variables */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index b9d6569752..775374cf28 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -20,10 +20,6 @@ #define CONFIG_REVISION_TAG 1 -/* GPIO banks */ -#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO bank 2 */ -#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO bank 4 */ - /* TPS65950 */ #define PBIASLITEVMODE1 (1 << 8) diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 49048c163f..b9bc08b388 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -55,6 +55,7 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_USE_FLASH_BBT #endif /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 2bc42a04a0..1884c5844d 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -134,7 +134,19 @@ /* FLASH and environment organization */ #define CONFIG_ENV_SIZE SZ_8K -#define CONFIG_ENV_OFFSET (8 * SZ_64K) +/* Environment starts at 768k = 768 * 1024 = 786432 */ +#define CONFIG_ENV_OFFSET 786432 +/* + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.img offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 69k = 699k = 715776 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 715776 + #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 0 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 70f8712b60..95d6452553 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -124,6 +124,8 @@ "third_image=u-boot.bin\0" #endif +#define CONFIG_PREBOOT "env exist ${bootdev}preboot && run ${bootdev}preboot" + #define CONFIG_ROOTPATH "/nfs/root/path" #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs $bootargs root=/dev/nfs rw " \ @@ -169,8 +171,32 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "initrd_high=0xffffffffffffffff\0" \ + "script=boot.scr\0" \ "scriptaddr=0x85000000\0" \ "nor_base=0x42000000\0" \ + "emmcboot=mmcsetn && run bootcmd_mmc${mmc_first_dev}\0" \ + "nandboot=run bootcmd_ubifs0\0" \ + "norboot=run tftpboot\0" \ + "usbboot=run bootcmd_usb0\0" \ + "emmcscript=setenv devtype mmc && " \ + "mmcsetn && " \ + "setenv devnum ${mmc_first_dev} && " \ + "run loadscript_fat\0" \ + "nandscript=echo Running ${script} from ubi ... && " \ + "ubi part UBI && " \ + "ubifsmount ubi0:boot && " \ + "ubifsload ${loadaddr} ${script} && " \ + "source\0" \ + "norscript=echo Running ${script} from tftp ... && " \ + "tftpboot ${script} &&" \ + "source\0" \ + "usbscript=usb start && " \ + "setenv devtype usb && " \ + "setenv devnum 0 && " \ + "run loadscript_fat\0" \ + "loadscript_fat=echo Running ${script} from ${devtype}${devnum} ... && " \ + "load ${devtype} ${devnum}:1 ${loadaddr} ${script} && " \ + "source\0" \ "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ "tftpboot $tmp_addr $second_image && " \ "setexpr tmp_addr $nor_base + 0x70000 && " \ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h new file mode 100644 index 0000000000..df89cdaebf --- /dev/null +++ b/include/configs/vcoreiii.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#ifndef __VCOREIII_H +#define __VCOREIII_H + +#include <linux/sizes.h> + +/* Onboard devices */ + +#define CONFIG_SYS_MALLOC_LEN 0x100000 +#define CONFIG_SYS_LOAD_ADDR 0x00100000 +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */ +#ifdef CONFIG_SOC_LUTON +#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333 +#else +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) +#endif +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ + +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET) +#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_SIZE (256 * 1024) +#define CONFIG_ENV_SECT_SIZE (256 * 1024) + +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) + +#define CONFIG_ENV_SPI_MAX_HZ 0 /* This force to read from DT */ +#define CONFIG_ENV_SPI_MODE 0 /* This force to read from DT */ +#endif + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) +#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT) +#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M) +#elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16) +#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M) +#else +#error Unknown DDR size - please add! +#endif + +#define CONFIG_CONS_INDEX 1 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M) + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_BOARD_EARLY_INIT_R +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) +#define VCOREIII_DEFAULT_MTD_ENV \ + "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ + "mtdids="CONFIG_MTDIDS_DEFAULT"\0" +#else +#define VCOREIII_DEFAULT_MTD_ENV /* Go away */ +#endif + +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + VCOREIII_DEFAULT_MTD_ENV \ + "loadaddr=0x81000000\0" \ + "spi_image_off=0x00100000\0" \ + "console=ttyS0,115200\0" \ + "setup=setenv bootargs console=${console} ${mtdparts}" \ + "${bootargs_extra}\0" \ + "spiboot=run setup; sf probe; sf read ${loadaddr}" \ + "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \ + "ubootfile=u-boot.bin\0" \ + "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \ + "sf erase UBoot 0x100000;" \ + "sf write ${loadaddr} UBoot ${filesize}\0" \ + "bootcmd=run spiboot\0" \ + "" +#endif /* __VCOREIII_H */ |