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-rw-r--r--include/configs/AR405.h4
-rw-r--r--include/configs/CPCI405.h3
-rw-r--r--include/configs/CPCI4052.h3
-rw-r--r--include/configs/CPCI440.h4
-rw-r--r--include/configs/DU405.h4
-rw-r--r--include/configs/OCRTC.h2
6 files changed, 20 insertions, 0 deletions
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 56bb15b050..acb2fb678c 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -122,6 +122,10 @@
#define CONFIG_PCI_PNP /* do pci plug-and-play */
/* resource configuration */
+#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x0403 /* PCI Device ID: ARISTO405 */
#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 6b983472d7..845b47bebf 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -74,6 +74,7 @@
CFG_CMD_IRQ | \
CFG_CMD_IDE | \
CFG_CMD_ELF | \
+ CFG_CMD_MII | \
CFG_CMD_EEPROM )
#define CONFIG_MAC_PARTITION
@@ -144,6 +145,8 @@
#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 05338274e7..18cec98846 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -80,6 +80,7 @@
CFG_CMD_DATE | \
CFG_CMD_JFFS2 | \
CFG_CMD_I2C | \
+ CFG_CMD_MII | \
CFG_CMD_EEPROM )
#define CONFIG_MAC_PARTITION
@@ -150,6 +151,8 @@
#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
diff --git a/include/configs/CPCI440.h b/include/configs/CPCI440.h
index 04ce99dfa1..55bb1ec673 100644
--- a/include/configs/CPCI440.h
+++ b/include/configs/CPCI440.h
@@ -237,6 +237,10 @@
#define CONFIG_PCI_PNP /* do pci plug-and-play */
/* resource configuration */
+#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
#define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 1bf40d951f..bac6221194 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -120,6 +120,10 @@
#define CONFIG_PCI_PNP /* do pci plug-and-play */
/* resource configuration */
+#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x0404 /* PCI Device ID: CPCI-ISER4 */
#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index 5971fb42e8..0ac456ab57 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -120,6 +120,8 @@
#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
+#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
+
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x0410 /* PCI Device ID: OCRTC */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/