diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/syzygy_hub.h | 72 | ||||
| -rw-r--r-- | include/configs/xilinx_zynqmp.h | 1 | ||||
| -rw-r--r-- | include/configs/zynq-common.h | 13 | ||||
| -rw-r--r-- | include/configs/zynq_cse.h | 53 |
4 files changed, 125 insertions, 14 deletions
diff --git a/include/configs/syzygy_hub.h b/include/configs/syzygy_hub.h new file mode 100644 index 0000000000..4147b45ef0 --- /dev/null +++ b/include/configs/syzygy_hub.h @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2012 Xilinx + * (C) Copyright 2017 Opal Kelly Inc. + * + * Configuration settings for the SYZYGY Hub development board + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_SYZYGY_HUB_H +#define __CONFIG_SYZYGY_HUB_H + +#define CONFIG_ZYNQ_I2C1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57 +#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fit_image=fit.itb\0" \ + "bitstream_image=download.bit\0" \ + "loadbit_addr=0x1000000\0" \ + "load_addr=0x2000000\0" \ + "fit_size=0x800000\0" \ + "flash_off=0x100000\0" \ + "nor_flash_off=0xE2100000\0" \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" \ + "loadbootenv_addr=0x2000000\0" \ + "fdt_addr_r=0x1f00000\0" \ + "pxefile_addr_r=0x2000000\0" \ + "kernel_addr_r=0x2000000\0" \ + "scriptaddr=0x3000000\0" \ + "ramdisk_addr_r=0x3100000\0" \ + "bootenv=uEnv.txt\0" \ + "bootenv_dev=mmc\0" \ + "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ + "env import -t ${loadbootenv_addr} $filesize\0" \ + "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ + "setbootenv=if env run bootenv_existence_test; then " \ + "if env run loadbootenv; then " \ + "env run importbootenv; " \ + "fi; " \ + "fi; \0" \ + "sd_loadbootenv=set bootenv_dev mmc && " \ + "run setbootenv \0" \ + "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv\0" \ + "preboot=if test $modeboot = sdboot; then " \ + "run sd_loadbootenv; " \ + "echo Checking if uenvcmd is set ...; " \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...; " \ + "run uenvcmd; " \ + "fi; " \ + "fi; \0" \ + "sdboot=echo Copying FPGA Bitstream from SD to RAM... && " \ + "load mmc 0 ${loadbit_addr} ${bitstream_image} && " \ + "echo Programming FPGA... && " \ + "fpga loadb 0 ${loadbit_addr} ${filesize} && " \ + "echo Copying FIT from SD to RAM... && " \ + "load mmc 0 ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" \ + "jtagboot=echo TFTPing FIT to RAM... && " \ + "tftpboot ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" \ + DFU_ALT_INFO \ + BOOTENV + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_SYZYGY_HUB_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 8526ba0e88..14604eb4e8 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -42,7 +42,6 @@ /* Serial setup */ #define CONFIG_ARM_DCC #define CONFIG_CPU_ARMV8 -#define CONFIG_ZYNQ_SERIAL #define CONFIG_CONS_INDEX 0 #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b9599c73a6..7247c90307 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -33,7 +33,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} #define CONFIG_ARM_DCC -#define CONFIG_ZYNQ_SERIAL /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) @@ -157,12 +156,6 @@ /* Environment */ #ifndef CONFIG_ENV_IS_NOWHERE -# ifdef CONFIG_MTD_NOR_FLASH -/* Environment in NOR flash */ -# elif defined(CONFIG_ZYNQ_QSPI) -/* Environment in Serial Flash */ -# endif - # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE # define CONFIG_ENV_OFFSET 0xE0000 #endif @@ -293,16 +286,11 @@ GENERATED_GBL_DATA_SIZE) /* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX #define CONFIG_FPGA_ZYNQPL /* FIT support */ #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ -/* FDT support */ -#define CONFIG_DISPLAY_BOARDINFO_LATE - /* Extend size of kernel image for uncompression */ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) @@ -325,7 +313,6 @@ /* Disable dcache for SPL just for sure */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_DCACHE_OFF -#undef CONFIG_FPGA #endif /* Address in RAM where the parameters must be copied by SPL. */ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h new file mode 100644 index 0000000000..dd65b52343 --- /dev/null +++ b/include/configs/zynq_cse.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2013 - 2017 Xilinx. + * + * Configuration settings for the Xilinx Zynq CSE board. + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_CSE_H +#define __CONFIG_ZYNQ_CSE_H + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_ICACHE_OFF + +#include <configs/zynq-common.h> + +/* Undef unneeded configs */ +#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CONFIG_BOARD_LATE_INIT +#undef CONFIG_BOOTCOMMAND +#undef CONFIG_ENV_SIZE +#undef CONFIG_CMDLINE_EDITING +#undef CONFIG_AUTO_COMPLETE +#undef CONFIG_ZLIB +#undef CONFIG_GZIP + +#undef CONFIG_SYS_LONGHELP + +#undef CONFIG_SYS_CBSIZE +#undef CONFIG_BOOTM_VXWORKS +#undef CONFIG_BOOTM_LINUX + +#define CONFIG_SYS_CBSIZE 1024 + +#define CONFIG_ENV_SIZE 400 +#undef CONFIG_SYS_INIT_RAM_ADDR +#undef CONFIG_SYS_INIT_RAM_SIZE +#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#undef CONFIG_SPL_BSS_START_ADDR +#undef CONFIG_SPL_BSS_MAX_SIZE +#define CONFIG_SPL_BSS_START_ADDR 0x20000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x8000 + +#undef CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_MALLOC_LEN 0x1000 + +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 + +#endif /* __CONFIG_ZYNQ_CSE_H */ |