diff options
Diffstat (limited to 'include/configs')
83 files changed, 649 insertions, 405 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 252e1272c3..42b3337216 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -194,9 +194,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DDR_SPD #define CONFIG_SYS_DDR_RAW_TIMING -#ifndef CONFIG_SPL_BUILD -#define CONFIG_FSL_DDR_INTERACTIVE -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 49bb38279a..f385509daf 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ #define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */ -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 86a1233e32..1413b3dcfe 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -83,7 +83,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index b8a9b5c638..13ca2c395d 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -67,7 +67,6 @@ /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 13ad04e279..e00a56e2fd 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void); /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6ad0849cec..280b873aee 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -45,7 +45,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b09cbab292..be600becfe 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -56,7 +56,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index bac8456825..5b3933412c 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void); /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index d28a35f87b..5ba2b6d643 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -66,7 +66,6 @@ /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 5da70bb83e..9b3485ed4b 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -44,7 +44,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 0edcc2ed72..de5a7ca959 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void); #endif /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index cff3ca9bce..13fbbb3044 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -73,7 +73,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index a3f29c5f9e..b534d4758b 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -72,7 +72,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD for DDR */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index bb6dd95d59..9318b190ae 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -97,7 +97,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * DDR Setup */ -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index ada00ae8bb..4f6ee22385 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -59,7 +59,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE 512u /* DDR is 512M */ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x50 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index c72be9fb38..b0f93abf98 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -236,7 +236,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_FSL_DDR_INTERACTIVE #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2d5c96f335..147ef71084 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -140,7 +140,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 69ec109831..9ca384cc0c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -189,9 +189,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 1d6a390b72..446e4268ef 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -175,7 +175,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 42252c7c42..f42a4f4af0 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -112,7 +112,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 1bbe9d9b37..6a0254a55b 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -133,7 +133,6 @@ #define CONFIG_DDR_SPD #endif #define CONFIG_SYS_SPD_BUS_NUM 1 -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M #define CONFIG_CHIP_SELECTS_PER_CTRL 1 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index eb50012ff7..300f56541e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -71,6 +71,7 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index d61fdf9f7a..70aa425060 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -35,11 +35,22 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK +#ifdef CONFIG_SPL_DFU +#ifndef CONFIG_SPL_BUILD #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_EMMC \ DFU_ALT_INFO_RAM \ + DFU_ALT_INFO_QSPI +#else +#undef CONFIG_CMD_BOOTD +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_RAM +#endif +#endif #include <configs/ti_omap5_common.h> diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 667d084611..1d296ba51a 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -14,15 +14,10 @@ #define CONFIG_ARCH_MISC_INIT -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* SD/MMC support */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ @@ -32,9 +27,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - /* PCI host support */ #undef CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 646086a956..77a5968cc2 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -12,28 +12,18 @@ #include "tegra30-common.h" -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* PCI host support */ - /* PCI networking support */ #define CONFIG_E1000_NO_NVM diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 73629ddeb0..a11a800a71 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -22,9 +22,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_BEAVER -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -36,15 +33,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index f78a4e10a9..601b30dffd 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -24,17 +24,7 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_POWER_TPS65217 - #define CONFIG_MACH_TYPE 3589 -/* I2C IP block */ -#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000 - -/* MMC/SD IP block */ -#define CONFIG_SUPPORT_EMMC_BOOT - -/* Always 64 KiB env size */ -#define CONFIG_ENV_SIZE (64 << 10) #ifndef CONFIG_SPL_BUILD @@ -80,13 +70,11 @@ BUR_COMMON_ENV \ /* USB configuration */ #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_HOST -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST +/* Environment */ #define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index dcb66a6f9a..6b2553c73b 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -26,9 +26,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_CARDHU -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -40,15 +37,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 14008440da..74305f1b6e 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -22,9 +22,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -35,15 +32,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 4a18c72a53..6c4e9d4154 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -10,8 +10,6 @@ #include "tegra20-common.h" -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_SDIO1 @@ -19,15 +17,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_TEGRA2 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 - -/* USB networking support */ - /* General networking support */ #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 1536 @@ -40,8 +29,6 @@ #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* Dynamic MTD partition support */ - /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define CONFIG_ENV_OFFSET (SZ_2M) #undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 908b3bde3e..7ece00e646 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -20,20 +20,12 @@ #define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T30 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - /* General networking support */ #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 16352 diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 9a8b5a7357..9b25a9d59d 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -19,9 +19,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DALMORE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -32,13 +29,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h index dd7a01290a..30c0c7fee7 100644 --- a/include/configs/e2220-1170.h +++ b/include/configs/e2220-1170.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/harmony.h b/include/configs/harmony.h index fc5ed5b2fd..f873cea265 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -29,16 +29,9 @@ #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* Dynamic MTD partition support */ - /* Environment in NAND (which is 512M), aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 003cd75baf..60c6bde16e 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -81,8 +81,10 @@ "initrd_high=0xffffffffffffffff\0" \ BOOTENV -/* Preserve environment on sd card */ +/* Preserve environment on eMMC */ #define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* Use eMMC */ +#define CONFIG_SYS_MMC_ENV_PART 2 /* Use Boot1 partition */ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 93fcdd6bcc..7b2c7947e9 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -31,15 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index c762c93ac0..d4da9dd213 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -94,7 +94,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 324dba2b7e..04639c175f 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -6,7 +6,6 @@ #ifndef __LS1012A_COMMON_H #define __LS1012A_COMMON_H -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/config.h> @@ -96,9 +95,10 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ - func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 4ad98c69e6..d75ac4e57e 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -89,7 +89,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2c91ae783b..4b6760b600 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -315,7 +315,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #ifdef CONFIG_LPUART diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 49b014181e..f7e7877414 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -26,7 +26,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/stream_id_lsch2.h> @@ -209,7 +208,7 @@ */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) -#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4a08) +#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4A00) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH #define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 @@ -239,7 +238,8 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif @@ -255,6 +255,8 @@ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernel_addr_r=0x81000000\0" \ + "kernel_start=0x1000000\0" \ + "kernelheader_start=0x800000\0" \ "fdt_addr_r=0x90000000\0" \ "load_addr=0xa0000000\0" \ "kernelheader_addr=0x60800000\0" \ @@ -280,12 +282,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ @@ -306,6 +302,12 @@ "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" \ + "nand_bootcmd=echo Trying load from NAND..;" \ + "nand info; nand read $load_addr " \ + "$kernel_start $kernel_size; env exists secureboot " \ + "&& nand read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ "sd_bootcmd=echo Trying load from SD ..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd && " \ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ed07d9f28e..52b47ad670 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index a0d39878b8..6ab83d02a4 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -21,8 +21,6 @@ #ifndef CONFIG_SPL #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#define CONFIG_FSL_DDR_BIST #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 6e36c9339b..d9fcd3af5e 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -26,7 +26,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/config.h> @@ -213,7 +212,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif @@ -259,13 +259,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;" \ - "\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 886fe723ba..6e36baf4ca 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 77b50dbdad..f22e863749 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -24,10 +24,6 @@ #define CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif #ifdef CONFIG_SD_BOOT #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 95e6786e6c..a80ce92881 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -21,7 +21,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> @@ -49,10 +48,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#if !defined(CONFIG_SD_BOOT) -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index f52ea4d746..45af087dc6 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -393,12 +393,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ @@ -466,12 +460,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ @@ -577,7 +565,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(SCSI, scsi, 0) + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 235a757f75..60a0b42503 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -8,9 +8,7 @@ #define __LS2_COMMON_H #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV3 -#define CONFIG_FSL_TZPC_BP147 #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> @@ -36,9 +34,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #endif diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h index 76ac5363c5..d5cb3e4df9 100644 --- a/include/configs/ls2080a_emu.h +++ b/include/configs/ls2080a_emu.h @@ -24,8 +24,6 @@ #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_SYNC_REFRESH - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) /* diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index a23a4edaee..74c7dc4f8a 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -42,7 +42,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ /* SATA */ #define CONFIG_SCSI_AHCI_PLAT @@ -64,8 +63,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SECT_SIZE 0x20000 #endif -/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ef0f4ff48e..e41ace6685 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -57,7 +57,6 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ /* SATA */ #define CONFIG_SCSI_AHCI_PLAT @@ -80,7 +79,6 @@ unsigned long get_board_sys_clk(void); #endif #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) -/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) @@ -333,7 +331,8 @@ unsigned long get_board_sys_clk(void); #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ - func(SCSI, scsi, 0) + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #ifdef CONFIG_TFABOOT @@ -428,12 +427,6 @@ unsigned long get_board_sys_clk(void); "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ @@ -497,12 +490,6 @@ unsigned long get_board_sys_clk(void); "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h new file mode 100644 index 0000000000..4b5608b5a3 --- /dev/null +++ b/include/configs/lx2160a_common.h @@ -0,0 +1,289 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __LX2_COMMON_H +#define __LX2_COMMON_H + +#include <asm/arch/stream_id_lsch3.h> +#include <asm/arch/config.h> +#include <asm/arch/soc.h> + +#define CONFIG_REMAKE_ELF +#define CONFIG_FSL_LAYERSCAPE +#define CONFIG_GICV3 +#define CONFIG_FSL_TZPC_BP147 +#define CONFIG_FSL_MEMAC + +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_FLASH_BASE 0x20000000 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F 1 + +/* DDR */ +#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL +#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2 +#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL +#define CONFIG_DDR_SPD +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS1 0x51 +#define SPD_EEPROM_ADDRESS2 0x52 +#define SPD_EEPROM_ADDRESS3 0x53 +#define SPD_EEPROM_ADDRESS4 0x54 +#define SPD_EEPROM_ADDRESS5 0x55 +#define SPD_EEPROM_ADDRESS6 0x56 +#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 +#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ +#define CONFIG_DIMM_SLOTS_PER_CTLR 2 +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 +#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ +#define CONFIG_SYS_MONITOR_LEN (936 * 1024) + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) + +/* SMP Definitinos */ +#define CPU_RELEASE_ADDR secondary_boot_func + +/* Generic Timer Definitions */ +/* + * This is not an accurate number. It is used in start.S. The frequency + * will be udpated later when get_bus_freq(0) is available. + */ + +#define COUNTER_FREQUENCY 25000000 /* 25MHz */ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) + +/* Serial Port */ +#define CONFIG_PL01X_SERIAL +#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) +#define CONFIG_SYS_SERIAL0 0x21c0000 +#define CONFIG_SYS_SERIAL1 0x21d0000 +#define CONFIG_SYS_SERIAL2 0x21e0000 +#define CONFIG_SYS_SERIAL3 0x21f0000 +/*below might needs to be removed*/ +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2, \ + (void *)CONFIG_SYS_SERIAL3 } +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* MC firmware */ +#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 +#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 +#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 +#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 + +/* Define phy_reset function to boot the MC based on mcinitcmd. + * This happens late enough to properly fixup u-boot env MAC addresses. + */ +#define CONFIG_RESET_PHY_R + +/* + * Carve out a DDR region which will not be used by u-boot/Linux + * + * It will be used by MC and Debug Server. The MC region must be + * 512MB aligned, so the min size to hide is 512MB. + */ +#ifdef CONFIG_FSL_MC_ENET +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#endif + +/* I2C bus multiplexer */ +#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ +#define I2C_MUX_CH_DEFAULT 0x8 + +/* RTC */ +#define RTC +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Qixis */ +#define CONFIG_FSL_QIXIS +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 + +/* PCI */ +#ifdef CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT +#define CONFIG_PCI_SCAN_SHOW +#endif + +/* MMC */ +#ifdef CONFIG_MMC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#endif + +/* SATA */ + +#ifdef CONFIG_SCSI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 +#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#endif + +/* USB */ +#ifdef CONFIG_USB +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + +/* FlexSPI */ +#ifdef CONFIG_NXP_FSPI +#define NXP_FSPI_FLASH_SIZE SZ_64M +#define NXP_FSPI_FLASH_NUM 1 +#endif + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(void); +unsigned long get_board_ddr_clk(void); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() +#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) + +#define CONFIG_HWCONFIG +#define HWCONFIG_BUFFER_SIZE 128 + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x500000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ + CONFIG_ENV_OFFSET) + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_MAXARGS 64 /* max command args */ + +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +/* Initial environment variables */ +#define XSPI_MC_INIT_CMD \ + "env exists secureboot && " \ + "esbc_validate 0x20700000 && " \ + "esbc_validate 0x20740000 ;" \ + "fsl_mc start mc 0x20a00000 0x20e00000\0" + +#define SD_MC_INIT_CMD \ + "mmc read 0x80000000 0x5000 0x800;" \ + "mmc read 0x80100000 0x7000 0x800;" \ + "env exists secureboot && " \ + "mmc read 0x80700000 0x3800 0x10 && " \ + "mmc read 0x80740000 0x3A00 0x10 && " \ + "esbc_validate 0x80700000 && " \ + "esbc_validate 0x80740000 ;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" + +#define EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "ramdisk_addr=0x800000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_start=0x1000000\0" \ + "kernelheader_start=0x7C0000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "kernelheader_size=0x40000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernelhdr_addr_sd=0x3E00\0" \ + "kernel_size_sd=0x1d000\0" \ + "kernelhdr_size_sd=0x10\0" \ + "console=ttyAMA0,38400n8\0" \ + BOOTENV \ + "mcmemsize=0x70000000\0" \ + XSPI_MC_INIT_CMD \ + "boot_scripts=lx2160ardb_boot.scr\0" \ + "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" + +#define XSPI_NOR_BOOTCOMMAND \ + "env exists mcinitcmd && env exists secureboot "\ + "&& esbc_validate 0x20780000; " \ + "env exists mcinitcmd && " \ + "fsl_mc lazyapply dpl 0x20d00000; " \ + "run distro_bootcmd;run xspi_bootcmd; " \ + "env exists secureboot && esbc_halt;" + +#define SD_BOOTCOMMAND \ + "env exists mcinitcmd && mmcinfo; " \ + "mmc read 0x80001000 0x6800 0x800; " \ + "env exists mcinitcmd && env exists secureboot " \ + " && mmc read 0x80780000 0x3C00 0x10 " \ + "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + "&& fsl_mc lazyapply dpl 0x80001000;" \ + "run distro_bootcmd;run sd_bootcmd;" \ + "env exists secureboot && esbc_halt;" + +#define BOOT_TARGET_DEVICES(func) \ + func(USB, usb, 0) \ + func(MMC, mmc, 0) \ + func(SCSI, scsi, 0) +#include <config_distro_bootcmd.h> + +#endif /* __LX2_COMMON_H */ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h new file mode 100644 index 0000000000..662e601f0f --- /dev/null +++ b/include/configs/lx2160aqds.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + */ + +#ifndef __LX2_QDS_H +#define __LX2_QDS_H + +#include "lx2160a_common.h" + +/* Qixis */ +#define QIXIS_XMAP_MASK 0x07 +#define QIXIS_XMAP_SHIFT 5 +#define QIXIS_RST_CTL_RESET_EN 0x30 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0xff +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SD +#define QIXIS_RCW_SRC_SD 0x08 +#define NON_EXTENDED_DUTCFG +#define QIXIS_SDID_MASK 0x07 +#define QIXIS_ESDHC_NO_ADAPTER 0x7 + +/* SYSCLK */ +#define QIXIS_SYSCLK_100 0x0 +#define QIXIS_SYSCLK_125 0x1 +#define QIXIS_SYSCLK_133 0x2 + +/* DDRCLK */ +#define QIXIS_DDRCLK_100 0x0 +#define QIXIS_DDRCLK_125 0x1 +#define QIXIS_DDRCLK_133 0x2 + +#define BRDCFG4_EMI1SEL_MASK 0xF8 +#define BRDCFG4_EMI1SEL_SHIFT 3 +#define BRDCFG4_EMI2SEL_MASK 0x07 +#define BRDCFG4_EMI2SEL_SHIFT 0 + +/* VID */ + +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "lx2160aqds_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed*/ +#define VDD_MV_MIN 775 +#define VDD_MV_MAX 925 + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 +#define PWM_CHANNEL0 0x0 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* RTC */ +#define CONFIG_SYS_RTC_BUS_NUM 0 +#define I2C_MUX_CH_RTC 0xB + +/* + * MMC + */ +#ifdef CONFIG_MMC +#ifndef __ASSEMBLY__ +u8 qixis_esdhc_detect_quirk(void); +#endif +#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk() +#endif + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" + +#define AQ_PHY_ADDR1 0x00 +#define AQ_PHY_ADDR2 0x01 +#define AQ_PHY_ADDR3 0x02 +#define AQ_PHY_ADDR4 0x03 + +#define CORTINA_NO_FW_UPLOAD +#define CORTINA_PHY_ADDR1 0x0 + +#define INPHI_PHY_ADDR1 0x0 +#define INPHI_PHY_ADDR2 0x1 + +#define RGMII_PHY_ADDR1 0x01 +#define RGMII_PHY_ADDR2 0x02 + +#define SGMII_CARD_PORT1_PHY_ADDR 0x1C +#define SGMII_CARD_PORT2_PHY_ADDR 0x1D +#define SGMII_CARD_PORT3_PHY_ADDR 0x1E +#define SGMII_CARD_PORT4_PHY_ADDR 0x1F + +#endif + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "lx2160aqds_vdd_mv=800\0" \ + "BOARD=lx2160aqds\0" \ + "xspi_bootcmd=echo Trying load from flexspi..;" \ + "sf probe 0:0 && sf read $load_addr " \ + "$kernel_start $kernel_size ; env exists secureboot &&" \ + "sf read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$BOARD\0" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_QDS_H */ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h new file mode 100644 index 0000000000..972bb5e102 --- /dev/null +++ b/include/configs/lx2160ardb.h @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __LX2_RDB_H +#define __LX2_RDB_H + +#include "lx2160a_common.h" + +/* Qixis */ +#define QIXIS_XMAP_MASK 0x07 +#define QIXIS_XMAP_SHIFT 5 +#define QIXIS_RST_CTL_RESET_EN 0x30 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0xff +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SD +#define QIXIS_RCW_SRC_SD 0x08 +#define NON_EXTENDED_DUTCFG + +/* VID */ + +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed*/ +#define VDD_MV_MIN 775 +#define VDD_MV_MAX 855 + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 +#define PWM_CHANNEL0 0x0 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* RTC */ +#define CONFIG_SYS_RTC_BUS_NUM 4 + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC1@xgmii" + +#define AQR107_PHY_ADDR1 0x04 +#define AQR107_PHY_ADDR2 0x05 + +#define CORTINA_NO_FW_UPLOAD +#define CORTINA_PHY_ADDR1 0x0 +#define INPHI_PHY_ADDR1 0x0 + +#define RGMII_PHY_ADDR1 0x01 +#define RGMII_PHY_ADDR2 0x02 + +#endif + +/* EMC2305 */ +#define I2C_MUX_CH_EMC2305 0x09 +#define I2C_EMC2305_ADDR 0x4D +#define I2C_EMC2305_CMD 0x40 +#define I2C_EMC2305_PWM 0x80 + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "lx2160ardb_vdd_mv=800\0" \ + "BOARD=lx2160ardb\0" \ + "xspi_bootcmd=echo Trying load from flexspi..;" \ + "sf probe 0:0 && sf read $load_addr " \ + "$kernel_start $kernel_size ; env exists secureboot &&" \ + "sf read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$BOARD\0" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_RDB_H */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index b290df5891..d212a7f680 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -25,11 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index dd76829e91..933f84028f 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -34,15 +31,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - -#define CONFIG_KEYBOARD - #undef CONFIG_LOADADDR #define CONFIG_LOADADDR 0x82408000 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 0e1f9836a6..8fda0c1e22 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -266,7 +266,6 @@ #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 -#undef CONFIG_FSL_DDR_INTERACTIVE #if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD)) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index 6654a1b4df..59866997e3 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 0e37511daf..c97b226027 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,15 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 1daf49a453..4920896e9c 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -18,9 +18,6 @@ #define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -31,13 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index cfe8d8cbed..e546c1d73f 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -13,16 +13,11 @@ /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) -/* PCI host support */ - #define BOARD_EXTRA_ENV_SETTINGS \ "calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \ "ramdisk_addr_r\0" \ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 447f99af68..b76958c36d 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -26,11 +26,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 125a1f1f43..43856bad2c 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -25,13 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index f0b165591c..9df8604af7 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -83,7 +83,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ /* * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index b8d02f0397..5df013b0b3 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -26,23 +26,11 @@ #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* Enable keyboard */ -#define CONFIG_TEGRA_KEYBOARD -#define CONFIG_KEYBOARD - /* NAND support */ #define CONFIG_TEGRA_NAND diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h new file mode 100644 index 0000000000..7007b5f6af --- /dev/null +++ b/include/configs/sifive-fu540.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) + +#define CONFIG_SYS_MALLOC_LEN SZ_8M + +#define CONFIG_SYS_BOOTM_LEN SZ_16M + +#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 + +/* Environment options */ +#define CONFIG_ENV_SIZE SZ_4K + +#define BOOT_TARGET_DEVICES(func) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_addr_r=0x80600000\0" \ + "fdt_addr_r=0x82200000\0" \ + "scriptaddr=0x82300000\0" \ + "pxefile_addr_r=0x82400000\0" \ + "ramdisk_addr_r=0x82500000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 9fa8917a9b..3f84fabdb6 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -60,7 +60,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index bca5961206..bf37501912 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -73,7 +73,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index dd3e026b14..85914ec695 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -16,9 +16,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - /* Tag support */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/tec.h b/include/configs/tec.h index a40212190a..907c8d5e23 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -25,11 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index d37e2d79d3..84f671d00c 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -39,15 +39,9 @@ */ #define CONFIG_SYS_MMC_MAX_DEVICE 4 -/* - * select serial console configuration - */ - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -/* turn on command-line edit/hist/auto */ - /* * Increasing the size of the IO buffer as default nfsargs size is more * than 256 and so it is not possible to edit it diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index ccfc516a82..1aa4412645 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -15,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -36,13 +36,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -50,8 +50,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index b275f795a3..3530684164 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -17,7 +17,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -38,13 +38,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -52,8 +52,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 7f0a5292c2..e58477e289 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x02800000 /* 40MB */ +#define CONFIG_STACKBASE 0x03800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -37,13 +37,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x01000000 @@ -51,8 +51,8 @@ "scriptaddr=0x10000000\0" \ "pxefile_addr_r=0x10100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x02000000\0" \ - "ramdisk_addr_r=0x02100000\0" + "fdt_addr_r=0x03000000\0" \ + "ramdisk_addr_r=0x03100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x00108000 @@ -78,7 +78,7 @@ * parameter, the default (2) causes occasional Data Buffer Errors in OUT * packets depending on the buffer address and size. */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 10 +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #define CONFIG_EHCI_IS_TDI #define CONFIG_SYS_NAND_SELF_INIT diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 16b962db64..1c533118ad 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -14,10 +14,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/*----------------------------------------------------------------------- - * Physical Memory Map - */ - /* Generic Interrupt Controller */ #define CONFIG_GICV2 diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 70964a90ce..2d8948d9d9 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -16,11 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /* * Memory layout for where various images get loaded by boot scripts: @@ -37,13 +33,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -51,8 +47,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 427da1c1c2..4b1eb7b1c8 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -23,9 +23,6 @@ /* SPI */ #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in SPI */ #define CONFIG_ENV_SPI_MAX_HZ 48000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 @@ -33,15 +30,6 @@ /* 1MiB flash, environment located as high as possible */ #define CONFIG_ENV_OFFSET (SZ_1M - CONFIG_ENV_SIZE) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 95d6452553..1e509ce9ad 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -124,8 +124,6 @@ "third_image=u-boot.bin\0" #endif -#define CONFIG_PREBOOT "env exist ${bootdev}preboot && run ${bootdev}preboot" - #define CONFIG_ROOTPATH "/nfs/root/path" #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs $bootargs root=/dev/nfs rw " \ diff --git a/include/configs/venice2.h b/include/configs/venice2.h index e542187efc..a86ae212f2 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -31,13 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 3f9db3303f..09f90db1f5 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -24,11 +24,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 206f0c13a4..5737cfee95 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -25,7 +25,6 @@ /* * DDR config */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index e6eea8dfc2..22dd3c036e 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -33,7 +33,6 @@ /* * DDR config */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef |