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-rw-r--r--include/configs/porter.h29
-rw-r--r--include/configs/rcar-gen2-common.h2
-rw-r--r--include/configs/rcar-gen3-common.h1
-rw-r--r--include/configs/socfpga_arria10_socdk.h2
-rw-r--r--include/configs/socfpga_arria5_socdk.h2
-rw-r--r--include/configs/socfpga_cyclone5_socdk.h2
-rw-r--r--include/configs/socfpga_de0_nano_soc.h2
-rw-r--r--include/configs/socfpga_de10_nano.h2
-rw-r--r--include/configs/socfpga_de1_soc.h2
-rw-r--r--include/configs/socfpga_is1.h2
-rw-r--r--include/configs/socfpga_mcvevk.h2
-rw-r--r--include/configs/socfpga_sockit.h2
-rw-r--r--include/configs/socfpga_socrates.h2
-rw-r--r--include/configs/socfpga_sr1500.h2
-rw-r--r--include/configs/socfpga_vining_fpga.h2
15 files changed, 13 insertions, 43 deletions
diff --git a/include/configs/porter.h b/include/configs/porter.h
index b4a317f724..eb28d1afcc 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -16,12 +16,8 @@
#include "rcar-gen2-common.h"
-#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR 0x7023FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
-#endif
-#define STACK_AREA_SIZE 0xC000
+#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
+#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
@@ -53,18 +49,15 @@
#define CONFIG_SYS_TMU_CLK_DIV 4
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
-#define CONFIG_SYS_I2C_SH_SPEED0 400000
-#define CONFIG_SYS_I2C_SH_SPEED1 400000
-#define CONFIG_SYS_I2C_SH_SPEED2 400000
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 10000000
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0"
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE 0xe6304000
+#define CONFIG_SPL_STACK 0xe6340000
+#define CONFIG_SPL_MAX_SIZE 0x40000
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#endif /* __PORTER_H */
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index ad436fd8b1..e47b02fcc9 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -26,7 +26,7 @@
#endif
/* console */
-
+#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index a16d26be99..226069d67c 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -16,6 +16,7 @@
/* boot option */
#define CONFIG_SUPPORT_RAW_INITRD
+#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h
index 83718dd2c9..82bb48b277 100644
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -9,8 +9,6 @@
#include <asm/arch/base_addr_a10.h>
-#define CONFIG_HW_WATCHDOG
-
/* Booting Linux */
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index 6b6d54b97b..cd5aac65e9 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index 018a0c3bb4..9c5bd648e3 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index 275ed7ffeb..e5db00e366 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h
index bb50fcf1ff..656af1104d 100644
--- a/include/configs/socfpga_de10_nano.h
+++ b/include/configs/socfpga_de10_nano.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h
index 05975c9bde..f57b950425 100644
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h
index 883ffb76f3..f2c3f40554 100644
--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@@ -9,8 +9,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x10000000
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index 404f064e94..f13463b8b0 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index b4f31c42c5..0bbc7e0105 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
index ebb9ac588d..b66108d0cc 100644
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index 8c9069c923..8879817b30 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 0c76a77525..1197b40b58 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
generated by cgit (git 2.34.1) at 2025-02-12 20:32:37 +0000