summaryrefslogtreecommitdiff
path: root/include/configs
diff options
context:
space:
mode:
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/at91-sama5_common.h2
-rw-r--r--include/configs/at91sam9m10g45ek.h4
-rw-r--r--include/configs/at91sam9n12ek.h8
-rw-r--r--include/configs/at91sam9x5ek.h2
-rw-r--r--include/configs/ma5d4evk.h9
-rw-r--r--include/configs/sama5d2_ptc.h10
-rw-r--r--include/configs/sama5d2_xplained.h2
-rw-r--r--include/configs/sama5d3_xplained.h10
-rw-r--r--include/configs/sama5d3xek.h8
-rw-r--r--include/configs/sama5d4_xplained.h4
-rw-r--r--include/configs/sama5d4ek.h4
-rw-r--r--include/configs/vinco.h11
12 files changed, 35 insertions, 39 deletions
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index ff17b4eb4b..435c7dfa8e 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -10,8 +10,6 @@
#ifndef __AT91_SAMA5_COMMON_H
#define __AT91_SAMA5_COMMON_H
-#include <asm/hardware.h>
-
#define CONFIG_SYS_TEXT_BASE 0x26f00000
/* ARM asynchronous clock */
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 22db94772d..36acaa5506 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -11,8 +11,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/hardware.h>
-
#define CONFIG_SYS_TEXT_BASE 0x73f00000
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -52,7 +50,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
+#define CONFIG_SYS_SDRAM_BASE 0x70000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR \
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 7d70d8892a..c9adcf9754 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -10,12 +10,6 @@
#ifndef __AT91SAM9N12_CONFIG_H_
#define __AT91SAM9N12_CONFIG_H_
-/*
- * SoC must be defined first, before hardware.h is included.
- * In this case SoC is defined in boards.cfg.
- */
-#include <asm/hardware.h>
-
#define CONFIG_SYS_TEXT_BASE 0x26f00000
/* ARM asynchronous clock */
@@ -55,7 +49,7 @@
* that address while providing maximum stack area below.
*/
# define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* DataFlash */
#ifdef CONFIG_CMD_SF
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index c50e0b816f..eb798442ca 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_H__
#define __CONFIG_H__
-#include <asm/hardware.h>
-
#define CONFIG_SYS_TEXT_BASE 0x26f00000
/* ARM asynchronous clock */
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 50b21c9d97..0fe1bc1c1d 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -14,11 +14,14 @@
#define CONFIG_SYS_USE_SERIALFLASH 1
#define CONFIG_BOARD_LATE_INIT
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
+
/*
* Memory configurations
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#ifdef CONFIG_SPL_BUILD
@@ -45,8 +48,8 @@
* Serial Driver
*/
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_USART0
-#define CONFIG_USART_ID ATMEL_ID_USART0
+#define CONFIG_USART_BASE 0xf802c000
+#define CONFIG_USART_ID 6
/*
* Ethernet
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index b04781893d..75a81f1473 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -14,12 +14,14 @@
/* serial console */
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_UART0
-#define CONFIG_USART_ID ATMEL_ID_UART0
+#define CONFIG_USART_BASE 0xf801c000
+#define CONFIG_USART_ID 24
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
+#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
+
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x210000
#else
@@ -48,7 +50,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index aedd5684c4..7b75413e8d 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -16,7 +16,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 05600c81ff..54ea98d454 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -16,16 +16,16 @@
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
*/
-#define ATMEL_ID_UHP ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP 32
/*
* Specify the clock enable bit in the PMC_SCER register.
*/
-#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP (1 << 6)
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#ifdef CONFIG_SPL_BUILD
@@ -39,7 +39,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x60000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -62,7 +62,7 @@
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 29b7e8b50a..a7223e2cf0 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -21,12 +21,12 @@
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
*/
-#define ATMEL_ID_UHP ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP 32
/*
* Specify the clock enable bit in the PMC_SCER register.
*/
-#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP (1 << 6)
/* LCD */
#define LCD_BPP LCD_COLOR16
@@ -52,7 +52,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -72,7 +72,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x60000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index 08f865016d..f48ef40418 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -16,7 +16,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -36,7 +36,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index fc16ed0420..0410d65ea0 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -14,7 +14,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -34,7 +34,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 490dc446d6..0bd8bbbf9f 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -23,12 +23,15 @@
/* serial console */
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_USART3
-#define CONFIG_USART_ID ATMEL_ID_USART3
+#define CONFIG_USART_BASE 0xfc00c000
+#define CONFIG_USART_ID 30
+
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x4000000
#define CONFIG_SYS_INIT_SP_ADDR \
@@ -55,7 +58,7 @@
#ifdef CONFIG_CMD_MMC
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_GENERIC_ATMEL_MCI
-#define ATMEL_BASE_MMCI ATMEL_BASE_MCI1
+#define ATMEL_BASE_MMCI 0xfc000000
#define CONFIG_SYS_MMC_CLK_OD 500000
/* For generating MMC partitions */
generated by cgit (git 2.34.1) at 2024-12-23 12:22:50 +0000