diff options
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/ge_bx50v3.h | 1 | ||||
-rw-r--r-- | include/configs/imx31_phycore.h | 155 | ||||
-rw-r--r-- | include/configs/kp_imx6q_tpc.h | 141 | ||||
-rw-r--r-- | include/configs/ls1012a_common.h | 3 | ||||
-rw-r--r-- | include/configs/ls1043a_common.h | 5 | ||||
-rw-r--r-- | include/configs/ls1046a_common.h | 5 | ||||
-rw-r--r-- | include/configs/ls1088a_common.h | 5 | ||||
-rw-r--r-- | include/configs/ls2080a_common.h | 5 | ||||
-rw-r--r-- | include/configs/ls2080a_emu.h | 3 | ||||
-rw-r--r-- | include/configs/ls2080a_simu.h | 3 | ||||
-rw-r--r-- | include/configs/mx31ads.h | 144 | ||||
-rw-r--r-- | include/configs/mx53ppd.h | 4 | ||||
-rw-r--r-- | include/configs/mx7_common.h | 3 | ||||
-rw-r--r-- | include/configs/pico-imx7d.h | 4 | ||||
-rw-r--r-- | include/configs/warp7.h | 3 |
15 files changed, 152 insertions, 332 deletions
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 0a6f179612..44c92f9d48 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -124,6 +124,7 @@ "swappartitions=" \ "setexpr partnum 3 - ${partnum}\0" \ "failbootcmd=" \ + "bx50_backlight_enable; " \ "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \ "echo $msg; " \ "setenv stdout vga; " \ diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h deleted file mode 100644 index e651410b53..0000000000 --- a/include/configs/imx31_phycore.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments. - * Richard Woodruff <r-woodruff2@ti.com> - * Kshitij Gupta <kshitij@ti.com> - * - * Configuration settings for the phyCORE-i.MX31 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/imx-regs.h> - -/* High Level Configuration Options */ -#define CONFIG_MX31 /* This is a mx31 */ -#define CONFIG_MX31_CLK32 32000 - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) - -/* - * Hardware drivers - */ - -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET - -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/*********************************************************** - * Command definition - ***********************************************************/ - -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.23.168 -#define CONFIG_SERVERIP 192.168.23.2 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ - "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ - "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ - "bootargs_flash=setenv bootargs $(bootargs) " \ - "root=/dev/mtdblock2 rootfstype=jffs2\0" \ - "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \ - "bootcmd=run bootcmd_net\0" \ - "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \ - "tftpboot 0x80000000 $(uimage);bootm\0" \ - "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \ - "bootm 0x80000000\0" \ - "unlock=yes\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "prg_uboot=tftpboot 0x80000000 $(uboot);" \ - "protect off 0xa0000000 +0x20000;" \ - "erase 0xa0000000 +0x20000;" \ - "cp.b 0x80000000 0xa0000000 $(filesize)\0" \ - "prg_kernel=tftpboot 0x80000000 $(uimage);" \ - "erase 0xa0040000 +0x180000;" \ - "cp.b 0x80000000 0xa0040000 $(filesize)\0" \ - "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \ - "erase 0xa01c0000 0xa1ffffff;" \ - "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \ - "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \ - "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ - "sync:1241513985,vmode:0\0" - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x10000 - -#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x80000000 -#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_GBL_DATA_OFFSET) - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_FLASH_BASE 0xa0000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */ -/* Monitor at beginning of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ -#define CONFIG_ENV_SIZE 4096 -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */ - -/* - * CFI FLASH driver setup - */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ - -/* - * Timeout for Flash Erase and Flash Write - * timeout values are in ticks - */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) - -/* - * JFFS2 partitions - */ -#define CONFIG_JFFS2_DEV "nor0" - -/* EET platform additions */ -#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET -#define CONFIG_HARD_SPI - -#define CONFIG_S6E63D6 - -#define CONFIG_VIDEO_MX3 -#define CONFIG_VIDEO_LOGO -#define CONFIG_SPLASH_SCREEN -#define CONFIG_BMP_16BPP -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h new file mode 100644 index 0000000000..fae2faec2f --- /dev/null +++ b/include/configs/kp_imx6q_tpc.h @@ -0,0 +1,141 @@ +/* + * K+P iMX6Q KP_IMX6Q_TPC board configuration + * + * Copyright (C) 2018 Lukasz Majewski <lukma@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __KP_IMX6Q_TPC_IMX6_CONFIG_H_ +#define __KP_IMX6Q_TPC_IMX6_CONFIG_H_ + +#include <asm/arch/imx-regs.h> + +#include "mx6_common.h" + +/* SPL */ +#include "imx6_spl.h" /* common IMX6 SPL configuration */ + +/* Miscellaneous configurable options */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_BOUNCE_BUFFER + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M) + +/* FEC ethernet */ +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_ARP_TIMEOUT 200UL + +/* Fuses */ +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4 (eMMC) */ + +/* UART */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* USB Configs */ +#ifdef CONFIG_CMD_USB +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ +#endif + +/* Watchdog */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0,115200\0" \ + "fdt_addr=0x18000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x10008000\0" \ + "fdt_addr_r=0x13000000\0" \ + "ramdisk_addr_r=0x18000000\0" \ + "scriptaddr=0x14000000\0" \ + "kernel_file=fitImage\0"\ + "rdinit=/sbin/init\0" \ + "addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \ + "fit_config=mx6q_tpc70_conf\0" \ + "upd_image=st.4k\0" \ + "updargs=setenv bootargs console=${console} ${smp}"\ + "rdinit=${rdinit} ${debug} ${displayargs}\0" \ + "loadusb=usb start; " \ + "fatload usb 0 ${loadaddr} ${upd_image}\0" \ + "usbupd=echo Booting update from usb ...; " \ + "setenv bootargs; " \ + "run updargs; " \ + "run loadusb; " \ + "bootm ${loadaddr}#${fit_config}\0" \ + BOOTENV + +#define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment */ +#define CONFIG_ENV_SIZE (SZ_8K) +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#endif /* __KP_IMX6Q_TPC_IMX6_CONFIG_H_ */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 91e6da03b1..35ecb3ce56 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -75,9 +75,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 790db150ce..5ab29a14db 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -147,11 +147,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 -#define CONFIG_SYS_I2C_MXC_I2C2 -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ #ifndef SPL_NO_PCIE diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 7d67f10d40..b9424e666d 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -125,11 +125,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 -#define CONFIG_SYS_I2C_MXC_I2C2 -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 211059a601..814760ebe9 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -67,11 +67,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 4e6a26cc72..258a6f1a04 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -77,11 +77,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h index 6b34edfbf1..c2fdc4daf6 100644 --- a/include/configs/ls2080a_emu.h +++ b/include/configs/ls2080a_emu.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 133333333 -#define CONFIG_SYS_MXC_I2C1_SPEED 40000000 -#define CONFIG_SYS_MXC_I2C2_SPEED 40000000 - #define CONFIG_DDR_SPD #define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index aff319bd72..d4da91fcfe 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 133333333 -#define CONFIG_SYS_MXC_I2C1_SPEED 40000000 -#define CONFIG_SYS_MXC_I2C2_SPEED 40000000 - #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h deleted file mode 100644 index 651b998a4a..0000000000 --- a/include/configs/mx31ads.h +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> - * - * Configuration settings for the MX31ADS Freescale board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <asm/arch/imx-regs.h> - - /* High Level Configuration Options */ -#define CONFIG_MX31 1 /* This is a mx31 */ - -#define CONFIG_MACH_TYPE MACH_TYPE_MX31ADS - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) - -/* - * Hardware drivers - */ - -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -#define CONFIG_HARD_SPI 1 -#define CONFIG_DEFAULT_SPI_BUS 1 -#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) - -/* PMIC Controller */ -#define CONFIG_POWER -#define CONFIG_POWER_SPI -#define CONFIG_POWER_FSL -#define CONFIG_FSL_PMIC_BUS 1 -#define CONFIG_FSL_PMIC_CS 0 -#define CONFIG_FSL_PMIC_CLK 1000000 -#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC_BITLEN 32 -#define CONFIG_RTC_MC13XXX - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "uboot_addr=0xa0000000\0" \ - "uboot=mx31ads/u-boot.bin\0" \ - "kernel=mx31ads/uImage\0" \ - "nfsroot=/opt/eldk/arm\0" \ - "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ - "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "bootcmd=run bootcmd_net\0" \ - "bootcmd_net=run bootargs_base bootargs_nfs; " \ - "tftpboot ${loadaddr} ${kernel}; bootm\0" \ - "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ - "protect off ${uboot_addr} 0xa003ffff; " \ - "erase ${uboot_addr} 0xa003ffff; " \ - "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ - "setenv filesize; saveenv\0" - -#define CONFIG_CS8900 -#define CONFIG_CS8900_BASE 0xb4020300 -#define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ - -/* - * The MX31ADS board seems to have a hardware "peculiarity" confirmed under - * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A - * controller inverted. The controller is capable of detecting and correcting - * this, but it needs 4 network packets for that. Which means, at startup, you - * will not receive answers to the first 4 packest, unless there have been some - * broadcasts on the network, or your board is on a hub. Reducing the ARP - * timeout from default 5 seconds to 200ms we speed up the initial TFTP - * transfer, should the user wish one, significantly. - */ -#define CONFIG_ARP_TIMEOUT 200UL - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x10000 - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 CSD0_BASE -#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_GBL_DATA_OFFSET) - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_FLASH_BASE CS0_BASE -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ - -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE - -/*----------------------------------------------------------------------- - * CFI FLASH driver setup - */ -#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ -#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ - -/* - * JFFS2 partitions - */ -#define CONFIG_JFFS2_DEV "nor0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index bd28515e3a..e2ce79671d 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -197,8 +197,8 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* FLASH and environment organization */ -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_OFFSET (12 * 64 * 1024) +#define CONFIG_ENV_SIZE (10 * 1024) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 000b305cce..3544ffc516 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -57,6 +57,9 @@ /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#endif #endif #endif diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index ee48363590..a81548cb00 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -50,8 +50,8 @@ "finduuid=part uuid mmc 0:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index fe96988be7..0c3b605de3 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -24,6 +24,9 @@ #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 +/* Switch on SERIAL_TAG */ +#define CONFIG_SERIAL_TAG + #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ |