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-rw-r--r--include/configs/alt.h71
-rw-r--r--include/configs/firefly-rk3288.h3
-rw-r--r--include/configs/gose.h64
-rw-r--r--include/configs/lager.h65
-rw-r--r--include/configs/rk3036_common.h3
-rw-r--r--include/configs/rk3128_common.h2
-rw-r--r--include/configs/rk3188_common.h5
-rw-r--r--include/configs/rk322x_common.h3
-rw-r--r--include/configs/rk3288_common.h3
-rw-r--r--include/configs/rv1108_common.h3
10 files changed, 65 insertions, 157 deletions
diff --git a/include/configs/alt.h b/include/configs/alt.h
index d6236870b9..619660b2bd 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -15,12 +15,8 @@
#include "rcar-gen2-common.h"
-#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
-#endif
-#define STACK_AREA_SIZE 0xC000
+#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
+#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
@@ -41,52 +37,29 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
+#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
-#define RMOBILE_XTAL_CLK 20000000u
-#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
-#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
-#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
-#define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24)
-
-#define CONFIG_SYS_TMU_CLK_DIV 4
-
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
-#define CONFIG_SYS_I2C_SH_SPEED0 400000
-#define CONFIG_SYS_I2C_SH_SPEED1 400000
-#define CONFIG_SYS_I2C_SH_SPEED2 400000
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
-
-/* USB */
-#define CONFIG_USB_EHCI_RMOBILE
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-
-/* MMCIF */
-#define CONFIG_SH_MMCIF_ADDR 0xee200000
-#define CONFIG_SH_MMCIF_CLK 48000000
-
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA 0x00400000
-/* MSIF */
-#define CONFIG_SMSTP2_ENA 0x00002000
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-/* SCIF2 */
-#define CONFIG_SMSTP7_ENA 0x00080000
-
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 97500000
+#define RMOBILE_XTAL_CLK 20000000u
+#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
+#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
+
+#define CONFIG_SYS_TMU_CLK_DIV 4
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0"
+
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE 0xe6300000
+#define CONFIG_SPL_STACK 0xe6340000
+#define CONFIG_SPL_MAX_SIZE 0x4000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_CONS_SCIF2
+#define CONFIG_SH_SCIF_CLK_FREQ 65000000
+#endif
#endif /* __ALT_H */
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index d6bb9f6fb4..2b0ac9ec5f 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -10,8 +10,7 @@
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
- "stderr=serial,vidconsole\0" \
- "preboot=usb start\0"
+ "stderr=serial,vidconsole\0"
#include <configs/rk3288_common.h>
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 3531621910..af6189e4c1 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -14,21 +14,15 @@
#include "rcar-gen2-common.h"
-/* STACK */
-#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
-#endif
-
-#define STACK_AREA_SIZE 0xC000
-#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
+#define STACK_AREA_SIZE 0x00100000
+#define LOW_LEVEL_MERAM_STACK \
+ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
-#define RCAR_GEN2_SDRAM_SIZE 0x40000000
-#define RCAR_GEN2_UBOOT_SDRAM_SIZE 0x20000000
+#define RCAR_GEN2_SDRAM_SIZE (1048u * 1024 * 1024)
+#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024)
/* SCIF */
@@ -41,45 +35,29 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
-#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_SYS_TMU_CLK_DIV 4
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
-#define CONFIG_SYS_I2C_SH_SPEED0 400000
-#define CONFIG_SYS_I2C_SH_SPEED1 400000
-#define CONFIG_SYS_I2C_SH_SPEED2 400000
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
-
-/* USB */
-#define CONFIG_USB_EHCI_RMOBILE
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA 0x00400000
-/* MSIF */
-#define CONFIG_SMSTP2_ENA 0x00002000
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-/* SCIF0 */
-#define CONFIG_SMSTP7_ENA 0x00200000
+#define CONFIG_SYS_TMU_CLK_DIV 4
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 97500000
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0"
+
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE 0xe6300000
+#define CONFIG_SPL_STACK 0xe6340000
+#define CONFIG_SPL_MAX_SIZE 0x4000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_CONS_SCIF0
+#define CONFIG_SH_SCIF_CLK_FREQ 65000000
+#endif
#endif /* __GOSE_H */
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 97f7b2c7e7..3bd4d51fc3 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -15,14 +15,9 @@
#include "rcar-gen2-common.h"
-/* STACK */
-#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
-#endif
-#define STACK_AREA_SIZE 0xC000
-#define LOW_LEVEL_MERAM_STACK \
+#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
+#define STACK_AREA_SIZE 0x00100000
+#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
@@ -32,60 +27,38 @@
/* SCIF */
-/* SPI */
+/* FLASH */
#define CONFIG_SPI
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_RCAR
-#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
-#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
-#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
-
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
-#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
-#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
-#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
-#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
-#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
+#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_SYS_TMU_CLK_DIV 4
-/* USB */
-#define CONFIG_USB_EHCI_RMOBILE
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-
-/* MMC */
-#define CONFIG_SH_MMCIF_ADDR 0xEE220000
-#define CONFIG_SH_MMCIF_CLK 97500000
-
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA 0x00400000
-/* MSIF */
-#define CONFIG_SMSTP2_ENA 0x00002000
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-/* SCIF0 */
-#define CONFIG_SMSTP7_ENA 0x00200000
-
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 97500000
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0"
+
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE 0xe6300000
+#define CONFIG_SPL_STACK 0xe6340000
+#define CONFIG_SPL_MAX_SIZE 0x4000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_CONS_SCIF0
+#define CONFIG_SH_SCIF_CLK_FREQ 65000000
+#endif
#endif /* __LAGER_H */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f39a272e6d..c5ec864b1e 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,9 +18,6 @@
#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10081fff
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index bd8019c6a5..c593f18fdb 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -19,8 +19,6 @@
#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32
-
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 94f8cda853..e07facd9c3 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -17,11 +17,6 @@
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */
-#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_TIMER_COUNTS_DOWN
-
#define CONFIG_SYS_NS16550_MEM32
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 7f9c7fbfd5..0fb72214f4 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -18,11 +18,10 @@
#define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10088000
-#define CONFIG_SPL_TEXT_BASE 0x10081004
+#define CONFIG_SPL_TEXT_BASE 0x10081000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK32"
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 78595b86ec..23dbfecf01 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -19,8 +19,6 @@
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32
-
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#endif
@@ -73,6 +71,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x0fffffff\0" \
"initrd_high=0x0fffffff\0" \
+ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 349c53c289..cd204e9718 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -18,9 +18,6 @@
#define CONFIG_SYS_TIMER_BASE 0x10350020
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
generated by cgit (git 2.34.1) at 2025-01-11 19:43:44 +0000