diff options
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/bcm3380-clock.h | 23 | ||||
| -rw-r--r-- | include/dt-bindings/clock/bcm6338-clock.h | 19 | ||||
| -rw-r--r-- | include/dt-bindings/clock/bcm6348-clock.h | 22 | ||||
| -rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 134 | ||||
| -rw-r--r-- | include/dt-bindings/reset/bcm3380-reset.h | 16 | ||||
| -rw-r--r-- | include/dt-bindings/reset/bcm6338-reset.h | 22 | ||||
| -rw-r--r-- | include/dt-bindings/reset/bcm6348-reset.h | 22 | ||||
| -rw-r--r-- | include/dt-bindings/reset/sun50i-a64-ccu.h | 98 |
8 files changed, 356 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/bcm3380-clock.h b/include/dt-bindings/clock/bcm3380-clock.h new file mode 100644 index 0000000000..00add2f226 --- /dev/null +++ b/include/dt-bindings/clock/bcm3380-clock.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from Broadcom GPL Source Code: + * Copyright (C) Broadcom Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM3380_H +#define __DT_BINDINGS_CLOCK_BCM3380_H + +#define BCM3380_CLK0_DDR 0 +#define BCM3380_CLK0_FPM 1 +#define BCM3380_CLK0_CRYPTO 2 +#define BCM3380_CLK0_EPHY 3 +#define BCM3380_CLK0_PCIE 16 +#define BCM3380_CLK0_SPI 17 +#define BCM3380_CLK0_ENET0 18 +#define BCM3380_CLK0_ENET1 19 +#define BCM3380_CLK0_PCM 27 + +#endif /* __DT_BINDINGS_CLOCK_BCM3380_H */ diff --git a/include/dt-bindings/clock/bcm6338-clock.h b/include/dt-bindings/clock/bcm6338-clock.h new file mode 100644 index 0000000000..3439c10062 --- /dev/null +++ b/include/dt-bindings/clock/bcm6338-clock.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM6338_H +#define __DT_BINDINGS_CLOCK_BCM6338_H + +#define BCM6338_CLK_ADSL 0 +#define BCM6338_CLK_MPI 1 +#define BCM6338_CLK_SDRAM 2 +#define BCM6338_CLK_ENET 4 +#define BCM6338_CLK_SAR 5 +#define BCM6338_CLK_SPI 9 + +#endif /* __DT_BINDINGS_CLOCK_BCM6338_H */ diff --git a/include/dt-bindings/clock/bcm6348-clock.h b/include/dt-bindings/clock/bcm6348-clock.h new file mode 100644 index 0000000000..5af066bb16 --- /dev/null +++ b/include/dt-bindings/clock/bcm6348-clock.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM6348_H +#define __DT_BINDINGS_CLOCK_BCM6348_H + +#define BCM6348_CLK_ADSL 0 +#define BCM6348_CLK_MPI 1 +#define BCM6348_CLK_SDRAM 2 +#define BCM6348_CLK_M2M 3 +#define BCM6348_CLK_ENET 4 +#define BCM6348_CLK_SAR 5 +#define BCM6348_CLK_USBS 6 +#define BCM6348_CLK_USBH 8 +#define BCM6348_CLK_SPI 9 + +#endif /* __DT_BINDINGS_CLOCK_BCM6348_H */ diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h new file mode 100644 index 0000000000..370c0a0473 --- /dev/null +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ +#define _DT_BINDINGS_CLK_SUN50I_A64_H_ + +#define CLK_BUS_MIPI_DSI 28 +#define CLK_BUS_CE 29 +#define CLK_BUS_DMA 30 +#define CLK_BUS_MMC0 31 +#define CLK_BUS_MMC1 32 +#define CLK_BUS_MMC2 33 +#define CLK_BUS_NAND 34 +#define CLK_BUS_DRAM 35 +#define CLK_BUS_EMAC 36 +#define CLK_BUS_TS 37 +#define CLK_BUS_HSTIMER 38 +#define CLK_BUS_SPI0 39 +#define CLK_BUS_SPI1 40 +#define CLK_BUS_OTG 41 +#define CLK_BUS_EHCI0 42 +#define CLK_BUS_EHCI1 43 +#define CLK_BUS_OHCI0 44 +#define CLK_BUS_OHCI1 45 +#define CLK_BUS_VE 46 +#define CLK_BUS_TCON0 47 +#define CLK_BUS_TCON1 48 +#define CLK_BUS_DEINTERLACE 49 +#define CLK_BUS_CSI 50 +#define CLK_BUS_HDMI 51 +#define CLK_BUS_DE 52 +#define CLK_BUS_GPU 53 +#define CLK_BUS_MSGBOX 54 +#define CLK_BUS_SPINLOCK 55 +#define CLK_BUS_CODEC 56 +#define CLK_BUS_SPDIF 57 +#define CLK_BUS_PIO 58 +#define CLK_BUS_THS 59 +#define CLK_BUS_I2S0 60 +#define CLK_BUS_I2S1 61 +#define CLK_BUS_I2S2 62 +#define CLK_BUS_I2C0 63 +#define CLK_BUS_I2C1 64 +#define CLK_BUS_I2C2 65 +#define CLK_BUS_SCR 66 +#define CLK_BUS_UART0 67 +#define CLK_BUS_UART1 68 +#define CLK_BUS_UART2 69 +#define CLK_BUS_UART3 70 +#define CLK_BUS_UART4 71 +#define CLK_BUS_DBG 72 +#define CLK_THS 73 +#define CLK_NAND 74 +#define CLK_MMC0 75 +#define CLK_MMC1 76 +#define CLK_MMC2 77 +#define CLK_TS 78 +#define CLK_CE 79 +#define CLK_SPI0 80 +#define CLK_SPI1 81 +#define CLK_I2S0 82 +#define CLK_I2S1 83 +#define CLK_I2S2 84 +#define CLK_SPDIF 85 +#define CLK_USB_PHY0 86 +#define CLK_USB_PHY1 87 +#define CLK_USB_HSIC 88 +#define CLK_USB_HSIC_12M 89 + +#define CLK_USB_OHCI0 91 + +#define CLK_USB_OHCI1 93 + +#define CLK_DRAM_VE 95 +#define CLK_DRAM_CSI 96 +#define CLK_DRAM_DEINTERLACE 97 +#define CLK_DRAM_TS 98 +#define CLK_DE 99 +#define CLK_TCON0 100 +#define CLK_TCON1 101 +#define CLK_DEINTERLACE 102 +#define CLK_CSI_MISC 103 +#define CLK_CSI_SCLK 104 +#define CLK_CSI_MCLK 105 +#define CLK_VE 106 +#define CLK_AC_DIG 107 +#define CLK_AC_DIG_4X 108 +#define CLK_AVS 109 +#define CLK_HDMI 110 +#define CLK_HDMI_DDC 111 + +#define CLK_DSI_DPHY 113 +#define CLK_GPU 114 + +#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */ diff --git a/include/dt-bindings/reset/bcm3380-reset.h b/include/dt-bindings/reset/bcm3380-reset.h new file mode 100644 index 0000000000..ddc575d92b --- /dev/null +++ b/include/dt-bindings/reset/bcm3380-reset.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from Broadcom GPL Source Code: + * Copyright (C) Broadcom Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM3380_H +#define __DT_BINDINGS_RESET_BCM3380_H + +#define BCM3380_RST0_SPI 0 +#define BCM3380_RST0_PCM 13 + +#endif /* __DT_BINDINGS_RESET_BCM3380_H */ diff --git a/include/dt-bindings/reset/bcm6338-reset.h b/include/dt-bindings/reset/bcm6338-reset.h new file mode 100644 index 0000000000..17a5e121e8 --- /dev/null +++ b/include/dt-bindings/reset/bcm6338-reset.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM6338_H +#define __DT_BINDINGS_RESET_BCM6338_H + +#define BCM6338_RST_SPI 0 +#define BCM6338_RST_ENET 2 +#define BCM6338_RST_USBH 3 +#define BCM6338_RST_USBS 4 +#define BCM6338_RST_ADSL 5 +#define BCM6338_RST_DMAMEM 6 +#define BCM6338_RST_SAR 7 +#define BCM6338_RST_ACLC 8 +#define BCM6338_RST_ADSL_MIPS 10 + +#endif /* __DT_BINDINGS_RESET_BCM6338_H */ diff --git a/include/dt-bindings/reset/bcm6348-reset.h b/include/dt-bindings/reset/bcm6348-reset.h new file mode 100644 index 0000000000..173937b9ef --- /dev/null +++ b/include/dt-bindings/reset/bcm6348-reset.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM6348_H +#define __DT_BINDINGS_RESET_BCM6348_H + +#define BCM6348_RST_SPI 0 +#define BCM6348_RST_ENET 2 +#define BCM6348_RST_USBH 3 +#define BCM6348_RST_USBS 4 +#define BCM6348_RST_ADSL 5 +#define BCM6348_RST_DMAMEM 6 +#define BCM6348_RST_SAR 7 +#define BCM6348_RST_ACLC 8 +#define BCM6348_RST_ADSL_MIPS 10 + +#endif /* __DT_BINDINGS_RESET_BCM6348_H */ diff --git a/include/dt-bindings/reset/sun50i-a64-ccu.h b/include/dt-bindings/reset/sun50i-a64-ccu.h new file mode 100644 index 0000000000..db60b29ddb --- /dev/null +++ b/include/dt-bindings/reset/sun50i-a64-ccu.h @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_ +#define _DT_BINDINGS_RST_SUN50I_A64_H_ + +#define RST_USB_PHY0 0 +#define RST_USB_PHY1 1 +#define RST_USB_HSIC 2 +#define RST_DRAM 3 +#define RST_MBUS 4 +#define RST_BUS_MIPI_DSI 5 +#define RST_BUS_CE 6 +#define RST_BUS_DMA 7 +#define RST_BUS_MMC0 8 +#define RST_BUS_MMC1 9 +#define RST_BUS_MMC2 10 +#define RST_BUS_NAND 11 +#define RST_BUS_DRAM 12 +#define RST_BUS_EMAC 13 +#define RST_BUS_TS 14 +#define RST_BUS_HSTIMER 15 +#define RST_BUS_SPI0 16 +#define RST_BUS_SPI1 17 +#define RST_BUS_OTG 18 +#define RST_BUS_EHCI0 19 +#define RST_BUS_EHCI1 20 +#define RST_BUS_OHCI0 21 +#define RST_BUS_OHCI1 22 +#define RST_BUS_VE 23 +#define RST_BUS_TCON0 24 +#define RST_BUS_TCON1 25 +#define RST_BUS_DEINTERLACE 26 +#define RST_BUS_CSI 27 +#define RST_BUS_HDMI0 28 +#define RST_BUS_HDMI1 29 +#define RST_BUS_DE 30 +#define RST_BUS_GPU 31 +#define RST_BUS_MSGBOX 32 +#define RST_BUS_SPINLOCK 33 +#define RST_BUS_DBG 34 +#define RST_BUS_LVDS 35 +#define RST_BUS_CODEC 36 +#define RST_BUS_SPDIF 37 +#define RST_BUS_THS 38 +#define RST_BUS_I2S0 39 +#define RST_BUS_I2S1 40 +#define RST_BUS_I2S2 41 +#define RST_BUS_I2C0 42 +#define RST_BUS_I2C1 43 +#define RST_BUS_I2C2 44 +#define RST_BUS_SCR 45 +#define RST_BUS_UART0 46 +#define RST_BUS_UART1 47 +#define RST_BUS_UART2 48 +#define RST_BUS_UART3 49 +#define RST_BUS_UART4 50 + +#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */ |