diff options
Diffstat (limited to 'include/ppc_asm.tmpl')
| -rw-r--r-- | include/ppc_asm.tmpl | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl index 379c493919..ce71ee9bc9 100644 --- a/include/ppc_asm.tmpl +++ b/include/ppc_asm.tmpl @@ -81,93 +81,6 @@ #define r30 30 #define r31 31 - -#if defined(CONFIG_8xx) - -/* Some special registers */ - -#define ICR 148 /* Interrupt Cause Register (37-44) */ -#define DER 149 -#define COUNTA 150 /* Breakpoint Counter (37-44) */ -#define COUNTB 151 /* Breakpoint Counter (37-44) */ -#define LCTRL1 156 /* Load/Store Support (37-40) */ -#define LCTRL2 157 /* Load/Store Support (37-41) */ -#define ICTRL 158 - -#endif /* CONFIG_8xx */ - - -#if defined(CONFIG_5xx) -/* Some special purpose registers */ -#define DER 149 /* Debug Enable Register */ -#define COUNTA 150 /* Breakpoint Counter */ -#define COUNTB 151 /* Breakpoint Counter */ -#define LCTRL1 156 /* Load/Store Support */ -#define LCTRL2 157 /* Load/Store Support */ -#define ICTRL 158 /* I-Bus Support Control Register */ -#define EID 81 -#endif /* CONFIG_5xx */ - -#if defined(CONFIG_8xx) - -/* Registers in the processor's internal memory map that we use. -*/ -#define SYPCR 0x00000004 -#define BR0 0x00000100 -#define OR0 0x00000104 -#define BR1 0x00000108 -#define OR1 0x0000010c -#define BR2 0x00000110 -#define OR2 0x00000114 -#define BR3 0x00000118 -#define OR3 0x0000011c -#define BR4 0x00000120 -#define OR4 0x00000124 - -#define MAR 0x00000164 -#define MCR 0x00000168 -#define MAMR 0x00000170 -#define MBMR 0x00000174 -#define MSTAT 0x00000178 -#define MPTPR 0x0000017a -#define MDR 0x0000017c - -#define TBSCR 0x00000200 -#define TBREFF0 0x00000204 - -#define PLPRCR 0x00000284 - -#elif defined(CONFIG_MPC8260) - -#define HID2 1011 - -#define HID0_IFEM (1<<7) - -#define HID0_ICE_BITPOS 16 -#define HID0_DCE_BITPOS 17 - -#define IM_REGBASE 0x10000 -#define IM_SYPCR (IM_REGBASE+0x0004) -#define IM_SWSR (IM_REGBASE+0x000e) -#define IM_BR0 (IM_REGBASE+0x0100) -#define IM_OR0 (IM_REGBASE+0x0104) -#define IM_BR1 (IM_REGBASE+0x0108) -#define IM_OR1 (IM_REGBASE+0x010c) -#define IM_BR2 (IM_REGBASE+0x0110) -#define IM_OR2 (IM_REGBASE+0x0114) -#define IM_MPTPR (IM_REGBASE+0x0184) -#define IM_PSDMR (IM_REGBASE+0x0190) -#define IM_PSRT (IM_REGBASE+0x019c) -#define IM_IMMR (IM_REGBASE+0x01a8) -#define IM_SCCR (IM_REGBASE+0x0c80) - -#elif defined(CONFIG_MPC5xxx) - -#define HID0_ICE_BITPOS 16 -#define HID0_DCE_BITPOS 17 - -#endif - #define curptr r2 #define SYNC \ |