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-rw-r--r--include/configs/khadas-vim.h2
-rw-r--r--include/configs/libretech-cc.h2
-rw-r--r--include/configs/meson-gx-common.h (renamed from include/configs/meson-gxbb-common.h)8
-rw-r--r--include/configs/odroid-c2.h2
-rw-r--r--include/configs/p212.h2
-rw-r--r--include/dt-bindings/clock/gxbb-aoclkc.h1
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h75
-rw-r--r--include/dt-bindings/gpio/meson-gxbb-gpio.h2
-rw-r--r--include/dt-bindings/gpio/meson-gxl-gpio.h2
-rw-r--r--include/dt-bindings/mfd/st,stpmu1.h60
-rw-r--r--include/environment/ti/boot.h3
-rw-r--r--include/image-sparse.h6
-rw-r--r--include/regmap.h10
-rw-r--r--include/stm32_rcc.h3
14 files changed, 164 insertions, 14 deletions
diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h
index db65f71d43..3a9c1e6992 100644
--- a/include/configs/khadas-vim.h
+++ b/include/configs/khadas-vim.h
@@ -13,6 +13,6 @@
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
-#include <configs/meson-gxbb-common.h>
+#include <configs/meson-gx-common.h>
#endif /* __CONFIG_H */
diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h
index dc778dc66a..b44d3bdd32 100644
--- a/include/configs/libretech-cc.h
+++ b/include/configs/libretech-cc.h
@@ -13,6 +13,6 @@
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
-#include <configs/meson-gxbb-common.h>
+#include <configs/meson-gx-common.h>
#endif /* __CONFIG_H */
diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gx-common.h
index 068e36e8d5..6e61b704a3 100644
--- a/include/configs/meson-gxbb-common.h
+++ b/include/configs/meson-gx-common.h
@@ -1,11 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Configuration for Amlogic Meson GXBB SoCs
+ * Configuration for Amlogic Meson GX SoCs
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*/
-#ifndef __MESON_GXBB_COMMON_CONFIG_H
-#define __MESON_GXBB_COMMON_CONFIG_H
+#ifndef __MESON_GX_COMMON_CONFIG_H
+#define __MESON_GX_COMMON_CONFIG_H
#define CONFIG_CPU_ARMV8
#define CONFIG_REMAKE_ELF
@@ -43,4 +43,4 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
-#endif /* __MESON_GXBB_COMMON_CONFIG_H */
+#endif /* __MESON_GX_COMMON_CONFIG_H */
diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h
index a8ad21edf6..913943421a 100644
--- a/include/configs/odroid-c2.h
+++ b/include/configs/odroid-c2.h
@@ -13,6 +13,6 @@
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-odroidc2.dtb\0"
-#include <configs/meson-gxbb-common.h>
+#include <configs/meson-gx-common.h>
#endif /* __CONFIG_H */
diff --git a/include/configs/p212.h b/include/configs/p212.h
index 0e49437209..53af6bc21c 100644
--- a/include/configs/p212.h
+++ b/include/configs/p212.h
@@ -15,6 +15,6 @@
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-p212.dtb\0"
-#include <configs/meson-gxbb-common.h>
+#include <configs/meson-gx-common.h>
#endif /* __CONFIG_H */
diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h b/include/dt-bindings/clock/gxbb-aoclkc.h
index 31751482d1..9d15e2221f 100644
--- a/include/dt-bindings/clock/gxbb-aoclkc.h
+++ b/include/dt-bindings/clock/gxbb-aoclkc.h
@@ -62,5 +62,6 @@
#define CLKID_AO_UART1 3
#define CLKID_AO_UART2 4
#define CLKID_AO_IR_BLASTER 5
+#define CLKID_AO_CEC_32K 6
#endif
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index e3e9f7919c..8ba99a5e3f 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* GXBB clock tree IDs
*/
@@ -5,37 +6,96 @@
#ifndef __GXBB_CLKC_H
#define __GXBB_CLKC_H
+#define CLKID_SYS_PLL 0
#define CLKID_HDMI_PLL 2
+#define CLKID_FIXED_PLL 3
#define CLKID_FCLK_DIV2 4
#define CLKID_FCLK_DIV3 5
#define CLKID_FCLK_DIV4 6
+#define CLKID_FCLK_DIV5 7
+#define CLKID_FCLK_DIV7 8
#define CLKID_GP0_PLL 9
#define CLKID_CLK81 12
+#define CLKID_MPLL0 13
+#define CLKID_MPLL1 14
#define CLKID_MPLL2 15
+#define CLKID_DDR 16
+#define CLKID_DOS 17
+#define CLKID_ISA 18
+#define CLKID_PL301 19
+#define CLKID_PERIPHS 20
#define CLKID_SPICC 21
#define CLKID_I2C 22
#define CLKID_SAR_ADC 23
+#define CLKID_SMART_CARD 24
#define CLKID_RNG0 25
#define CLKID_UART0 26
+#define CLKID_SDHC 27
+#define CLKID_STREAM 28
+#define CLKID_ASYNC_FIFO 29
+#define CLKID_SDIO 30
+#define CLKID_ABUF 31
+#define CLKID_HIU_IFACE 32
+#define CLKID_ASSIST_MISC 33
#define CLKID_SPI 34
#define CLKID_ETH 36
+#define CLKID_I2S_SPDIF 35
+#define CLKID_DEMUX 37
#define CLKID_AIU_GLUE 38
#define CLKID_IEC958 39
#define CLKID_I2S_OUT 40
+#define CLKID_AMCLK 41
+#define CLKID_AIFIFO2 42
+#define CLKID_MIXER 43
#define CLKID_MIXER_IFACE 44
+#define CLKID_ADC 45
+#define CLKID_BLKMV 46
#define CLKID_AIU 47
#define CLKID_UART1 48
+#define CLKID_G2D 49
#define CLKID_USB0 50
#define CLKID_USB1 51
+#define CLKID_RESET 52
+#define CLKID_NAND 53
+#define CLKID_DOS_PARSER 54
#define CLKID_USB 55
+#define CLKID_VDIN1 56
+#define CLKID_AHB_ARB0 57
+#define CLKID_EFUSE 58
+#define CLKID_BOOT_ROM 59
+#define CLKID_AHB_DATA_BUS 60
+#define CLKID_AHB_CTRL_BUS 61
+#define CLKID_HDMI_INTR_SYNC 62
#define CLKID_HDMI_PCLK 63
#define CLKID_USB1_DDR_BRIDGE 64
#define CLKID_USB0_DDR_BRIDGE 65
+#define CLKID_MMC_PCLK 66
+#define CLKID_DVIN 67
#define CLKID_UART2 68
#define CLKID_SANA 69
+#define CLKID_VPU_INTR 70
+#define CLKID_SEC_AHB_AHB3_BRIDGE 71
+#define CLKID_CLK81_A53 72
+#define CLKID_VCLK2_VENCI0 73
+#define CLKID_VCLK2_VENCI1 74
+#define CLKID_VCLK2_VENCP0 75
+#define CLKID_VCLK2_VENCP1 76
#define CLKID_GCLK_VENCI_INT0 77
+#define CLKID_GCLK_VENCI_INT 78
+#define CLKID_DAC_CLK 79
#define CLKID_AOCLK_GATE 80
#define CLKID_IEC958_GATE 81
+#define CLKID_ENC480P 82
+#define CLKID_RNG1 83
+#define CLKID_GCLK_VENCI_INT1 84
+#define CLKID_VCLK2_VENCLMCC 85
+#define CLKID_VCLK2_VENCL 86
+#define CLKID_VCLK_OTHER 87
+#define CLKID_EDP 88
+#define CLKID_AO_MEDIA_CPU 89
+#define CLKID_AO_AHB_SRAM 90
+#define CLKID_AO_AHB_BUS 91
+#define CLKID_AO_IFACE 92
#define CLKID_AO_I2C 93
#define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95
@@ -50,5 +110,20 @@
#define CLKID_CTS_AMCLK 107
#define CLKID_CTS_MCLK_I958 110
#define CLKID_CTS_I958 113
+#define CLKID_32K_CLK 114
+#define CLKID_SD_EMMC_A_CLK0 119
+#define CLKID_SD_EMMC_B_CLK0 122
+#define CLKID_SD_EMMC_C_CLK0 125
+#define CLKID_VPU_0_SEL 126
+#define CLKID_VPU_0 128
+#define CLKID_VPU_1_SEL 129
+#define CLKID_VPU_1 131
+#define CLKID_VPU 132
+#define CLKID_VAPB_0_SEL 133
+#define CLKID_VAPB_0 135
+#define CLKID_VAPB_1_SEL 136
+#define CLKID_VAPB_1 138
+#define CLKID_VAPB_SEL 139
+#define CLKID_VAPB 140
#endif /* __GXBB_CLKC_H */
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
index 58654fd7aa..43a68a1110 100644
--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h
+++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h
@@ -29,6 +29,7 @@
#define GPIOAO_11 11
#define GPIOAO_12 12
#define GPIOAO_13 13
+#define GPIO_TEST_N 14
#define GPIOZ_0 0
#define GPIOZ_1 1
@@ -149,6 +150,5 @@
#define GPIOCLK_1 116
#define GPIOCLK_2 117
#define GPIOCLK_3 118
-#define GPIO_TEST_N 119
#endif
diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h
index 684d0d7add..01f2a2abd3 100644
--- a/include/dt-bindings/gpio/meson-gxl-gpio.h
+++ b/include/dt-bindings/gpio/meson-gxl-gpio.h
@@ -25,6 +25,7 @@
#define GPIOAO_7 7
#define GPIOAO_8 8
#define GPIOAO_9 9
+#define GPIO_TEST_N 10
#define GPIOZ_0 0
#define GPIOZ_1 1
@@ -126,6 +127,5 @@
#define GPIOX_18 97
#define GPIOCLK_0 98
#define GPIOCLK_1 99
-#define GPIO_TEST_N 100
#endif
diff --git a/include/dt-bindings/mfd/st,stpmu1.h b/include/dt-bindings/mfd/st,stpmu1.h
new file mode 100644
index 0000000000..81982ebe2c
--- /dev/null
+++ b/include/dt-bindings/mfd/st,stpmu1.h
@@ -0,0 +1,60 @@
+/*
+ * This file is part of stpmu1 pmic driver
+ *
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
+ *
+ * License type: GPLv2
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __DT_BINDINGS_STPMU1_H__
+#define __DT_BINDINGS_STPMU1_H__
+
+/* IRQ definitions */
+#define IT_PONKEY_F 0
+#define IT_PONKEY_R 1
+#define IT_WAKEUP_F 2
+#define IT_WAKEUP_R 3
+#define IT_VBUS_OTG_F 4
+#define IT_VBUS_OTG_R 5
+#define IT_SWOUT_F 6
+#define IT_SWOUT_R 7
+
+#define IT_CURLIM_BUCK1 8
+#define IT_CURLIM_BUCK2 9
+#define IT_CURLIM_BUCK3 10
+#define IT_CURLIM_BUCK4 11
+#define IT_OCP_OTG 12
+#define IT_OCP_SWOUT 13
+#define IT_OCP_BOOST 14
+#define IT_OVP_BOOST 15
+
+#define IT_CURLIM_LDO1 16
+#define IT_CURLIM_LDO2 17
+#define IT_CURLIM_LDO3 18
+#define IT_CURLIM_LDO4 19
+#define IT_CURLIM_LDO5 20
+#define IT_CURLIM_LDO6 21
+#define IT_SHORT_SWOTG 22
+#define IT_SHORT_SWOUT 23
+
+#define IT_TWARN_F 24
+#define IT_TWARN_R 25
+#define IT_VINLOW_F 26
+#define IT_VINLOW_R 27
+#define IT_SWIN_F 30
+#define IT_SWIN_R 31
+
+#endif /* __DT_BINDINGS_STPMU1_H__ */
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index 31042fad67..a0e1cd1656 100644
--- a/include/environment/ti/boot.h
+++ b/include/environment/ti/boot.h
@@ -36,6 +36,7 @@
"run mmcboot;\0" \
"emmc_android_boot=" \
"echo Trying to boot Android from eMMC ...; " \
+ "run update_to_fit; " \
"setenv eval_bootargs setenv bootargs $bootargs; " \
"run eval_bootargs; " \
"setenv mmcdev 1; " \
@@ -48,7 +49,7 @@
"part size mmc ${mmcdev} boot boot_size; " \
"mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; " \
"mmc read ${loadaddr} ${boot_start} ${boot_size}; " \
- "bootm $loadaddr $loadaddr $fdtaddr;\0"
+ "bootm ${loadaddr}#${fdtfile};\0 "
#ifdef CONFIG_OMAP54XX
diff --git a/include/image-sparse.h b/include/image-sparse.h
index 4d1f910487..f39dc16617 100644
--- a/include/image-sparse.h
+++ b/include/image-sparse.h
@@ -22,6 +22,8 @@ struct sparse_storage {
lbaint_t (*reserve)(struct sparse_storage *info,
lbaint_t blk,
lbaint_t blkcnt);
+
+ void (*mssg)(const char *str);
};
static inline int is_sparse_image(void *buf)
@@ -35,5 +37,5 @@ static inline int is_sparse_image(void *buf)
return 0;
}
-void write_sparse_image(struct sparse_storage *info, const char *part_name,
- void *data, unsigned sz);
+int write_sparse_image(struct sparse_storage *info, const char *part_name,
+ void *data);
diff --git a/include/regmap.h b/include/regmap.h
index e96c79dd26..6a574eaa41 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -43,6 +43,16 @@ int regmap_read(struct regmap *map, uint offset, uint *valp);
regmap_read(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), valp)
/**
+ * regmap_update_bits() - Perform a read/modify/write using a mask
+ *
+ * @map: The map returned by regmap_init_mem*()
+ * @offset: Offset of the memory
+ * @mask: Mask to apply to the read value
+ * @val: Value to apply to the value to write
+ */
+int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);
+
+/**
* regmap_init_mem() - Set up a new register map that uses memory access
*
* Use regmap_uninit() to free it.
diff --git a/include/stm32_rcc.h b/include/stm32_rcc.h
index 748c2ebd0c..71da3c1a87 100644
--- a/include/stm32_rcc.h
+++ b/include/stm32_rcc.h
@@ -40,7 +40,8 @@ struct stm32_clk_info {
};
enum soc_family {
- STM32F4,
+ STM32F42X,
+ STM32F469,
STM32F7,
};
generated by cgit (git 2.34.1) at 2025-01-13 05:47:49 +0000