diff options
Diffstat (limited to 'include')
46 files changed, 478 insertions, 112 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index a6d1d2ab3f..dc4cbdb673 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -28,18 +28,18 @@ typedef struct global_data { bd_t *bd; unsigned long flags; unsigned int baudrate; - unsigned long cpu_clk; /* CPU clock in Hz! */ + unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ unsigned long pci_clk; unsigned long mem_clk; #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) - unsigned long fb_base; /* Base address of framebuffer mem */ + unsigned long fb_base; /* Base address of framebuffer mem */ #endif #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - unsigned long post_log_word; /* Record POST activities */ - unsigned long post_log_res; /* success of POST test */ - unsigned long post_init_f_time; /* When post_init_f started */ + unsigned long post_log_word; /* Record POST activities */ + unsigned long post_log_res; /* success of POST test */ + unsigned long post_init_f_time; /* When post_init_f started */ #endif #ifdef CONFIG_BOARD_TYPES unsigned long board_type; @@ -48,14 +48,13 @@ typedef struct global_data { #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ #endif - unsigned long env_addr; /* Address of Environment struct */ + unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid? */ - unsigned long ram_top; /* Top address of RAM used by U-Boot */ - + unsigned long ram_top; /* Top address of RAM used by U-Boot */ unsigned long relocaddr; /* Start address of U-Boot in RAM */ - phys_size_t ram_size; /* RAM size */ - unsigned long mon_len; /* monitor len */ + phys_size_t ram_size; /* RAM size */ + unsigned long mon_len; /* monitor len */ unsigned long irq_sp; /* irq stack pointer */ unsigned long start_addr_sp; /* start_addr_stackpointer */ unsigned long reloc_off; @@ -67,14 +66,14 @@ typedef struct global_data { struct list_head uclass_root; /* Head of core tree */ #endif #ifdef CONFIG_TIMER - struct udevice *timer; /* Timer instance for Driver Model */ + struct udevice *timer; /* Timer instance for Driver Model */ #endif - const void *fdt_blob; /* Our device tree, NULL if none */ - void *new_fdt; /* Relocated FDT */ - unsigned long fdt_size; /* Space reserved for relocated FDT */ + const void *fdt_blob; /* Our device tree, NULL if none */ + void *new_fdt; /* Relocated FDT */ + unsigned long fdt_size; /* Space reserved for relocated FDT */ struct jt_funcs *jt; /* jump table */ - char env_buf[32]; /* buffer for getenv() before reloc. */ + char env_buf[32]; /* buffer for getenv() before reloc. */ #ifdef CONFIG_TRACE void *trace_buff; /* The trace buffer */ #endif @@ -125,8 +124,8 @@ typedef struct global_data { #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ -#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ -#define GD_FLG_RECORD 0x01000 /* Record console */ -#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ +#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ +#define GD_FLG_RECORD 0x01000 /* Record console */ +#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ #endif /* __ASM_GENERIC_GBL_DATA_H */ diff --git a/include/compiler.h b/include/compiler.h index 47c296e202..65b826e4d1 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -15,7 +15,7 @@ defined(__sun__) || \ defined(__APPLE__) # include <inttypes.h> -#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__) +#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__) || defined(__OpenBSD__) # include <stdint.h> #endif @@ -50,6 +50,8 @@ typedef unsigned long ulong; #endif #ifdef __FreeBSD__ # include <sys/endian.h> /* htole32 and friends */ +#elif defined(__OpenBSD__) +# include <endian.h> #endif #include <time.h> @@ -82,7 +84,20 @@ typedef unsigned int uint; # define uswap_64(x) _uswap_64(x, ) #endif -#if __BYTE_ORDER == __LITTLE_ENDIAN +#if defined(__OpenBSD__) +#define cpu_to_le16(x) htole16(x) +#define cpu_to_le32(x) htole32(x) +#define cpu_to_le64(x) htole64(x) +#define le16_to_cpu(x) letoh16(x) +#define le32_to_cpu(x) letoh32(x) +#define le64_to_cpu(x) letoh64(x) +#define cpu_to_be16(x) htobe16(x) +#define cpu_to_be32(x) htobe32(x) +#define cpu_to_be64(x) htobe64(x) +#define be16_to_cpu(x) betoh16(x) +#define be32_to_cpu(x) betoh32(x) +#define be64_to_cpu(x) betoh64(x) +#elif __BYTE_ORDER == __LITTLE_ENDIAN # define cpu_to_le16(x) (x) # define cpu_to_le32(x) (x) # define cpu_to_le64(x) (x) diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 30c42781ca..56a63b4944 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -277,7 +277,8 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index ef4a8baf43..c9bc0930e0 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -335,7 +335,8 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 518b904807..fe2c65ffb9 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -37,9 +37,6 @@ /* SPL defines. */ #define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR -#define CONFIG_SPL_MAX_SIZE (NON_SECURE_SRAM_END - \ - CONFIG_PUB_ROM_DATA_SIZE - \ - CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) #define CONFIG_SPL_POWER_SUPPORT diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 46e8d4cfd7..cf74dbe740 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -102,8 +102,6 @@ #ifdef CONFIG_SPL_BUILD #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH -#undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (256 << 10) /* 256 KiB */ #endif /* SPI SPL */ diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 18e59fc73a..b08f341227 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,7 +45,6 @@ #define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index b5e5029217..4b255d8d77 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -91,6 +91,5 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 04da877db5..1de5edc301 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -46,10 +46,12 @@ * area between 0x402F0400 and 0x4030B800 as a download area and * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also * supports X-MODEM loading via UART, and we leverage this and then use - * Y-MODEM to load u-boot.img, when booted over UART. + * Y-MODEM to load u-boot.img, when booted over UART. We must also include + * the scratch space that U-Boot uses in SRAM. */ #define CONFIG_SPL_TEXT_BASE 0x402F0400 -#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index f1837752ca..22c32496aa 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -33,7 +33,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_NET_RETRY_COUNT 2 +#define CONFIG_NET_RETRY_COUNT 10 /* Network console */ #define CONFIG_NETCONSOLE 1 diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 03dc3cc0d9..5d717a4a52 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -344,7 +344,8 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) /* * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index b896d4d79a..bdfb168f2c 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -153,7 +153,6 @@ /* SPL defines. */ #define CONFIG_SPL_TEXT_BASE 0x40300350 -#define CONFIG_SPL_MAX_SIZE (64 * 1024) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024) diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index b66949f415..ed1ee5453f 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -185,8 +185,6 @@ /* In SPL, use the environment and discard MMC support for space. */ #ifdef CONFIG_SPL_BUILD #undef CONFIG_SPL_MMC_SUPPORT -#undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */ #endif #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 2b172a5073..7c597904e6 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -60,8 +60,6 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -#define CONFIG_ARMV7_PSCI 1 -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* Reserve top 1M for secure RAM */ #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 8b957996a7..c1a9e643ec 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -119,7 +119,8 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (48 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 47180f9ce8..abbd1c4623 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,9 +9,7 @@ #define CONFIG_LS102XA -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2f19950dff..511b0b3f0f 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,9 +9,7 @@ #define CONFIG_LS102XA -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 7295fa6199..4b1077c02b 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -72,8 +72,6 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP -#define CONFIG_ARMV7_PSCI -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 #endif diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index e87b4c0118..2397b5e6a4 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -343,7 +343,8 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index e0d25937f7..3389bf3164 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -16,11 +16,11 @@ #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> -/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ -#undef CONFIG_SPL_MAX_SIZE +/* + * We are only ever GP parts and will utilize all of the "downloaded image" + * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). + */ #undef CONFIG_SPL_TEXT_BASE - -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_TEXT_BASE 0x40200000 /* diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 05a43610e5..496da17b39 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -30,11 +30,13 @@ #include <configs/ti_omap3_common.h> -/* Override default SPL info to minimize empty space and allow BCH8 in SPL */ +/* + * We are only ever GP parts and will utilize all of the "downloaded image" + * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in + * order to allow for BCH8 to fit in. + */ #undef CONFIG_SPL_TEXT_BASE -#undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_TEXT_BASE 0x40200000 /* Display CPU and Board information */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 618a546ded..841e4bdcc4 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -11,10 +11,12 @@ #define CONFIG_NAND #include <configs/ti_omap3_common.h> -#undef CONFIG_SPL_MAX_SIZE +/* + * We are only ever GP parts and will utilize all of the "downloaded image" + * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). + */ #undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_BCH diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 9e7bd88adb..b66431929c 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -85,21 +85,29 @@ #define MTDPARTS_DEFAULT #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - "usbtty=cdc_acm\0" \ - "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ - "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ - "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ + "run distro_bootcmd; " \ + "setenv bootargs ${bootargs_ubi}; " \ + "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \ "source ${loadaddr}; " \ "fi; " \ "ubi part boot && ubifsmount ubi:boot && " \ "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + "usbtty=cdc_acm\0" \ + "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ + "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + BOOTENV \ + /* memtest works on */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 752cc319fc..e34814bd5e 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -16,6 +16,7 @@ /* Architecture, CPU, etc.*/ #define CONFIG_ARCH_CPU_INIT +#define CONFIG_BOARD_EARLY_INIT_F /* Use SoC timer for AArch32, but architected timer for AArch64 */ #ifndef CONFIG_ARM64 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 3d25e3db3e..1f9b3905b4 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -124,7 +124,8 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x402F0400 -#define CONFIG_SPL_MAX_SIZE (101 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index e2f5e60b2a..5062cd0e44 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -126,7 +126,8 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 0625502f44..67a26c2e45 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -22,8 +22,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI 1 -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index e9074d5dfb..d8e6e20795 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -20,8 +20,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI 1 -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index b9a8731ee8..011d70f367 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -26,19 +26,6 @@ #define CONFIG_SUNXI_USB_PHYS 2 #endif -#ifndef CONFIG_MACH_SUN8I_A83T -#define CONFIG_ARMV7_PSCI 1 -#if defined(CONFIG_MACH_SUN8I_A23) -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 -#elif defined(CONFIG_MACH_SUN8I_A33) -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 -#elif defined(CONFIG_MACH_SUN8I_H3) -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 -#else -#error Unsupported sun8i variant -#endif -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index f64edd4b0f..708ab1793e 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -99,7 +99,7 @@ * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 -#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */ #else #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ @@ -220,7 +220,8 @@ #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) -#define LOW_LEVEL_SRAM_STACK 0x0001A000 +/* FIXME: 40 KiB instead of 32 KiB ? */ +#define LOW_LEVEL_SRAM_STACK 0x00018000 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #else /* end of 32 KiB in sram */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 5213065095..35030fe874 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -218,7 +218,8 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 52bd8370a0..7b6ebdaff5 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -326,7 +326,8 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) /* * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 732854eb30..198f649326 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -157,7 +157,8 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 17f12a898a..071511cff5 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -123,7 +123,8 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40400000 -#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index a9b10d0532..9a671de730 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -58,7 +58,6 @@ * Y-MODEM to load u-boot.img, when booted over UART. */ #define CONFIG_SPL_TEXT_BASE 0x402F0400 -#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 9f947eeb87..d60d213d54 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -212,14 +212,14 @@ /* * Place the image at the start of the ROM defined image space (per * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined - * downloaded image area. We initalize DRAM as soon as we can so that - * we can place stack, malloc and BSS there. We load U-Boot itself into - * memory at 0x80800000 for legacy reasons (to not conflict with older - * SPLs). We have our BSS be placed 2MiB after this, to allow for the - * default Linux kernel address of 0x80008000 to work with most sized - * kernels, in the Falcon Mode case. We have the SPL malloc pool at the - * end of the BSS area. We suggest that the stack be placed at 32MiB after - * the start of DRAM to allow room for all of the above (handled in Kconfig). + * downloaded image area minus 1KiB for scratch space. We initalize DRAM as + * soon as we can so that we can place stack, malloc and BSS there. We load + * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict + * with older SPLs). We have our BSS be placed 2MiB after this, to allow for + * the default Linux kernel address of 0x80008000 to work with most sized + * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end + * of the BSS area. We suggest that the stack be placed at 32MiB after the + * start of DRAM to allow room for all of the above (handled in Kconfig). */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x80800000 @@ -233,6 +233,11 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #endif +#ifndef CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) +#endif + /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index c54b7b55c4..33426c89bb 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -68,7 +68,6 @@ /* SPL */ #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index e6e88c5282..8c88ebf2f0 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -151,7 +151,6 @@ * So moving TEXT_BASE down to non-HS limit. */ #define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index e42c88e3b9..cbdf0bc0db 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -154,13 +154,6 @@ #define CONFIG_SPL_TEXT_BASE 0x40300000 #endif -/* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */ -#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) -#define TI_ROM_BOOT_LOAD_END 0x4037E000 -#else -#define TI_ROM_BOOT_LOAD_END 0x4031E000 -#endif -#define CONFIG_SPL_MAX_SIZE (TI_ROM_BOOT_LOAD_END - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index ae0e89c594..e5d321ac6a 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -338,7 +338,8 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 55ba99c691..b3ca46be67 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -11,9 +11,7 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index 9583e8c081..b509a9cfd4 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,6 +16,5 @@ #define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif diff --git a/include/dm/platform_data/serial_bcm283x_mu.h b/include/dm/platform_data/serial_bcm283x_mu.h index 57ae6adc05..c47d3c0e60 100644 --- a/include/dm/platform_data/serial_bcm283x_mu.h +++ b/include/dm/platform_data/serial_bcm283x_mu.h @@ -19,6 +19,7 @@ struct bcm283x_mu_serial_platdata { unsigned long base; unsigned int clock; bool skip_init; + bool disabled; }; #endif diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h new file mode 100644 index 0000000000..58654fd7aa --- /dev/null +++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h @@ -0,0 +1,154 @@ +/* + * GPIO definitions for Amlogic Meson GXBB SoCs + * + * Copyright (C) 2016 Endless Mobile, Inc. + * Author: Carlo Caione <carlo@endlessm.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H +#define _DT_BINDINGS_MESON_GXBB_GPIO_H + +#define GPIOAO_0 0 +#define GPIOAO_1 1 +#define GPIOAO_2 2 +#define GPIOAO_3 3 +#define GPIOAO_4 4 +#define GPIOAO_5 5 +#define GPIOAO_6 6 +#define GPIOAO_7 7 +#define GPIOAO_8 8 +#define GPIOAO_9 9 +#define GPIOAO_10 10 +#define GPIOAO_11 11 +#define GPIOAO_12 12 +#define GPIOAO_13 13 + +#define GPIOZ_0 0 +#define GPIOZ_1 1 +#define GPIOZ_2 2 +#define GPIOZ_3 3 +#define GPIOZ_4 4 +#define GPIOZ_5 5 +#define GPIOZ_6 6 +#define GPIOZ_7 7 +#define GPIOZ_8 8 +#define GPIOZ_9 9 +#define GPIOZ_10 10 +#define GPIOZ_11 11 +#define GPIOZ_12 12 +#define GPIOZ_13 13 +#define GPIOZ_14 14 +#define GPIOZ_15 15 +#define GPIOH_0 16 +#define GPIOH_1 17 +#define GPIOH_2 18 +#define GPIOH_3 19 +#define BOOT_0 20 +#define BOOT_1 21 +#define BOOT_2 22 +#define BOOT_3 23 +#define BOOT_4 24 +#define BOOT_5 25 +#define BOOT_6 26 +#define BOOT_7 27 +#define BOOT_8 28 +#define BOOT_9 29 +#define BOOT_10 30 +#define BOOT_11 31 +#define BOOT_12 32 +#define BOOT_13 33 +#define BOOT_14 34 +#define BOOT_15 35 +#define BOOT_16 36 +#define BOOT_17 37 +#define CARD_0 38 +#define CARD_1 39 +#define CARD_2 40 +#define CARD_3 41 +#define CARD_4 42 +#define CARD_5 43 +#define CARD_6 44 +#define GPIODV_0 45 +#define GPIODV_1 46 +#define GPIODV_2 47 +#define GPIODV_3 48 +#define GPIODV_4 49 +#define GPIODV_5 50 +#define GPIODV_6 51 +#define GPIODV_7 52 +#define GPIODV_8 53 +#define GPIODV_9 54 +#define GPIODV_10 55 +#define GPIODV_11 56 +#define GPIODV_12 57 +#define GPIODV_13 58 +#define GPIODV_14 59 +#define GPIODV_15 60 +#define GPIODV_16 61 +#define GPIODV_17 62 +#define GPIODV_18 63 +#define GPIODV_19 64 +#define GPIODV_20 65 +#define GPIODV_21 66 +#define GPIODV_22 67 +#define GPIODV_23 68 +#define GPIODV_24 69 +#define GPIODV_25 70 +#define GPIODV_26 71 +#define GPIODV_27 72 +#define GPIODV_28 73 +#define GPIODV_29 74 +#define GPIOY_0 75 +#define GPIOY_1 76 +#define GPIOY_2 77 +#define GPIOY_3 78 +#define GPIOY_4 79 +#define GPIOY_5 80 +#define GPIOY_6 81 +#define GPIOY_7 82 +#define GPIOY_8 83 +#define GPIOY_9 84 +#define GPIOY_10 85 +#define GPIOY_11 86 +#define GPIOY_12 87 +#define GPIOY_13 88 +#define GPIOY_14 89 +#define GPIOY_15 90 +#define GPIOY_16 91 +#define GPIOX_0 92 +#define GPIOX_1 93 +#define GPIOX_2 94 +#define GPIOX_3 95 +#define GPIOX_4 96 +#define GPIOX_5 97 +#define GPIOX_6 98 +#define GPIOX_7 99 +#define GPIOX_8 100 +#define GPIOX_9 101 +#define GPIOX_10 102 +#define GPIOX_11 103 +#define GPIOX_12 104 +#define GPIOX_13 105 +#define GPIOX_14 106 +#define GPIOX_15 107 +#define GPIOX_16 108 +#define GPIOX_17 109 +#define GPIOX_18 110 +#define GPIOX_19 111 +#define GPIOX_20 112 +#define GPIOX_21 113 +#define GPIOX_22 114 +#define GPIOCLK_0 115 +#define GPIOCLK_1 116 +#define GPIOCLK_2 117 +#define GPIOCLK_3 118 +#define GPIO_TEST_N 119 + +#endif diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h new file mode 100644 index 0000000000..524d6077ac --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h @@ -0,0 +1,210 @@ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * GPL LICENSE SUMMARY + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + * The full GNU General Public License is included in this distribution + * in the file called COPYING. + * + * BSD LICENSE + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H + +/* RESET0 */ +#define RESET_HIU 0 +/* 1 */ +#define RESET_DOS_RESET 2 +#define RESET_DDR_TOP 3 +#define RESET_DCU_RESET 4 +#define RESET_VIU 5 +#define RESET_AIU 6 +#define RESET_VID_PLL_DIV 7 +/* 8 */ +#define RESET_PMUX 9 +#define RESET_VENC 10 +#define RESET_ASSIST 11 +#define RESET_AFIFO2 12 +#define RESET_VCBUS 13 +/* 14 */ +/* 15 */ +#define RESET_GIC 16 +#define RESET_CAPB3_DECODE 17 +#define RESET_NAND_CAPB3 18 +#define RESET_HDMITX_CAPB3 19 +#define RESET_MALI_CAPB3 20 +#define RESET_DOS_CAPB3 21 +#define RESET_SYS_CPU_CAPB3 22 +#define RESET_CBUS_CAPB3 23 +#define RESET_AHB_CNTL 24 +#define RESET_AHB_DATA 25 +#define RESET_VCBUS_CLK81 26 +#define RESET_MMC 27 +#define RESET_MIPI_0 28 +#define RESET_MIPI_1 29 +#define RESET_MIPI_2 30 +#define RESET_MIPI_3 31 +/* RESET1 */ +#define RESET_CPPM 32 +#define RESET_DEMUX 33 +#define RESET_USB_OTG 34 +#define RESET_DDR 35 +#define RESET_AO_RESET 36 +#define RESET_BT656 37 +#define RESET_AHB_SRAM 38 +/* 39 */ +#define RESET_PARSER 40 +#define RESET_BLKMV 41 +#define RESET_ISA 42 +#define RESET_ETHERNET 43 +#define RESET_SD_EMMC_A 44 +#define RESET_SD_EMMC_B 45 +#define RESET_SD_EMMC_C 46 +#define RESET_ROM_BOOT 47 +#define RESET_SYS_CPU_0 48 +#define RESET_SYS_CPU_1 49 +#define RESET_SYS_CPU_2 50 +#define RESET_SYS_CPU_3 51 +#define RESET_SYS_CPU_CORE_0 52 +#define RESET_SYS_CPU_CORE_1 53 +#define RESET_SYS_CPU_CORE_2 54 +#define RESET_SYS_CPU_CORE_3 55 +#define RESET_SYS_PLL_DIV 56 +#define RESET_SYS_CPU_AXI 57 +#define RESET_SYS_CPU_L2 58 +#define RESET_SYS_CPU_P 59 +#define RESET_SYS_CPU_MBIST 60 +/* 61 */ +/* 62 */ +/* 63 */ +/* RESET2 */ +#define RESET_VD_RMEM 64 +#define RESET_AUDIN 65 +#define RESET_HDMI_TX 66 +/* 67 */ +/* 68 */ +/* 69 */ +#define RESET_GE2D 70 +#define RESET_PARSER_REG 71 +#define RESET_PARSER_FETCH 72 +#define RESET_PARSER_CTL 73 +#define RESET_PARSER_TOP 74 +/* 75 */ +/* 76 */ +#define RESET_AO_CPU_RESET 77 +#define RESET_MALI 78 +#define RESET_HDMI_SYSTEM_RESET 79 +/* 80-95 */ +/* RESET3 */ +#define RESET_RING_OSCILLATOR 96 +#define RESET_SYS_CPU 97 +#define RESET_EFUSE 98 +#define RESET_SYS_CPU_BVCI 99 +#define RESET_AIFIFO 100 +#define RESET_TVFE 101 +#define RESET_AHB_BRIDGE_CNTL 102 +/* 103 */ +#define RESET_AUDIO_DAC 104 +#define RESET_DEMUX_TOP 105 +#define RESET_DEMUX_DES 106 +#define RESET_DEMUX_S2P_0 107 +#define RESET_DEMUX_S2P_1 108 +#define RESET_DEMUX_RESET_0 109 +#define RESET_DEMUX_RESET_1 110 +#define RESET_DEMUX_RESET_2 111 +/* 112-127 */ +/* RESET4 */ +/* 128 */ +/* 129 */ +/* 130 */ +/* 131 */ +#define RESET_DVIN_RESET 132 +#define RESET_RDMA 133 +#define RESET_VENCI 134 +#define RESET_VENCP 135 +/* 136 */ +#define RESET_VDAC 137 +#define RESET_RTC 138 +/* 139 */ +#define RESET_VDI6 140 +#define RESET_VENCL 141 +#define RESET_I2C_MASTER_2 142 +#define RESET_I2C_MASTER_1 143 +/* 144-159 */ +/* RESET5 */ +/* 160-191 */ +/* RESET6 */ +#define RESET_PERIPHS_GENERAL 192 +#define RESET_PERIPHS_SPICC 193 +#define RESET_PERIPHS_SMART_CARD 194 +#define RESET_PERIPHS_SAR_ADC 195 +#define RESET_PERIPHS_I2C_MASTER_0 196 +#define RESET_SANA 197 +/* 198 */ +#define RESET_PERIPHS_STREAM_INTERFACE 199 +#define RESET_PERIPHS_SDIO 200 +#define RESET_PERIPHS_UART_0 201 +#define RESET_PERIPHS_UART_1_2 202 +#define RESET_PERIPHS_ASYNC_0 203 +#define RESET_PERIPHS_ASYNC_1 204 +#define RESET_PERIPHS_SPI_0 205 +#define RESET_PERIPHS_SDHC 206 +#define RESET_UART_SLIP 207 +/* 208-223 */ +/* RESET7 */ +#define RESET_USB_DDR_0 224 +#define RESET_USB_DDR_1 225 +#define RESET_USB_DDR_2 226 +#define RESET_USB_DDR_3 227 +/* 228 */ +#define RESET_DEVICE_MMC_ARB 229 +/* 230 */ +#define RESET_VID_LOCK 231 +#define RESET_A9_DMC_PIPEL 232 +/* 233-255 */ + +#endif diff --git a/include/efi.h b/include/efi.h index 83de2d479e..5a3b8cf69a 100644 --- a/include/efi.h +++ b/include/efi.h @@ -159,6 +159,8 @@ struct efi_mem_desc { u64 attribute; }; +#define EFI_MEMORY_DESCRIPTOR_VERSION 1 + /* Allocation types for calls to boottime->allocate_pages*/ #define EFI_ALLOCATE_ANY_PAGES 0 #define EFI_ALLOCATE_MAX_ADDRESS 1 |