diff options
Diffstat (limited to 'include')
172 files changed, 10 insertions, 360 deletions
diff --git a/include/config_phylib_all_drivers.h b/include/config_phylib_all_drivers.h index 12828c67e3..496ef58db0 100644 --- a/include/config_phylib_all_drivers.h +++ b/include/config_phylib_all_drivers.h @@ -16,7 +16,6 @@ #define CONFIG_PHY_VITESSE #define CONFIG_PHY_MARVELL -#define CONFIG_PHY_MICREL #define CONFIG_PHY_BROADCOM #define CONFIG_PHY_DAVICOM #define CONFIG_PHY_REALTEK diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index d05cc613d0..892ceff5e6 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -30,7 +30,6 @@ * NET options */ #define CONFIG_SYS_RX_ETH_BUFFER 0 -#define CONFIG_PHY_GIGE #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN #define CONFIG_PHY_MARVELL diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 0d3794dd06..3869d9065c 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -33,7 +33,6 @@ * NET options */ #define CONFIG_SYS_RX_ETH_BUFFER 0 -#define CONFIG_PHY_GIGE #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN #define CONFIG_PHY_MARVELL diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 4ec65759b5..90296cdb3e 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -679,7 +679,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif #define CONFIG_SYS_FSL_B4860QDS_XFI_ERR diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index a7c97a3b79..57d4bed89a 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -258,8 +258,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index b0a3cf8e47..04a505398a 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -457,8 +457,6 @@ combinations. this should be removed later #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - /* TBI PHY configuration for SGMII mode */ #define CONFIG_TSEC_TBICR_SETTINGS ( \ TBICR_PHY_RESET \ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 050847b4aa..962bf4aa4c 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -394,8 +394,6 @@ #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_PHY_GIGE #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 221c35cf51..cb83d07494 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -419,7 +419,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #ifdef CONFIG_TSEC_ENET #define CONFIG_MII -#define CONFIG_PHY_GIGE /* In case CONFIG_CMD_MII is specified */ #define CONFIG_TSEC1 diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 38a2ca146c..6b9c25f0c9 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -546,8 +546,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b4f4c4e32b..12bcb02e5f 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -318,8 +318,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define TSEC3_PHYIDX 0 #define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b41543688b..c18bf6744d 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -432,7 +432,6 @@ extern unsigned long get_clock_freq(void); /* Options are: eTSEC[0-3] */ #define CONFIG_ETHPRIME "eTSEC0" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 906270222a..49c6e7fdee 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -519,8 +519,6 @@ #define TSEC4_PHYIDX 0 #define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 08288ccf35..2dee5ac01c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -629,8 +629,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - /* TBI PHY configuration for SGMII mode */ #define CONFIG_TSEC_TBICR_SETTINGS ( \ TBICR_PHY_RESET \ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index a1035d6794..0fab00f069 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -524,8 +524,6 @@ #define TSEC2_PHYIDX 0 #define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 75d1efd127..3cc5033954 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -317,7 +317,6 @@ extern unsigned long get_clock_freq(void); /* For FM */ #define CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 7c139bbcd1..ef7563d415 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -558,7 +558,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_TBIPA_VALUE 8 #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 163ec10cfb..767cd229a8 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -743,7 +743,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index cdd459e197..9c575a9b96 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -755,7 +755,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 0a848b6440..8bf32cd9f3 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -617,7 +617,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* Enable VSC9953 L2 Switch driver */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 13efcb9e36..49e88b23c8 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -753,7 +753,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 1e4a49e886..f6b8f0b4dc 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -672,7 +672,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ecce5163a1..6ab7a126cc 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -622,7 +622,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index e041ea0abd..885dc776eb 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -485,7 +485,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index f4f025a3be..4a2ed6a407 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -259,7 +259,6 @@ #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* @@ -667,7 +666,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 6fd3fa4712..56c1f2878d 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -479,10 +479,7 @@ #if defined(CONFIG_TSEC_ENET) -#if defined(CONFIG_UCP1020_REV_1_2) -#define CONFIG_PHY_MICREL_KSZ9021 -#elif defined(CONFIG_UCP1020_REV_1_3) -#define CONFIG_PHY_MICREL_KSZ9031 +#if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3) #else #error "UCP1020 module revision is not defined !!!" #endif @@ -507,8 +504,6 @@ #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #endif #define CONFIG_HOSTNAME UCP1020 diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 22a4e69be5..6d40eb4854 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -71,7 +71,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Serial Flash */ diff --git a/include/configs/alt.h b/include/configs/alt.h index a61814ef00..35518da625 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -51,8 +51,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 2a2e2ba0a9..fbab610d7a 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -357,8 +357,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 /* Network. */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC /* Enable Atheros phy driver */ #define CONFIG_PHY_ATHEROS diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 4721b42f9e..3d3d5e730b 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -111,7 +111,6 @@ #define CONFIG_CONS_INDEX 1 /* Ethernet support */ -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC /* NAND support */ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index f3b7767a97..121beef679 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -275,8 +275,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_NET_MULTI -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 75f9befcfd..13ff2b277a 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -100,8 +100,6 @@ #endif /* Network. */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #endif /* ! __CONFIG_AM335X_SL50_H */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 44691676da..4f3b605a96 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -242,11 +242,9 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_PHY_GIGE #endif #define CONFIG_DRIVER_TI_CPSW -#define CONFIG_PHYLIB #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ #define CONFIG_SYS_RX_ETH_BUFFER 64 diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 9976686bd8..9f07bba0c8 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -84,8 +84,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ -#define CONFIG_PHY_GIGE /* per-board part of CPSW */ -#define CONFIG_PHYLIB #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ #define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index adc7d1feba..cbf7782267 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -29,8 +29,6 @@ #define CONFIG_SH_ETHER_PHY_ADDR (0x0) #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL 1 #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 4a12ac8ca3..16af141a81 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -86,9 +86,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 4096 #define CONFIG_TFTP_TSIZE diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index 6ad956f03c..1c28fcf0a7 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -32,9 +32,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL - #define CONFIG_SPI_FLASH_MTD #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_SPEED 20000000 diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 30abafc0ae..9cd40a7616 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -20,7 +20,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_CS 1 diff --git a/include/configs/aristainetos2b.h b/include/configs/aristainetos2b.h index 7a47514515..a680e762d7 100644 --- a/include/configs/aristainetos2b.h +++ b/include/configs/aristainetos2b.h @@ -20,7 +20,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 643b26b488..3b8a250f87 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -101,7 +101,6 @@ #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 #define CONFIG_SH_ETHER_SH7734_MII (0x01) #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 07b53b1fcf..e1a30b7e71 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -55,7 +55,6 @@ * Ethernet PHY configuration */ #define CONFIG_MII -#define CONFIG_PHY_GIGE /* * USB 1.1 configuration diff --git a/include/configs/baltos.h b/include/configs/baltos.h index aba7208c5a..598352b3ce 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -302,8 +302,6 @@ #endif /* Network. */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC #define CONFIG_MII diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index fafab8ea97..6beb347a8b 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -521,8 +521,6 @@ DEFAULT_LINUX_BOOT_ENV \ #define CONFIG_SF_DEFAULT_SPEED 24000000 /* Network. */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC /* diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 8d0e0ea793..b8c531ec29 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -31,7 +31,6 @@ /* Network defines */ #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ -#define CONFIG_PHYLIB #define CONFIG_PHY_NATSEMI /* diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index b36cbb9679..4996a89520 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -109,7 +109,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Command definition */ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 82be3a1afb..581ab7cd50 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -206,7 +206,6 @@ #endif /* Network. */ -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #endif /* ! __CONFIG_CHILIBOARD_H */ diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h index 120ac02e06..4010354edf 100644 --- a/include/configs/cl-som-am57x.h +++ b/include/configs/cl-som-am57x.h @@ -100,9 +100,7 @@ #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY -#define CONFIG_PHY_GIGE #define CONFIG_PHY_ATHEROS -#define CONFIG_PHYLIB #define CONFIG_SYS_RX_ETH_BUFFER 64 #define PHY_ANEG_TIMEOUT 8000 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index e2c43b1f40..4f45be1bdb 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -192,7 +192,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_FEC_XCV_TYPE RGMII #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #define CONFIG_MII #define CONFIG_ETHPRIME "FEC0" diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index ed7bb1d21c..6bcc63ab0c 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -102,8 +102,6 @@ #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* Network. */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* NAND support */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 7a61107294..4c261f8e74 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -53,9 +53,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY #define CONFIG_NET_MULTI -#define CONFIG_PHY_GIGE #define CONFIG_PHY_ATHEROS -#define CONFIG_PHYLIB #define CONFIG_SYS_RX_ETH_BUFFER 64 /* USB support */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 5f7386737a..fca72f42b3 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -72,8 +72,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 16352 #define CONFIG_TFTP_TSIZE diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 4baa0383b8..30a2d1286b 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -32,8 +32,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 16352 #define CONFIG_TFTP_TSIZE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 15a06384f4..cc1f919f67 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -66,8 +66,6 @@ #define IMX_FEC_BASE ENET1_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 1ac416260e..08def6251a 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -282,8 +282,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - /* * USB */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 77a997b111..668dd060a7 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -571,7 +571,6 @@ #define CONFIG_SYS_TBIPA_VALUE 8 #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/corvus.h b/include/configs/corvus.h index e255a8b473..881960200b 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -84,7 +84,6 @@ /* Ethernet */ #define CONFIG_MACB -#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91_WANTS_COMMON_PHY diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index ddbaf327d8..cdabbac561 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -366,8 +366,6 @@ #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #endif #ifdef CONFIG_PCI @@ -397,7 +395,6 @@ #define CONFIG_SYS_TBIPA_VALUE 8 #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index f1a5c6c90a..6124867c6e 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -73,7 +73,6 @@ #define CONFIG_RMII #define CONFIG_PHY_SMSC #define CONFIG_LPC32XX_ETH -#define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 0x1F #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index b5091513f7..1a58c6ef24 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -112,8 +112,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ -#define CONFIG_PHY_GIGE /* per-board part of CPSW */ -#define CONFIG_PHYLIB #define CONFIG_PHY_TI /* SPI */ diff --git a/include/configs/draco.h b/include/configs/draco.h index ba6a43062a..2d8cf935ca 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -40,7 +40,6 @@ #define EEPROM_ADDR_CHIP 0x120 #undef CONFIG_MII -#undef CONFIG_PHY_GIGE #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 2471277c68..fe56c8f22e 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -53,7 +53,6 @@ #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) #define CONFIG_PHY_SMSC 1 -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 61f0c95d55..d1dec80f8f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -51,7 +51,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #ifdef CONFIG_CMD_SF diff --git a/include/configs/espt.h b/include/configs/espt.h index 07f327532b..b9538f35d8 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -91,7 +91,6 @@ #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x00) -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 1662dbf197..c9584ad71c 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -98,7 +98,6 @@ #define EEPROM_ADDR_CHIP 0x120 #undef CONFIG_MII -#undef CONFIG_PHY_GIGE #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 584a2b4fb0..5e5d04474b 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -77,8 +77,6 @@ */ #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_MII diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 5e04dd24f4..cc2b78677c 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -94,7 +94,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #endif diff --git a/include/configs/gose.h b/include/configs/gose.h index 067e86d41c..610ba1a7ac 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -50,8 +50,6 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index f56618af86..c1e9f5d042 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -30,7 +30,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 7a201b0361..6341609858 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -84,7 +84,6 @@ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 #define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE -#define CONFIG_PHY_MICREL #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 3c66f8a170..be4a2d0191 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -346,9 +346,7 @@ int get_scl(void); /* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */ #define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_PHYLIB /* recommended PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC5" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ /* * Environment diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 988b747cbc..b9214d2f34 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -50,8 +50,6 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index 73ea9ac828..291b03c50b 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -51,8 +51,6 @@ #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 76ee91042d..2cad644640 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -153,7 +153,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #endif diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 58f893f4fd..56a0754e13 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -199,8 +199,6 @@ #define CONFIG_ETHPRIME "eTSEC2" -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #define CONFIG_HAS_ETH0 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index bd05b45f70..56f8c0305a 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -456,8 +456,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_REALTEK #define CONFIG_HAS_ETH0 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 98e902e0c6..af499238b4 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -335,8 +335,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #define CONFIG_HAS_ETH0 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 2d58b3b268..af58e614f5 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -50,7 +50,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET -#define CONFIG_PHYLIB #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK #define CONFIG_PHYLIB_10G diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 937fd930ee..a4162a61b9 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -249,8 +249,6 @@ #define AQR105_IRQ_MASK 0x40000000 #ifdef CONFIG_NET -#define CONFIG_PHYLIB -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 9dc74b4f09..ef2f47c261 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -70,7 +70,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET -#define CONFIG_PHYLIB #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK #define CONFIG_PHYLIB_10G diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 3d3dfb1f8f..b9f27bbe51 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -180,8 +180,6 @@ #ifndef SPL_NO_FMAN #ifdef CONFIG_NET -#define CONFIG_PHYLIB -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #define CONFIG_PHY_REALTEK #endif diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 6b943cdb32..1801eca53f 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -406,7 +406,6 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) #define CONFIG_FSL_MEMAC -#define CONFIG_PHYLIB #define CONFIG_PHYLIB_10G #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK @@ -435,7 +434,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "DPMAC1@xgmii" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index b86726fc0e..de67e1d16e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -468,7 +468,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PHYLIB_10G #define CONFIG_PHY_AQUANTIA #define CONFIG_PHY_CORTINA -#define CONFIG_PHYLIB #define CONFIG_SYS_CORTINA_FW_IN_NOR #ifdef CONFIG_QSPI_BOOT #define CONFIG_CORTINA_FW_ADDR 0x20980000 @@ -489,7 +488,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MII #define CONFIG_ETHPRIME "DPMAC1@xgmii" -#define CONFIG_PHY_GIGE #define CONFIG_PHY_AQUANTIA #endif diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 138525b3dd..2f7efc7511 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -116,8 +116,6 @@ #define CONFIG_MII #define CONFIG_DISCOVER_PHY #define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_ETHPRIME "FEC0" #endif diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index a4c103503f..7ea983991a 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -108,9 +108,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index aa007e2819..4f77b8eb9e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -238,15 +238,12 @@ #if defined(CONFIG_XILINX_AXIEMAC) # define CONFIG_MII 1 -# define CONFIG_PHY_GIGE 1 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 # define CONFIG_PHY_ATHEROS 1 # define CONFIG_PHY_BROADCOM 1 # define CONFIG_PHY_DAVICOM 1 # define CONFIG_PHY_LXT 1 # define CONFIG_PHY_MARVELL 1 -# define CONFIG_PHY_MICREL 1 -# define CONFIG_PHY_MICREL_KSZ9021 # define CONFIG_PHY_NATSEMI 1 # define CONFIG_PHY_REALTEK 1 # define CONFIG_PHY_VITESSE 1 diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 1307d215ed..71975ed542 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -88,7 +88,6 @@ */ #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ -#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 #define CONFIG_PHY_MARVELL diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 86ae19c9fb..d93a15f691 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -93,7 +93,6 @@ * Ethernet Driver configuration */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ -#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 32e898e05c..5930f591cb 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -37,7 +37,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Framebuffer */ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index b3638d5cae..b849eea489 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -28,7 +28,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #ifdef CONFIG_CMD_SF diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 98797b07c1..cd9f0b04c2 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -39,7 +39,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 060ebd77e1..e377c0ffa9 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -141,7 +141,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #ifdef CONFIG_CMD_USB diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 319fed4ebc..2c0a799c7c 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -163,7 +163,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #ifdef CONFIG_CMD_USB diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index c9b7e7b473..47379ca188 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -206,9 +206,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #endif #define CONFIG_ETHPRIME "FEC" - -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #endif #define CONFIG_IMX_THERMAL diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index d4dd0b330d..fec7e81e74 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -26,7 +26,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB #define CONFIG_PHY_BROADCOM /* ENET1 */ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index a1a0cdaf2e..bc17b516e4 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -65,9 +65,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 /* USB Configs */ #define CONFIG_USB_HOST_ETHER diff --git a/include/configs/novena.h b/include/configs/novena.h index 2bba741ac3..c3005e7a15 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -72,9 +72,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x7 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #define CONFIG_ARP_TIMEOUT 200UL #endif diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 2342f7452f..896c32996c 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -70,7 +70,6 @@ #define CONFIG_NET_MULTI #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -#define CONFIG_PHY_GIGE #define CONFIG_RESET_PHY_R #endif /* CONFIG_CMD_NET */ diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index 373c2d5ca2..8ca6f62850 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -82,7 +82,6 @@ #define CONFIG_FEC_XCV_TYPE MII100 #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x5 -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #ifndef CONFIG_SPL diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6eae41c7e5..5c8277908f 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -714,8 +714,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index d5f5769463..df0b6082ec 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -295,8 +295,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #undef CONFIG_HAS_ETH2 diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index ce80e7ecbc..112f9b8285 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -140,8 +140,6 @@ #define CONFIG_USB_ETH_RNDIS #endif /* CONFIG_USB_MUSB_GADGET */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #endif /* ! __CONFIG_PCM051_H */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 71c5078cc7..b4b60ac865 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -61,8 +61,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL /* QSPI Configs*/ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index e3a84ed061..2c1221d085 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -43,10 +43,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 3 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_KSZ9031 - /* SPI Flash */ #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index dbe0ddd785..a76bbce9ff 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -191,7 +191,6 @@ #define CONFIG_NET_MULTI /* Network */ -#define CONFIG_PHYLIB #define CONFIG_PHY_RESET 1 #define CONFIG_PHY_NATSEMI #define CONFIG_PHY_REALTEK diff --git a/include/configs/pepper.h b/include/configs/pepper.h index ff3cd74ac3..1a6981a52e 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -77,11 +77,7 @@ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Ethernet support */ -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 0 -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #define CONFIG_PHY_RESET_DELAY 1000 /* SPL */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 7b44752e55..5cb507f0c0 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -21,8 +21,6 @@ #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index e623f48fa2..793ba78c7b 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -25,7 +25,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* ENET1 */ diff --git a/include/configs/platinum.h b/include/configs/platinum.h index 1cdab00e3b..4801cb22ba 100644 --- a/include/configs/platinum.h +++ b/include/configs/platinum.h @@ -40,8 +40,6 @@ #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_PHYLIB - /* USB config */ #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/platinum_titanium.h b/include/configs/platinum_titanium.h index ccb6441871..69406a4b65 100644 --- a/include/configs/platinum_titanium.h +++ b/include/configs/platinum_titanium.h @@ -20,8 +20,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #define CONFIG_PHY_RESET_DELAY 1000 #define CONFIG_HOSTNAME titanium diff --git a/include/configs/porter.h b/include/configs/porter.h index fa1fff9829..451d9dd66f 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -52,8 +52,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index d79aa21c9e..2b04521240 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x0) -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC 1 #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 0820f6fc7a..721f94c5c9 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -44,7 +44,6 @@ #define EEPROM_ADDR_CHIP 0x120 #undef CONFIG_MII -#undef CONFIG_PHY_GIGE #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index c8877718b4..381082c984 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -93,8 +93,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #endif #if 0 /* Disable until the FLASH will be implemented */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index f8bfe96781..5bf5731029 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -26,7 +26,6 @@ /* Ethernet RAVB */ #define CONFIG_NET_MULTI -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 83b527c0de..d10dc3e2cb 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -85,8 +85,6 @@ #define CONFIG_PMECC_CAP 4 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PHY_MICREL_KSZ9021 - /* USB */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index cf9809df49..abac950db4 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -479,7 +479,6 @@ /* Options are: eTSEC[0-3] */ #define CONFIG_ETHPRIME "eTSEC0" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index f7aeb640f6..efed670edc 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -33,7 +33,6 @@ /* FEC Ethernet on SoC */ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #endif diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h index c90626fa23..c3a4961b0d 100644 --- a/include/configs/secomx6quq7.h +++ b/include/configs/secomx6quq7.h @@ -33,8 +33,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 39e8244b25..dd3a5fb9df 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -60,7 +60,6 @@ #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 #define CONFIG_SH_ETHER_USE_GETHER 1 -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 24ec0768af..c53cd175fb 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -60,7 +60,6 @@ #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 #define CONFIG_SH_ETHER_USE_GETHER 1 -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index e5084adfcc..8ec4cd4430 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -60,7 +60,6 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 1 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 74bd9fc29a..3876e071e2 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -91,7 +91,6 @@ #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5a5bf7ac5a..22215fefc0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -222,8 +222,6 @@ #define CONFIG_DRIVER_TI_CPSW #define CONFIG_MII -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 diff --git a/include/configs/silk.h b/include/configs/silk.h index 238783b4c4..0384325cb5 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -52,8 +52,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index cc83b98348..a80d2902b4 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -117,7 +117,6 @@ * */ #define CONFIG_MACB -#define CONFIG_PHYLIB #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_MCS7830 diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 13977cb9a6..91a681ac33 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -52,7 +52,6 @@ /* Ethernet */ #define CONFIG_MACB -#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 55850bd1b3..b30b44d123 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -25,10 +25,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 -#endif /* * U-Boot environment configurations diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 9f83858bd1..6b6d54b97b 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2c23ae5073..175b01ef84 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -97,7 +97,6 @@ #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_MII #define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ) -#define CONFIG_PHY_GIGE #endif /* diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 86b4a9dfb8..018a0c3bb4 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 6516c45acf..275ed7ffeb 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h index 04be2b1689..bb50fcf1ff 100644 --- a/include/configs/socfpga_de10_nano.h +++ b/include/configs/socfpga_de10_nano.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h index 9405083b3e..05975c9bde 100644 --- a/include/configs/socfpga_de1_soc.h +++ b/include/configs/socfpga_de1_soc.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index febb8f7fcc..6d12aedc1d 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -25,8 +25,6 @@ #define CONFIG_ARP_TIMEOUT 500UL /* PHY */ -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #endif /* The rest of the configuration is shared */ diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 57de60ecfa..b4f31c42c5 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index 6b6cb6aa14..ebb9ac588d 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index a86043f339..b54097cde7 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -41,8 +41,6 @@ #if defined(CONFIG_CMD_NET) #define CONFIG_BOOTP_SEND_HOSTNAME /* PHY */ -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #endif /* Extra Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 406a985b60..5b8fa3a08c 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -247,7 +247,6 @@ /* Options are: TSEC[0,1] */ #define CONFIG_ETHPRIME "TSEC0" -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 83060e71a6..49fdf9cdb7 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -17,7 +17,6 @@ /* Ethernet driver configuration */ #define CONFIG_MII #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ /* USBD driver configuration */ #if defined(CONFIG_SPEAR_USBTTY) diff --git a/include/configs/stout.h b/include/configs/stout.h index 3b8806d065..9422c042f3 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -55,8 +55,6 @@ #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 0ac262e095..3b5831d46e 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -49,7 +49,6 @@ #define CONFIG_MII #define CONFIG_DW_ALTDESCRIPTOR -#define CONFIG_PHY_MICREL /* Command support defines */ #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 681c91cf46..07c7ffd7f2 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -296,11 +296,9 @@ extern int soft_i2c_gpio_scl; #ifdef CONFIG_SUNXI_EMAC #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ -#define CONFIG_PHYLIB #endif #ifdef CONFIG_SUNXI_GMAC -#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_REALTEK diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 6d8c78f76b..99c0602503 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -228,7 +228,6 @@ #ifdef CONFIG_FMAN_ENET #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif /* diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 7e1c58fdd3..5a7ef75ae9 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -87,7 +87,6 @@ /* Ethernet */ #define CONFIG_MACB -#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_AT91_WANTS_COMMON_PHY diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 67b5774a09..546f2d3a4b 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -32,11 +32,6 @@ #define CONFIG_SYS_NS16550_CLK 166666666 /* - * Ethernet PHY configuration - */ -#define CONFIG_PHY_GIGE - -/* * Even though the board houses Realtek RTL8211E PHY * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly. * In particular "parse_status" reports link is down. diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 4baccdc1e9..5271b5cf44 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -59,7 +59,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Framebuffer */ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index cea84acd03..23f4dbfe46 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -37,7 +37,6 @@ #define EEPROM_ADDR_CHIP 0x120 #undef CONFIG_MII -#undef CONFIG_PHY_GIGE #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index b5f817749c..4d9ec790fd 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -178,8 +178,6 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 26290ef1b2..03e28fc39b 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -97,7 +97,6 @@ #endif /* Network Configuration */ -#define CONFIG_PHYLIB #define CONFIG_PHY_MARVELL #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT diff --git a/include/configs/titanium.h b/include/configs/titanium.h index 606da4a854..3fb63f3014 100644 --- a/include/configs/titanium.h +++ b/include/configs/titanium.h @@ -45,9 +45,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index a03ad67af0..b670cc409a 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -65,6 +65,5 @@ #define CONFIG_CMD_MEMTEST #define CONFIG_CMD_MII -#define CONFIG_PHY_GIGE #endif /* __CONFIG_H */ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index b5b71570d1..8cc0018943 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -81,7 +81,6 @@ #define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_PHYLIB #define CONFIG_MII #define CONFIG_ARP_TIMEOUT 200UL diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index 69e9079339..9c7e5a4878 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -14,8 +14,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x03 -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_KSZ9031 #define CONFIG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index 959db5fdb2..0219376f10 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -61,7 +61,6 @@ * Eth Configs */ #define CONFIG_MII -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_FEC_MXC diff --git a/include/configs/udoo.h b/include/configs/udoo.h index d3fa5d71c1..26a1a6f9b3 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -41,9 +41,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 60b76edd1f..9b0a20d3ad 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -112,7 +112,4 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC0" -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL - #endif /* __CONFIG_H */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 04abe1e355..6aaa4d1a28 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -59,8 +59,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL /* QSPI Configs*/ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 0fed7f37ca..77da9e5e85 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -72,7 +72,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #ifdef CONFIG_CMD_USB diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index a8a48a597f..ed25f420d0 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -60,7 +60,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Framebuffer */ diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index dc8008c135..f3eba9c66d 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -88,8 +88,6 @@ */ #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_MII diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 0ac7b85f4b..f7a3df103d 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -57,7 +57,6 @@ #define CONFIG_PHY_SMSC #define CONFIG_LPC32XX_ETH -#define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 0 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ diff --git a/include/configs/x600.h b/include/configs/x600.h index a8435d8b01..18167a8a3c 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -74,9 +74,6 @@ #define CONFIG_MII #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ #define CONFIG_PHY_ADDR 0 /* PHY address */ -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9031 #define CONFIG_SPEAR_GPIO diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 363c2924f0..77d7899def 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -151,7 +151,6 @@ # define CONFIG_PHY_MARVELL # define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI -# define CONFIG_PHY_GIGE # define CONFIG_PHY_VITESSE # define CONFIG_PHY_REALTEK # define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index c21c944b29..478ca50a89 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -304,7 +304,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1" diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index eb801542eb..f54971ee28 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -245,7 +245,6 @@ * Networking options */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1" diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index bc423136ba..c32b63d171 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -304,7 +304,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 13be539db3..7b0a0c6793 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -290,7 +290,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 629e3df641..fdb504d9d9 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -75,7 +75,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_IMX_THERMAL diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h index 61c6a60b54..f71cdfbdd3 100644 --- a/include/configs/zc5601.h +++ b/include/configs/zc5601.h @@ -25,7 +25,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x10 -#define CONFIG_PHYLIB #define CONFIG_FEC_FIXED_SPEED 1000 /* No autoneg, fix Gb */ #endif /*__EL6Q_CONFIG_H */ diff --git a/include/net.h b/include/net.h index 2eaa88224c..e1269486ad 100644 --- a/include/net.h +++ b/include/net.h @@ -308,7 +308,7 @@ struct ethernet_hdr { u8 et_dest[ARP_HLEN]; /* Destination node */ u8 et_src[ARP_HLEN]; /* Source node */ u16 et_protlen; /* Protocol or length */ -}; +} __attribute__((packed)); /* Ethernet header size */ #define ETHER_HDR_SIZE (sizeof(struct ethernet_hdr)) @@ -326,7 +326,7 @@ struct e802_hdr { u8 et_snap2; u8 et_snap3; u16 et_prot; /* 802 protocol */ -}; +} __attribute__((packed)); /* 802 + SNAP + ethernet header size */ #define E802_HDR_SIZE (sizeof(struct e802_hdr)) @@ -340,7 +340,7 @@ struct vlan_ethernet_hdr { u16 vet_vlan_type; /* PROT_VLAN */ u16 vet_tag; /* TAG of VLAN */ u16 vet_type; /* protocol type */ -}; +} __attribute__((packed)); /* VLAN Ethernet header size */ #define VLAN_ETHER_HDR_SIZE (sizeof(struct vlan_ethernet_hdr)) @@ -369,7 +369,7 @@ struct ip_hdr { u16 ip_sum; /* checksum */ struct in_addr ip_src; /* Source IP address */ struct in_addr ip_dst; /* Destination IP address */ -}; +} __attribute__((packed)); #define IP_OFFS 0x1fff /* ip offset *= 8 */ #define IP_FLAGS 0xe000 /* first 3 bits */ @@ -397,7 +397,7 @@ struct ip_udp_hdr { u16 udp_dst; /* UDP destination port */ u16 udp_len; /* Length of UDP packet */ u16 udp_xsum; /* Checksum */ -}; +} __attribute__((packed)); #define IP_UDP_HDR_SIZE (sizeof(struct ip_udp_hdr)) #define UDP_HDR_SIZE (IP_UDP_HDR_SIZE - IP_HDR_SIZE) @@ -435,7 +435,7 @@ struct arp_hdr { u8 ar_tha[]; /* Target hardware address */ u8 ar_tpa[]; /* Target protocol address */ #endif /* 0 */ -}; +} __attribute__((packed)); #define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */ @@ -470,7 +470,7 @@ struct icmp_hdr { } frag; u8 data[0]; } un; -}; +} __attribute__((packed)); #define ICMP_HDR_SIZE (sizeof(struct icmp_hdr)) #define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE) diff --git a/include/phy.h b/include/phy.h index 4f2094bdf0..a0b1f12317 100644 --- a/include/phy.h +++ b/include/phy.h @@ -266,7 +266,8 @@ int phy_davicom_init(void); int phy_et1011c_init(void); int phy_lxt_init(void); int phy_marvell_init(void); -int phy_micrel_init(void); +int phy_micrel_ksz8xxx_init(void); +int phy_micrel_ksz90x1_init(void); int phy_natsemi_init(void); int phy_realtek_init(void); int phy_smsc_init(void); diff --git a/include/sed156x.h b/include/sed156x.h deleted file mode 100644 index 4e24e01d4b..0000000000 --- a/include/sed156x.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2004 - * - * Pantelis Antoniou <panto@intracom.gr> - * Intracom S.A. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* Video support for Epson SED156x chipset(s) */ - -#ifndef SED156X_H -#define SED156X_H - -void sed156x_init(void); -void sed156x_clear(void); -void sed156x_output_at(int x, int y, const char *str, int size); -void sed156x_reverse_at(int x, int y, int size); -void sed156x_sync(void); -void sed156x_scroll(int dx, int dy); - -/* export display */ -extern const int sed156x_text_width; -extern const int sed156x_text_height; - -#endif /* SED156X_H */ diff --git a/include/sm501.h b/include/sm501.h deleted file mode 100644 index 34ce350e6a..0000000000 --- a/include/sm501.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2002 - * Stäubli Faverges - <www.staubli.com> - * Pierre AUBERT p.aubert@staubli.com - * - * (C) Copyright 2005 - * Martin Krause TQ-Systems GmbH martin.krause@tqs.de - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Basic video support for SMI SM501 "Voyager" graphic controller - */ - -#ifndef _SM501_H_ -#define _SM501_H_ - -#define PCI_VENDOR_SM 0x126f -#define PCI_DEVICE_SM501 0x0501 - -typedef struct { - unsigned int Index; - unsigned int Value; -} SMI_REGS; - -/* Board specific functions */ -unsigned int board_video_init (void); -void board_validate_screen (unsigned int base); -const SMI_REGS *board_get_regs (void); -int board_get_width (void); -int board_get_height (void); -unsigned int board_video_get_fb (void); - -#endif /* _SM501_H_ */ |