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-rw-r--r--include/configs/MPC8569MDS.h7
-rw-r--r--include/configs/P1022DS.h1
-rw-r--r--include/configs/corenet_ds.h23
3 files changed, 22 insertions, 9 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 8ffd4583b5..95c0a9ffc4 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Freescale Semiconductor, Inc.
+ * Copyright (C) 2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -74,6 +74,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_HWCONFIG
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
@@ -505,8 +506,8 @@ extern unsigned long get_clock_freq(void);
#else
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* 256K(one sector) for env */
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
+#define CONFIG_ENV_SIZE 0x2000
#endif
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 2306e7f90c..da826fc26f 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -134,6 +134,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
+#define CONFIG_HWCONFIG
#define CONFIG_FSL_NGPIXIS
#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index d223a4d73b..9184eeb56d 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -399,6 +399,14 @@
#endif
#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
+/* controller 4, Base address 203000 */
+#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull
+#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
+#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
+
/* Qman/Bman */
#define CONFIG_SYS_BMAN_NUM_PORTALS 10
#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000
@@ -607,14 +615,17 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
+ "bank_intlv=cs0_cs1\0" \
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
- "tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "ubootaddr=" MK_STR(TEXT_BASE) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot && " \
+ "protect off $ubootaddr +$filesize && " \
+ "erase $ubootaddr +$filesize && " \
+ "cp.b $loadaddr $ubootaddr $filesize && " \
+ "protect on $ubootaddr +$filesize && " \
+ "cmp.b $loadaddr $ubootaddr $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=p4080ds/ramdisk.uboot\0" \