summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/configs/tegra-common-post.h2
-rw-r--r--include/configs/tegra114-common.h7
-rw-r--r--include/configs/tegra124-common.h7
-rw-r--r--include/configs/tegra20-common.h7
-rw-r--r--include/configs/tegra30-common.h7
5 files changed, 10 insertions, 20 deletions
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h
index 46a155d4b8..0cea795de1 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -50,6 +50,8 @@
#define BOARD_EXTRA_ENV_SETTINGS
#endif
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
#define CONFIG_EXTRA_ENV_SETTINGS \
TEGRA_DEVICE_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 9eba5d517d..252e607d73 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -26,13 +26,9 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/* Environment information, boards can override if required */
-#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */
#define CONFIG_STACKBASE 0x82800000 /* 40MB */
/*-----------------------------------------------------------------------
@@ -64,10 +60,11 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
+#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=0x81000000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index f2b3774da8..1aee5c89f4 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -18,13 +18,9 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/* Environment information, boards can override if required */
-#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */
#define CONFIG_STACKBASE 0x82800000 /* 40MB */
/*-----------------------------------------------------------------------
@@ -56,10 +52,11 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
+#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=0x81000000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 6330281df7..0841f33bfc 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -24,13 +24,9 @@
*/
#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
-/* Environment information, boards can override if required */
-#define CONFIG_LOADADDR 0x00408000 /* def. location for kernel */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00A00800 /* default */
#define CONFIG_STACKBASE 0x02800000 /* 40MB */
/*-----------------------------------------------------------------------
@@ -62,10 +58,11 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
+#define CONFIG_LOADADDR 0x01000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x10000000\0" \
"pxefile_addr_r=0x10100000\0" \
- "kernel_addr_r=0x01000000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"fdt_addr_r=0x02000000\0" \
"ramdisk_addr_r=0x02100000\0"
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index bfdbeb70d2..3e8e3c1e5b 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -23,13 +23,9 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/* Environment information, boards can override if required */
-#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
-
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */
#define CONFIG_STACKBASE 0x82800000 /* 40MB */
/*-----------------------------------------------------------------------
@@ -61,10 +57,11 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
+#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=0x81000000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"