diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/altera.h | 8 | ||||
-rw-r--r-- | include/configs/bmips_common.h | 6 | ||||
-rw-r--r-- | include/configs/ci20.h | 72 | ||||
-rw-r--r-- | include/configs/vcoreiii.h | 82 | ||||
-rw-r--r-- | include/cpu.h | 3 | ||||
-rw-r--r-- | include/dt-bindings/clock/bcm6318-clock.h | 11 | ||||
-rw-r--r-- | include/dt-bindings/clock/jz4780-cgu.h | 89 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6318-dma.h | 14 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm63268-dma.h | 14 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6328-dma.h | 14 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6338-dma.h | 14 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6348-dma.h | 16 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6358-dma.h | 16 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6362-dma.h | 14 | ||||
-rw-r--r-- | include/dt-bindings/dma/bcm6368-dma.h | 14 |
15 files changed, 386 insertions, 1 deletions
diff --git a/include/altera.h b/include/altera.h index ead5d3d810..22d55cfd73 100644 --- a/include/altera.h +++ b/include/altera.h @@ -39,6 +39,8 @@ enum altera_iface { fast_passive_parallel, /* fast passive parallel with security (FPPS) */ fast_passive_parallel_security, + /* secure device manager (SDM) mailbox */ + secure_device_manager_mailbox, /* insert all new types before this */ max_altera_iface_type, }; @@ -54,6 +56,8 @@ enum altera_family { Altera_StratixII, /* StratixV Family */ Altera_StratixV, + /* Stratix10 Family */ + Intel_FPGA_Stratix10, /* SoCFPGA Family */ Altera_SoCFPGA, @@ -116,4 +120,8 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); #endif +#ifdef CONFIG_FPGA_STRATIX10 +int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); +#endif + #endif /* _ALTERA_H_ */ diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 39ca2e0bf3..788f4af70d 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -6,6 +6,10 @@ #ifndef __CONFIG_BMIPS_COMMON_H #define __CONFIG_BMIPS_COMMON_H +/* ETH */ +#define CONFIG_PHY_RESET_DELAY 20 +#define CONFIG_SYS_RX_ETH_BUFFER 6 + /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } @@ -16,7 +20,7 @@ /* Memory usage */ #define CONFIG_SYS_MAXARGS 24 -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/ci20.h b/include/configs/ci20.h new file mode 100644 index 0000000000..9a3621329d --- /dev/null +++ b/include/configs/ci20.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * CI20 configuration + * + * Copyright (c) 2013 Imagination Technologies + * Author: Paul Burton <paul.burton@imgtec.com> + */ + +#ifndef __CONFIG_CI20_H__ +#define __CONFIG_CI20_H__ + +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* Ingenic JZ4780 clock configuration. */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MHZ 1200 +#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) + +/* Memory configuration */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CONFIG_SYS_LOAD_ADDR 0x81000000 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x88000000 + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +/* NS16550-ish UARTs */ +#define CONFIG_SYS_NS16550_CLK 48000000 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* Ethernet: davicom DM9000 */ +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DM9000_BASE 0xb6000000 +#define DM9000_IO CONFIG_DM9000_BASE +#define DM9000_DATA (CONFIG_DM9000_BASE + 2) + +/* Environment */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE (32 << 10) +#define CONFIG_ENV_OFFSET ((14 + 512) << 10) +#define CONFIG_ENV_OVERWRITE + +/* Command line configuration. */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot argument buffer size */ +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ + +/* Miscellaneous configuration options */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) + +/* SPL */ +#define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ + +#define CONFIG_SPL_TEXT_BASE 0xf4000a00 +#define CONFIG_SPL_MAX_SIZE ((14 * 1024) - 0xa00) + +#define CONFIG_SPL_BSS_START_ADDR 0xf4004000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 512KB, arbitrary */ + +#define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" + +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */ + +#endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h new file mode 100644 index 0000000000..df89cdaebf --- /dev/null +++ b/include/configs/vcoreiii.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#ifndef __VCOREIII_H +#define __VCOREIII_H + +#include <linux/sizes.h> + +/* Onboard devices */ + +#define CONFIG_SYS_MALLOC_LEN 0x100000 +#define CONFIG_SYS_LOAD_ADDR 0x00100000 +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */ +#ifdef CONFIG_SOC_LUTON +#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333 +#else +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) +#endif +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ + +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET) +#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_SIZE (256 * 1024) +#define CONFIG_ENV_SECT_SIZE (256 * 1024) + +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) + +#define CONFIG_ENV_SPI_MAX_HZ 0 /* This force to read from DT */ +#define CONFIG_ENV_SPI_MODE 0 /* This force to read from DT */ +#endif + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) +#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT) +#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M) +#elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16) +#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M) +#else +#error Unknown DDR size - please add! +#endif + +#define CONFIG_CONS_INDEX 1 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M) + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_BOARD_EARLY_INIT_R +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) +#define VCOREIII_DEFAULT_MTD_ENV \ + "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ + "mtdids="CONFIG_MTDIDS_DEFAULT"\0" +#else +#define VCOREIII_DEFAULT_MTD_ENV /* Go away */ +#endif + +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + VCOREIII_DEFAULT_MTD_ENV \ + "loadaddr=0x81000000\0" \ + "spi_image_off=0x00100000\0" \ + "console=ttyS0,115200\0" \ + "setup=setenv bootargs console=${console} ${mtdparts}" \ + "${bootargs_extra}\0" \ + "spiboot=run setup; sf probe; sf read ${loadaddr}" \ + "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \ + "ubootfile=u-boot.bin\0" \ + "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \ + "sf erase UBoot 0x100000;" \ + "sf write ${loadaddr} UBoot ${filesize}\0" \ + "bootcmd=run spiboot\0" \ + "" +#endif /* __VCOREIII_H */ diff --git a/include/cpu.h b/include/cpu.h index 367c5f46a0..28dd48feb8 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -14,6 +14,8 @@ * @device_id: Driver-defined device identifier * @family: DMTF CPU Family identifier * @id: DMTF CPU Processor identifier + * @timebase_freq: the current frequency at which the cpu timer timebase + * registers are updated (in Hz) * * This can be accessed with dev_get_parent_platdata() for any UCLASS_CPU * device. @@ -24,6 +26,7 @@ struct cpu_platdata { ulong device_id; u16 family; u32 id[2]; + u32 timebase_freq; }; /* CPU features - mostly just a placeholder for now */ diff --git a/include/dt-bindings/clock/bcm6318-clock.h b/include/dt-bindings/clock/bcm6318-clock.h index d5e13c5c2d..3f10448cef 100644 --- a/include/dt-bindings/clock/bcm6318-clock.h +++ b/include/dt-bindings/clock/bcm6318-clock.h @@ -33,4 +33,15 @@ #define BCM6318_CLK_AFE 29 #define BCM6318_CLK_QPROC 30 +#define BCM6318_UCLK_ADSL 0 +#define BCM6318_UCLK_ARB 1 +#define BCM6318_UCLK_MIPS 2 +#define BCM6318_UCLK_PCIE 3 +#define BCM6318_UCLK_PERIPH 4 +#define BCM6318_UCLK_PHYMIPS 5 +#define BCM6318_UCLK_ROBOSW 6 +#define BCM6318_UCLK_SAR 7 +#define BCM6318_UCLK_SDR 8 +#define BCM6318_UCLK_USB 9 + #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */ diff --git a/include/dt-bindings/clock/jz4780-cgu.h b/include/dt-bindings/clock/jz4780-cgu.h new file mode 100644 index 0000000000..73214c52c0 --- /dev/null +++ b/include/dt-bindings/clock/jz4780-cgu.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides clock numbers for the ingenic,jz4780-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the jz4780 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ + +#define JZ4780_CLK_EXCLK 0 +#define JZ4780_CLK_RTCLK 1 +#define JZ4780_CLK_APLL 2 +#define JZ4780_CLK_MPLL 3 +#define JZ4780_CLK_EPLL 4 +#define JZ4780_CLK_VPLL 5 +#define JZ4780_CLK_OTGPHY 6 +#define JZ4780_CLK_SCLKA 7 +#define JZ4780_CLK_CPUMUX 8 +#define JZ4780_CLK_CPU 9 +#define JZ4780_CLK_L2CACHE 10 +#define JZ4780_CLK_AHB0 11 +#define JZ4780_CLK_AHB2PMUX 12 +#define JZ4780_CLK_AHB2 13 +#define JZ4780_CLK_PCLK 14 +#define JZ4780_CLK_DDR 15 +#define JZ4780_CLK_VPU 16 +#define JZ4780_CLK_I2SPLL 17 +#define JZ4780_CLK_I2S 18 +#define JZ4780_CLK_LCD0PIXCLK 19 +#define JZ4780_CLK_LCD1PIXCLK 20 +#define JZ4780_CLK_MSCMUX 21 +#define JZ4780_CLK_MSC0 22 +#define JZ4780_CLK_MSC1 23 +#define JZ4780_CLK_MSC2 24 +#define JZ4780_CLK_UHC 25 +#define JZ4780_CLK_SSIPLL 26 +#define JZ4780_CLK_SSI 27 +#define JZ4780_CLK_CIMMCLK 28 +#define JZ4780_CLK_PCMPLL 29 +#define JZ4780_CLK_PCM 30 +#define JZ4780_CLK_GPU 31 +#define JZ4780_CLK_HDMI 32 +#define JZ4780_CLK_BCH 33 +#define JZ4780_CLK_NEMC 34 +#define JZ4780_CLK_OTG0 35 +#define JZ4780_CLK_SSI0 36 +#define JZ4780_CLK_SMB0 37 +#define JZ4780_CLK_SMB1 38 +#define JZ4780_CLK_SCC 39 +#define JZ4780_CLK_AIC 40 +#define JZ4780_CLK_TSSI0 41 +#define JZ4780_CLK_OWI 42 +#define JZ4780_CLK_KBC 43 +#define JZ4780_CLK_SADC 44 +#define JZ4780_CLK_UART0 45 +#define JZ4780_CLK_UART1 46 +#define JZ4780_CLK_UART2 47 +#define JZ4780_CLK_UART3 48 +#define JZ4780_CLK_SSI1 49 +#define JZ4780_CLK_SSI2 50 +#define JZ4780_CLK_PDMA 51 +#define JZ4780_CLK_GPS 52 +#define JZ4780_CLK_MAC 53 +#define JZ4780_CLK_SMB2 54 +#define JZ4780_CLK_CIM 55 +#define JZ4780_CLK_LCD 56 +#define JZ4780_CLK_TVE 57 +#define JZ4780_CLK_IPU 58 +#define JZ4780_CLK_DDR0 59 +#define JZ4780_CLK_DDR1 60 +#define JZ4780_CLK_SMB3 61 +#define JZ4780_CLK_TSSI1 62 +#define JZ4780_CLK_COMPRESS 63 +#define JZ4780_CLK_AIC1 64 +#define JZ4780_CLK_GPVLC 65 +#define JZ4780_CLK_OTG1 66 +#define JZ4780_CLK_UART4 67 +#define JZ4780_CLK_AHBMON 68 +#define JZ4780_CLK_SMB4 69 +#define JZ4780_CLK_DES 70 +#define JZ4780_CLK_X2D 71 +#define JZ4780_CLK_CORE1 72 + +#endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */ diff --git a/include/dt-bindings/dma/bcm6318-dma.h b/include/dt-bindings/dma/bcm6318-dma.h new file mode 100644 index 0000000000..ad7c5ac2df --- /dev/null +++ b/include/dt-bindings/dma/bcm6318-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6318_H +#define __DT_BINDINGS_DMA_BCM6318_H + +#define BCM6318_DMA_ENETSW_RX 0 +#define BCM6318_DMA_ENETSW_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM6318_H */ diff --git a/include/dt-bindings/dma/bcm63268-dma.h b/include/dt-bindings/dma/bcm63268-dma.h new file mode 100644 index 0000000000..7d027119e6 --- /dev/null +++ b/include/dt-bindings/dma/bcm63268-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM63268_H +#define __DT_BINDINGS_DMA_BCM63268_H + +#define BCM63268_DMA_ENETSW_RX 0 +#define BCM63268_DMA_ENETSW_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM63268_H */ diff --git a/include/dt-bindings/dma/bcm6328-dma.h b/include/dt-bindings/dma/bcm6328-dma.h new file mode 100644 index 0000000000..7494df2feb --- /dev/null +++ b/include/dt-bindings/dma/bcm6328-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6328_H +#define __DT_BINDINGS_DMA_BCM6328_H + +#define BCM6328_DMA_ENETSW_RX 0 +#define BCM6328_DMA_ENETSW_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM6328_H */ diff --git a/include/dt-bindings/dma/bcm6338-dma.h b/include/dt-bindings/dma/bcm6338-dma.h new file mode 100644 index 0000000000..f2e0b20444 --- /dev/null +++ b/include/dt-bindings/dma/bcm6338-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6338_H +#define __DT_BINDINGS_DMA_BCM6338_H + +#define BCM6338_DMA_ENET_RX 0 +#define BCM6338_DMA_ENET_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM6338_H */ diff --git a/include/dt-bindings/dma/bcm6348-dma.h b/include/dt-bindings/dma/bcm6348-dma.h new file mode 100644 index 0000000000..36c2ffd412 --- /dev/null +++ b/include/dt-bindings/dma/bcm6348-dma.h @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6348_H +#define __DT_BINDINGS_DMA_BCM6348_H + +#define BCM6348_DMA_ENET0_RX 0 +#define BCM6348_DMA_ENET0_TX 1 +#define BCM6348_DMA_ENET1_RX 2 +#define BCM6348_DMA_ENET1_TX 3 + +#endif /* __DT_BINDINGS_DMA_BCM6348_H */ diff --git a/include/dt-bindings/dma/bcm6358-dma.h b/include/dt-bindings/dma/bcm6358-dma.h new file mode 100644 index 0000000000..3118b9da0a --- /dev/null +++ b/include/dt-bindings/dma/bcm6358-dma.h @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6358_H +#define __DT_BINDINGS_DMA_BCM6358_H + +#define BCM6358_DMA_ENET0_RX 0 +#define BCM6358_DMA_ENET0_TX 1 +#define BCM6358_DMA_ENET1_RX 2 +#define BCM6358_DMA_ENET1_TX 3 + +#endif /* __DT_BINDINGS_DMA_BCM6358_H */ diff --git a/include/dt-bindings/dma/bcm6362-dma.h b/include/dt-bindings/dma/bcm6362-dma.h new file mode 100644 index 0000000000..1e62236daa --- /dev/null +++ b/include/dt-bindings/dma/bcm6362-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6362_H +#define __DT_BINDINGS_DMA_BCM6362_H + +#define BCM6362_DMA_ENETSW_RX 0 +#define BCM6362_DMA_ENETSW_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM6362_H */ diff --git a/include/dt-bindings/dma/bcm6368-dma.h b/include/dt-bindings/dma/bcm6368-dma.h new file mode 100644 index 0000000000..36c6caa0e1 --- /dev/null +++ b/include/dt-bindings/dma/bcm6368-dma.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/drivers/net/ethernet/broadcom/bcm63xx_enet.c + */ + +#ifndef __DT_BINDINGS_DMA_BCM6368_H +#define __DT_BINDINGS_DMA_BCM6368_H + +#define BCM6368_DMA_ENETSW_RX 0 +#define BCM6368_DMA_ENETSW_TX 1 + +#endif /* __DT_BINDINGS_DMA_BCM6368_H */ |