summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8536DS.h6
-rw-r--r--include/configs/MPC8572DS.h4
-rw-r--r--include/configs/P1022DS.h4
-rw-r--r--include/configs/P1_P2_RDB.h19
-rw-r--r--include/configs/P2020DS.h4
-rw-r--r--include/configs/P4080DS.h16
-rw-r--r--include/configs/corenet_ds.h8
-rw-r--r--include/hwconfig.h68
8 files changed, 88 insertions, 41 deletions
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index d1ae35db0d..11ee650418 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -47,17 +47,23 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#ifndef CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index ea15831b73..e6b60cf28b 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -48,6 +48,10 @@
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#ifndef CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 2b8fc7deca..f31076858e 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -26,6 +26,10 @@
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 80b0b40091..bf34740040 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -57,17 +57,23 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#ifndef CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
@@ -77,17 +83,23 @@
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/
#define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
+#if defined(CONFIG_PCI)
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
+#endif /* #if defined(CONFIG_PCI) */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
+#if defined(CONFIG_PCI)
#define CONFIG_E1000 1 /* E1000 pci Ethernet card*/
+#endif
+
#ifndef __ASSEMBLY__
extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif
@@ -358,6 +370,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
*/
/* controller 2, Slot 2, tgtid 2, Base address 9000 */
+#if defined(CONFIG_PCI)
#define CONFIG_SYS_PCIE2_NAME "Slot 1"
#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
@@ -379,8 +392,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc30000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100
@@ -399,11 +410,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */
-#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI
#define CONFIG_NET_MULTI 1
-#endif
+#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#define CONFIG_TSEC1 1
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index b6e3260d3d..b32a9976f6 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -45,6 +45,10 @@
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 5c818c9038..49f7c534d8 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -26,23 +26,7 @@
#define CONFIG_P4080DS
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P4080
-#define CONFIG_SYS_NUM_FMAN 2
-#define CONFIG_SYS_NUM_FM1_DTSEC 4
-#define CONFIG_SYS_NUM_FM2_DTSEC 4
-#define CONFIG_SYS_NUM_FM1_10GEC 1
-#define CONFIG_SYS_NUM_FM2_10GEC 1
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
-
-#define CONFIG_SYS_P4080_ERRATUM_CPU22
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
-#define CONFIG_SYS_P4080_ERRATUM_SERDES8
-#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-
#include "corenet_ds.h"
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 23bbd42af2..bff212e40d 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -41,6 +41,10 @@
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
@@ -76,7 +80,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-/*#define CONFIG_DDR_ECC*/
+#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
@@ -442,13 +446,11 @@
#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f
#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4
-#if (CONFIG_SYS_NUM_FMAN == 2)
#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c
#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d
#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e
#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f
#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0
-#endif
#define CONFIG_SYS_TBIPA_VALUE 8
#define CONFIG_MII /* MII PHY management */
diff --git a/include/hwconfig.h b/include/hwconfig.h
index d517f782fd..a037ed8850 100644
--- a/include/hwconfig.h
+++ b/include/hwconfig.h
@@ -2,6 +2,7 @@
* An inteface for configuring a hardware via u-boot environment.
*
* Copyright (c) 2009 MontaVista Software, Inc.
+ * Copyright 2011 Freescale Semiconductor, Inc.
*
* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
*
@@ -19,51 +20,84 @@
#ifdef CONFIG_HWCONFIG
-extern int hwconfig(const char *opt);
-extern const char *hwconfig_arg(const char *opt, size_t *arglen);
-extern int hwconfig_arg_cmp(const char *opt, const char *arg);
-extern int hwconfig_sub(const char *opt, const char *subopt);
-extern const char *hwconfig_subarg(const char *opt, const char *subopt,
- size_t *subarglen);
-extern int hwconfig_subarg_cmp(const char *opt, const char *subopt,
- const char *subarg);
-
+extern int hwconfig_f(const char *opt, char *buf);
+extern const char *hwconfig_arg_f(const char *opt, size_t *arglen, char *buf);
+extern int hwconfig_arg_cmp_f(const char *opt, const char *arg, char *buf);
+extern int hwconfig_sub_f(const char *opt, const char *subopt, char *buf);
+extern const char *hwconfig_subarg_f(const char *opt, const char *subopt,
+ size_t *subarglen, char *buf);
+extern int hwconfig_subarg_cmp_f(const char *opt, const char *subopt,
+ const char *subarg, char *buf);
#else
-static inline int hwconfig(const char *opt)
+static inline int hwconfig_f(const char *opt, char *buf)
{
return -ENOSYS;
}
-static inline const char *hwconfig_arg(const char *opt, size_t *arglen)
+static inline const char *hwconfig_arg_f(const char *opt, size_t *arglen,
+ char *buf)
{
*arglen = 0;
return "";
}
-static inline int hwconfig_arg_cmp(const char *opt, const char *arg)
+static inline int hwconfig_arg_cmp_f(const char *opt, const char *arg,
+ char *buf)
{
return -ENOSYS;
}
-static inline int hwconfig_sub(const char *opt, const char *subopt)
+static inline int hwconfig_sub_f(const char *opt, const char *subopt, char *buf)
{
return -ENOSYS;
}
-static inline const char *hwconfig_subarg(const char *opt, const char *subopt,
- size_t *subarglen)
+static inline const char *hwconfig_subarg_f(const char *opt, const char *subopt,
+ size_t *subarglen, char *buf)
{
*subarglen = 0;
return "";
}
-static inline int hwconfig_subarg_cmp(const char *opt, const char *subopt,
- const char *subarg)
+static inline int hwconfig_subarg_cmp_f(const char *opt, const char *subopt,
+ const char *subarg, char *buf)
{
return -ENOSYS;
}
#endif /* CONFIG_HWCONFIG */
+static inline int hwconfig(const char *opt)
+{
+ return hwconfig_f(opt, NULL);
+}
+
+static inline const char *hwconfig_arg(const char *opt, size_t *arglen)
+{
+ return hwconfig_arg_f(opt, arglen, NULL);
+}
+
+static inline int hwconfig_arg_cmp(const char *opt, const char *arg)
+{
+ return hwconfig_arg_cmp_f(opt, arg, NULL);
+}
+
+static inline int hwconfig_sub(const char *opt, const char *subopt)
+{
+ return hwconfig_sub_f(opt, subopt, NULL);
+}
+
+static inline const char *hwconfig_subarg(const char *opt, const char *subopt,
+ size_t *subarglen)
+{
+ return hwconfig_subarg_f(opt, subopt, subarglen, NULL);
+}
+
+static inline int hwconfig_subarg_cmp(const char *opt, const char *subopt,
+ const char *subarg)
+{
+ return hwconfig_subarg_cmp_f(opt, subopt, subarg, NULL);
+}
+
#endif /* _HWCONFIG_H */
generated by cgit (git 2.34.1) at 2024-12-28 10:06:58 +0000