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-rw-r--r--include/configs/SBx81LIFKW.h119
-rw-r--r--include/configs/clearfog.h16
-rw-r--r--include/configs/guruplug.h5
-rw-r--r--include/configs/legoev3.h104
-rw-r--r--include/configs/odroid_xu3.h1
-rw-r--r--include/configs/sheevaplug.h5
-rw-r--r--include/configs/stih410-b2260.h1
-rw-r--r--include/part_efi.h3
8 files changed, 178 insertions, 76 deletions
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
new file mode 100644
index 0000000000..bcc2c201d2
--- /dev/null
+++ b/include/configs/SBx81LIFKW.h
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2016 Allied Telesis <www.alliedtelesis.co.nz>
+ */
+
+#ifndef _CONFIG_SBX81LIFKW_H
+#define _CONFIG_SBX81LIFKW_H
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
+#define CONFIG_BUILD_TARGET "u-boot.kwb"
+
+/* additions for new ARM relocation support */
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
+#define CONFIG_KIRKWOOD_GPIO 1
+
+#define CONFIG_MISC_INIT_R /* call misc_init_r */
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+
+#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
+#define MTDPARTS_MTDOOPS "errlog"
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Environment variables configurations
+ */
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */
+#define CONFIG_ENV_SIZE 0x02000
+#define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */
+
+/*
+ * U-Boot bootcode configuration
+ */
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
+#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
+
+/* size in bytes reserved for initial data */
+
+#include <asm/arch/config.h>
+/* There is no PHY directly connected so don't ask it for link status */
+#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_NR_DRAM_BANKS 4
+#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
+#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE /* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi over miiphy interface */
+#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
+#define CONFIG_PHY_BASE_ADR 0x01
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * Time settings
+ */
+#define CONFIG_RTC_MV
+
+#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
+
+#endif /* _CONFIG_SBX81LIFKW_H */
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index f57f9b21ab..1141aee08b 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -21,13 +21,6 @@
* Commands configuration
*/
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
-#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_BUS 1
@@ -62,6 +55,15 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
+/* SATA support */
+#ifdef CONFIG_SCSI
+#define CONFIG_SCSI_AHCI_PLAT
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
+#define CONFIG_SYS_SCSI_MAX_LUN 1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+#endif
+
/* Keep device tree and initrd in lower memory so the kernel can access them */
#define RELOCATION_LIMITS_ENV_SETTINGS \
"fdt_high=0x10000000\0" \
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index 9e7ca60f11..04b7e944a4 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -39,6 +39,11 @@
*/
#define CONFIG_ENV_SIZE 0x20000 /* 128k */
#define CONFIG_ENV_OFFSET 0xE0000 /* env starts here */
+/*
+ * Environment is right behind U-Boot in flash. Make sure U-Boot
+ * doesn't grow into the environment area.
+ */
+#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET
/*
* Default environment variables
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 542b8f072c..7a0511f88e 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -39,61 +39,6 @@
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
- DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
- DAVINCI_SYSCFG_SUSPSRC_SPI0 | \
- DAVINCI_SYSCFG_SUSPSRC_UART1 | \
- DAVINCI_SYSCFG_SUSPSRC_EMAC | \
- DAVINCI_SYSCFG_SUSPSRC_I2C)
-
-/*
- * PLL configuration
- */
-
-#define CONFIG_SYS_DA850_PLL0_PLLM 24
-#define CONFIG_SYS_DA850_PLL1_PLLM 21
-
-/*
- * DDR2 memory configuration
- */
-#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \
- DV_DDR_PHY_EXT_STRBEN | \
- (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT))
-
-#define CONFIG_SYS_DA850_DDR2_SDBCR ( \
- (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \
- (1 << DV_DDR_SDCR_DDREN_SHIFT) | \
- (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \
- (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \
- (0x3 << DV_DDR_SDCR_CL_SHIFT) | \
- (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \
- (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
-
-/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */
-#define CONFIG_SYS_DA850_DDR2_SDBCR2 0
-
-#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \
- (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \
- (2 << DV_DDR_SDTMR1_RP_SHIFT) | \
- (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \
- (1 << DV_DDR_SDTMR1_WR_SHIFT) | \
- (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \
- (8 << DV_DDR_SDTMR1_RC_SHIFT) | \
- (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \
- (0 << DV_DDR_SDTMR1_WTR_SHIFT))
-
-#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \
- (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \
- (0 << DV_DDR_SDTMR2_XP_SHIFT) | \
- (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \
- (17 << DV_DDR_SDTMR2_XSNR_SHIFT) | \
- (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \
- (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \
- (0 << DV_DDR_SDTMR2_CKE_SHIFT))
-
-#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494
-#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
-
/*
* Serial Driver info
*/
@@ -139,35 +84,60 @@
"if run loadbootscr; then " \
"run bootscript; " \
"else " \
+ "if run loadbootenv; then " \
+ "echo Loaded env from ${bootenvfile};" \
+ "run importbootenv;" \
+ "fi;" \
+ "if test -n $uenvcmd; then " \
+ "echo Running uenvcmd...;" \
+ "run uenvcmd;" \
+ "fi;" \
"if run loadimage; then " \
"run mmcargs; " \
+ "if run loadfdt; then " \
+ "echo Using ${fdtfile}...;" \
+ "run fdtfixup; " \
+ "run fdtboot; "\
+ "fi; " \
"run mmcboot; " \
- "else " \
- "run flashargs; " \
- "run flashboot; " \
"fi; " \
"fi; " \
- "else " \
- "run flashargs; " \
- "run flashboot; " \
- "fi"
+ "fi; "\
+ "run flashargs; " \
+ "run flashboot"
#define CONFIG_EXTRA_ENV_SETTINGS \
- "hostname=EV3\0" \
+ "bootenvfile=uEnv.txt\0" \
+ "fdtfile=da850-lego-ev3.dtb\0" \
"memsize=64M\0" \
"filesyssize=10M\0" \
"verify=n\0" \
"console=ttyS1,115200n8\0" \
"bootscraddr=0xC0600000\0" \
+ "fdtaddr=0xC0600000\0" \
"loadaddr=0xC0007FC0\0" \
"filesysaddr=0xC1180000\0" \
"fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
- "mmcargs=setenv bootargs mem=${memsize} console=${console} root=/dev/mmcblk0p2 rw rootwait lpj=747520\0" \
+ "importbootenv=echo Importing environment...; " \
+ "env import -t ${loadaddr} ${filesize}\0" \
+ "loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \
+ "mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \
+ "rootwait ${optargs}\0" \
"mmcboot=bootm ${loadaddr}\0" \
- "flashargs=setenv bootargs mem=${memsize} initrd=${filesysaddr},${filesyssize} root=/dev/ram0 rw rootfstype=squashfs console=${console} lpj=747520\0" \
- "flashboot=sf probe 0; sf read ${loadaddr} 0x50000 0x300000; sf read ${filesysaddr} 0x350000 0x960000; bootm ${loadaddr}\0" \
+ "flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \
+ "root=/dev/ram0 rw rootfstype=squashfs console=${console} " \
+ "${optargs}\0" \
+ "flashboot=sf probe 0; " \
+ "sf read ${fdtaddr} 0x40000 0x10000; " \
+ "sf read ${loadaddr} 0x50000 0x400000; " \
+ "sf read ${filesysaddr} 0x450000 0xA00000; " \
+ "run fdtfixup; " \
+ "run fdtboot\0" \
"loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
+ "loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \
+ "fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \
+ "fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \
"loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
- "bootscript=source ${bootscraddr}\0" \
+ "bootscript=source ${bootscraddr}\0"
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 9898c42b8e..f495f6219b 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -101,7 +101,6 @@
EXYNOS_FDTFILE_SETTING \
MEM_LAYOUT_ENV_SETTINGS \
BOOTENV \
- "bootdelay=0\0" \
"rootfstype=ext4\0" \
"console=" CONFIG_DEFAULT_CONSOLE "\0"\
"fdtfile=exynos5422-odroidxu3.dtb\0" \
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 23dd5ceb7c..dc6375841e 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -44,6 +44,11 @@
#define CONFIG_ENV_SIZE 0x20000 /* 128k */
#define CONFIG_ENV_ADDR 0x80000
#define CONFIG_ENV_OFFSET 0x80000 /* env starts here */
+/*
+ * Environment is right behind U-Boot in flash. Make sure U-Boot
+ * doesn't grow into the environment area.
+ */
+#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET
/*
* Default environment variables
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index b4e4619266..d8bf3b6580 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -31,6 +31,7 @@
"fdtfile=stih410-b2260.dtb\0" \
"fdt_addr_r=0x47000000\0" \
"scriptaddr=0x50000000\0" \
+ "pxefile_addr_r=0x50100000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"ramdisk_addr_r=0x48000000\0" \
diff --git a/include/part_efi.h b/include/part_efi.h
index 6065c571f3..8525770445 100644
--- a/include/part_efi.h
+++ b/include/part_efi.h
@@ -20,6 +20,7 @@
#include <efi.h>
#define MSDOS_MBR_SIGNATURE 0xAA55
+#define MSDOS_MBR_BOOT_CODE_SIZE 440
#define EFI_PMBR_OSTYPE_EFI 0xEF
#define EFI_PMBR_OSTYPE_EFI_GPT 0xEE
@@ -111,7 +112,7 @@ typedef struct _gpt_entry {
} __packed gpt_entry;
typedef struct _legacy_mbr {
- u8 boot_code[440];
+ u8 boot_code[MSDOS_MBR_BOOT_CODE_SIZE];
__le32 unique_mbr_signature;
__le16 unknown;
struct partition partition_record[4];