diff options
Diffstat (limited to 'include')
30 files changed, 0 insertions, 49 deletions
diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h index e14652a626..e3bcc63e13 100644 --- a/include/configs/MPC8313ERDB_NAND.h +++ b/include/configs/MPC8313ERDB_NAND.h @@ -438,8 +438,6 @@ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h index b550a8daf8..af2432b12d 100644 --- a/include/configs/MPC8313ERDB_NOR.h +++ b/include/configs/MPC8313ERDB_NOR.h @@ -412,8 +412,6 @@ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 446c98bad1..d2f9309cd6 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -404,7 +404,6 @@ /* * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 7dbbb4e0fb..37f173ef74 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -300,7 +300,6 @@ /* * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index dad8407f67..d8cadde0e0 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -364,8 +364,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ | BATL_PP_RW \ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 2159454061..d70e477f80 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -381,7 +381,6 @@ HID0_ENABLE_ADDRESS_BROADCAST) */ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h index a19e732d8a..286654066c 100644 --- a/include/configs/MPC8349EMDS_SDRAM.h +++ b/include/configs/MPC8349EMDS_SDRAM.h @@ -453,7 +453,6 @@ HID0_ENABLE_ADDRESS_BROADCAST) */ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 6860c72794..e7031e94fd 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -481,7 +481,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 8c562fde2e..3473ca6102 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -423,7 +423,6 @@ extern int board_pci_host_broken(void); /* * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR: cache cacheable */ #define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 055a30e24f..9ddd2af0d9 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -439,8 +439,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_SDRAM_UPPER (CONFIG_SYS_SDRAM_BASE + 0x10000000) diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index b534d4758b..04f55e3990 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -43,7 +43,6 @@ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #define CONFIG_BAT_RW 1 /* Use common BAT rw code */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported & enabled */ #define CONFIG_ALTIVEC 1 /* diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 9318b190ae..8c01891e26 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -45,7 +45,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAT_RW 1 /* Use common BAT rw code */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */ #define CONFIG_ALTIVEC 1 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index be1c2893f1..c27a04ace9 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -270,8 +270,6 @@ HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR 0 - 512M */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ | BATL_PP_RW \ diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h index 5e88bd7eda..007ded0299 100644 --- a/include/configs/caddy2.h +++ b/include/configs/caddy2.h @@ -302,8 +302,6 @@ #define CONFIG_SYS_GPIO2_DIR 0x78900000 #define CONFIG_SYS_GPIO2_DAT 0x70100000 -#define CONFIG_HIGH_BATS /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_MEMCOHERENCE) diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 4e5927ed70..ac151dccba 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -285,7 +285,6 @@ /* * BAT's */ -#define CONFIG_HIGH_BATS /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE |\ diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 7e579db6ae..a45ea521ac 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -238,8 +238,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 3a98f9497b..2d7b3106dd 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -224,8 +224,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmopti2.h b/include/configs/kmopti2.h index 4494475486..2f19b2e9ef 100644 --- a/include/configs/kmopti2.h +++ b/include/configs/kmopti2.h @@ -243,8 +243,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h index 7c008f8516..ae997a71f6 100644 --- a/include/configs/kmsupx5.h +++ b/include/configs/kmsupx5.h @@ -243,8 +243,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmtegr1.h b/include/configs/kmtegr1.h index 95b16ca585..2e4e2a3b5f 100644 --- a/include/configs/kmtegr1.h +++ b/include/configs/kmtegr1.h @@ -247,8 +247,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmtepr2.h b/include/configs/kmtepr2.h index 5191f2c4b0..f998b95f93 100644 --- a/include/configs/kmtepr2.h +++ b/include/configs/kmtepr2.h @@ -243,8 +243,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/kmvect1.h b/include/configs/kmvect1.h index cc88f071ec..f4da14a616 100644 --- a/include/configs/kmvect1.h +++ b/include/configs/kmvect1.h @@ -239,8 +239,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index fd67aca207..d6f2813e50 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -383,8 +383,6 @@ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ | BATL_PP_RW \ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index e9e264b40b..d1535b6fac 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -45,7 +45,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAT_RW 1 /* Use common BAT rw code */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/ #undef CONFIG_DDR_ECC /* only for ECC DDR module */ diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h index c84c7c0f6e..4cc9f13d37 100644 --- a/include/configs/suvd3.h +++ b/include/configs/suvd3.h @@ -240,8 +240,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/tuge1.h b/include/configs/tuge1.h index 8f60db3055..8d254689cf 100644 --- a/include/configs/tuge1.h +++ b/include/configs/tuge1.h @@ -243,8 +243,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h index 58c6089bec..63fbf1b45c 100644 --- a/include/configs/tuxx1.h +++ b/include/configs/tuxx1.h @@ -243,8 +243,6 @@ * MMU Setup */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR: cache cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index c4bdfe574a..b15cd218f2 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -333,8 +333,6 @@ #define CONFIG_SYS_HID2 HID2_HBE -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index ca6233a26e..d73265e064 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -302,8 +302,6 @@ #define CONFIG_SYS_GPIO2_DIR 0x78900000 #define CONFIG_SYS_GPIO2_DAT 0x70100000 -#define CONFIG_HIGH_BATS /* High BATs supported */ - /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ BATL_MEMCOHERENCE) diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 2d2a87a719..1ef803b020 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_FORM_3U_VPX 1 #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_BAT_RW 1 /* Use common BAT rw code */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_ALTIVEC 1 #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ |