diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/durian.h | 44 | ||||
| -rw-r--r-- | include/configs/socrates.h | 68 | ||||
| -rw-r--r-- | include/k3-avs.h | 30 | ||||
| -rw-r--r-- | include/linux/err.h | 8 | ||||
| -rw-r--r-- | include/power/tps65941.h | 26 |
5 files changed, 113 insertions, 63 deletions
diff --git a/include/configs/durian.h b/include/configs/durian.h new file mode 100644 index 0000000000..c42a98b9a0 --- /dev/null +++ b/include/configs/durian.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 + * shuyiqi <shuyiqi@phytium.com.cn> + * liuhao <liuhao@phytium.com.cn> + */ + +#ifndef __DURIAN_CONFIG_H__ +#define __DURIAN_CONFIG_H__ + +/* Sdram Bank #1 Address */ +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1_SIZE 0x7B000000 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000000) + +/* Size of Malloc Pool */ +#define CONFIG_ENV_SIZE 4096 +#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024 + CONFIG_ENV_SIZE) + +#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000) + +/* PCI CONFIG */ +#define CONFIG_SYS_PCI_64BIT 1 +#define CONFIG_PCI_SCAN_SHOW + +/* SCSI */ +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE 128 +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SATA_MAX_DEVICE 4 + +/* BOOT */ +#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \ + "load_fdt=ext4load scsi 0:1 0x95000000 ft2004-pci-64.dtb\0"\ + "boot_fdt=bootm 0x90100000 -:- 0x95000000\0" \ + "distro_bootcmd=run load_kernel; run load_fdt; run boot_fdt" + +#endif diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c7c30d367a..a03005902f 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -19,8 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_SOCRATES 1 -#define CONFIG_PCI_INDIRECT_BRIDGE - /* * Only possible on E500 Version 2 or newer cores. */ @@ -96,6 +94,7 @@ */ #define CONFIG_SYS_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */ +#define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH0 0xFE000000 #define CONFIG_SYS_FLASH1 0xFC000000 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 } @@ -147,50 +146,7 @@ #define CONFIG_SYS_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ #define CONFIG_SYS_OR2_PRELIM 0xfc000000 /* 64 MB */ -#define CONFIG_VIDEO_MB862xx -#define CONFIG_VIDEO_MB862xx_ACCEL -#define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_BMP_LOGO -#define VIDEO_FB_16BPP_PIXEL_SWAP -#define VIDEO_FB_16BPP_WORD_SWAP -#define CONFIG_SPLASH_SCREEN -#define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ - -/* SDRAM Clock frequency, 100MHz (0x0000) or 133MHz (0x10000) */ -#define CONFIG_SYS_MB862xx_CCF 0x10000 -/* SDRAM parameter */ -#define CONFIG_SYS_MB862xx_MMR 0x4157BA63 - -/* Serial Port */ - -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -/* - * I2C - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 102124 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 -#define CONFIG_SYS_FSL_I2C2_SPEED 102124 -#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 - -/* I2C RTC */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x32 /* at address 0x32 */ - -/* I2C W83782G HW-Monitoring IC */ -#define CONFIG_SYS_I2C_W83782G_ADDR 0x28 /* W83782G address */ +#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 @@ -198,7 +154,6 @@ * General PCI * Memory space is mapped 1-1. */ -#define CONFIG_SYS_PCI_PHYS 0x80000000 /* 1G PCI TLB */ /* PCI is clocked by the external source at 33 MHz */ #define CONFIG_PCI_CLK_FREQ 33000000 @@ -209,10 +164,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE #define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */ -#if defined(CONFIG_PCI) -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC3 1 @@ -237,9 +188,10 @@ * Environment */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - \ + CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE 0x4000 -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -279,7 +231,7 @@ "bootfile=/home/tftp/syscon3/uImage\0" \ "fdt_file=/home/tftp/syscon3/socrates.dtb\0" \ "initrd_file=/home/tftp/syscon3/uinitrd.gz\0" \ - "uboot_addr=FFFA0000\0" \ + "uboot_addr=FFF60000\0" \ "kernel_addr=FE000000\0" \ "fdt_addr=FE1E0000\0" \ "ramdisk_addr=FE200000\0" \ @@ -302,9 +254,9 @@ "run nfsargs addip addcons;" \ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ "update_uboot=tftp 100000 ${uboot_file};" \ - "protect off fffa0000 ffffffff;" \ - "era fffa0000 ffffffff;" \ - "cp.b 100000 fffa0000 ${filesize};" \ + "protect off fff60000 ffffffff;" \ + "era fff60000 ffffffff;" \ + "cp.b 100000 fff60000 ${filesize};" \ "setenv filesize;saveenv\0" \ "update_kernel=tftp 100000 ${bootfile};" \ "era fe000000 fe1dffff;" \ @@ -333,8 +285,6 @@ /* USB support */ #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_PCI_OHCI 1 -#define CONFIG_PCI_OHCI_DEVNO 3 /* Number in PCI list */ -#define CONFIG_PCI_EHCI_DEVNO (CONFIG_PCI_OHCI_DEVNO / 2) #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1 diff --git a/include/k3-avs.h b/include/k3-avs.h new file mode 100644 index 0000000000..e3c3cafbb9 --- /dev/null +++ b/include/k3-avs.h @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments' K3 Adaptive Voltage Scaling driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo <t-kristo@ti.com> + * + */ + +#ifndef _K3_AVS0_ +#define _K3_AVS0_ + +#define AM6_VDD_WKUP 0 +#define AM6_VDD_MCU 1 +#define AM6_VDD_CORE 2 +#define AM6_VDD_MPU0 3 +#define AM6_VDD_MPU1 4 + +#define J721E_VDD_MPU 2 + +#define NUM_OPPS 4 + +#define AM6_OPP_NOM 1 +#define AM6_OPP_OD 2 +#define AM6_OPP_TURBO 3 + +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id); +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq); + +#endif diff --git a/include/linux/err.h b/include/linux/err.h index 22e5756edd..5ede82432d 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -23,22 +23,22 @@ static inline void *ERR_PTR(long error) { - return (void *) error; + return (void *)(CONFIG_ERR_PTR_OFFSET + error); } static inline long PTR_ERR(const void *ptr) { - return (long) ptr; + return ((long)ptr - CONFIG_ERR_PTR_OFFSET); } static inline long IS_ERR(const void *ptr) { - return IS_ERR_VALUE((unsigned long)ptr); + return IS_ERR_VALUE((unsigned long)PTR_ERR(ptr)); } static inline bool IS_ERR_OR_NULL(const void *ptr) { - return !ptr || IS_ERR_VALUE((unsigned long)ptr); + return !ptr || IS_ERR_VALUE((unsigned long)PTR_ERR(ptr)); } /** diff --git a/include/power/tps65941.h b/include/power/tps65941.h new file mode 100644 index 0000000000..2d48b31ae3 --- /dev/null +++ b/include/power/tps65941.h @@ -0,0 +1,26 @@ +#define TPS659411 0x0 +#define TPS659412 0x1 +#define TPS659413 0x2 +#define TPS659414 0x3 + +/* I2C device address for pmic tps65941 */ +#define TPS65941_I2C_ADDR (0x12 >> 1) +#define TPS65941_LDO_NUM 4 +#define TPS65941_BUCK_NUM 5 + +/* Drivers name */ +#define TPS65941_LDO_DRIVER "tps65941_ldo" +#define TPS65941_BUCK_DRIVER "tps65941_buck" + +#define TPS65941_BUCK_VOLT_MASK 0xFF +#define TPS65941_BUCK_VOLT_MAX_HEX 0xFF +#define TPS65941_BUCK_VOLT_MAX 3340000 +#define TPS65941_BUCK_MODE_MASK 0x1 + +#define TPS65941_LDO_VOLT_MASK 0x3E +#define TPS65941_LDO_VOLT_MAX_HEX 0x3A +#define TPS65941_LDO_VOLT_MIN_HEX 0x4 +#define TPS65941_LDO_VOLT_MAX 3300000 +#define TPS65941_LDO_MODE_MASK 0x1 +#define TPS65941_LDO_BYPASS_EN 0x80 +#define TP65941_BUCK_CONF_SLEW_MASK 0x7 |