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-rw-r--r--include/configs/katmai.h2
-rw-r--r--include/ppc405.h2
-rw-r--r--include/ppc440.h2
3 files changed, 4 insertions, 2 deletions
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 1606d0da17..7f55366ca5 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -78,7 +78,7 @@
#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
-#define CFG_ACE_BASE 0xe0000000 /* Xilinx ACE controller - Compact Flash */
+#define CFG_ACE_BASE 0xfe000000 /* Xilinx ACE controller - Compact Flash */
/*-----------------------------------------------------------------------
* Initial RAM & stack pointer (placed in internal SRAM)
diff --git a/include/ppc405.h b/include/ppc405.h
index 08f10d27b2..a2503a93d2 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -570,6 +570,8 @@
#define SDR_ICTX0_STAT 0x40000000
#define SDR_ICTX1_STAT 0x20000000
+#define SDR_PINSTP 0x40
+
/******************************************************************************
* Control
******************************************************************************/
diff --git a/include/ppc440.h b/include/ppc440.h
index 51e6b9b28c..bc1d7aad73 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -148,7 +148,7 @@
#define sdrcfgd (SDR_DCR_BASE+0x1)
#define sdr_sdstp0 0x0020 /* */
#define sdr_sdstp1 0x0021 /* */
-#define sdr_pinstp 0x0040
+#define SDR_PINSTP 0x0040
#define sdr_sdcs 0x0060
#define sdr_ecid0 0x0080
#define sdr_ecid1 0x0081