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-rw-r--r--include/_exports.h13
-rw-r--r--include/configs/ls1021aqds.h2
-rw-r--r--include/configs/ls1021atwr.h2
-rw-r--r--include/configs/ls2085a_common.h28
-rw-r--r--include/configs/ls2085aqds.h17
-rw-r--r--include/configs/ls2085ardb.h49
-rw-r--r--include/exports.h13
-rw-r--r--include/fsl-mc/fsl_dpio.h32
-rw-r--r--include/fsl-mc/fsl_dpmng.h2
-rw-r--r--include/fsl-mc/fsl_dpni.h144
-rw-r--r--include/fsl-mc/fsl_dprc.h64
-rw-r--r--include/fsl-mc/fsl_mc.h5
-rw-r--r--include/fsl_ddr.h3
13 files changed, 299 insertions, 75 deletions
diff --git a/include/_exports.h b/include/_exports.h
index 279017e87f..74a882a680 100644
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -73,3 +73,16 @@
const char *, char **, unsigned int)
EXPORT_FUNC(ustrtoull, unsigned long long, ustrtoull,
const char *, char **, unsigned int)
+ EXPORT_FUNC(strcpy, char *, strcpy, char *dest, const char *src)
+ EXPORT_FUNC(mdelay, void, mdelay, unsigned long msec)
+#ifdef CONFIG_PHY_AQUANTIA
+ EXPORT_FUNC(mdio_get_current_dev, struct mii_dev *,
+ mdio_get_current_dev, void)
+ EXPORT_FUNC(phy_find_by_mask, struct phy_device *, phy_find_by_mask,
+ struct mii_dev *bus, unsigned phy_mask,
+ phy_interface_t interface)
+ EXPORT_FUNC(mdio_phydev_for_ethname, struct phy_device *,
+ mdio_phydev_for_ethname, const char *ethname)
+ EXPORT_FUNC(miiphy_set_current_dev, int, miiphy_set_current_dev,
+ const char *devname)
+#endif
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 8a5a707d3b..cacbae7490 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -9,6 +9,8 @@
#define CONFIG_LS102XA
+#define CONFIG_ARMV7_PSCI
+
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DISPLAY_CPUINFO
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 233b3d092c..d0432c35ac 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -9,6 +9,8 @@
#define CONFIG_LS102XA
+#define CONFIG_ARMV7_PSCI
+
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DISPLAY_CPUINFO
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 72ba3b394e..5afee55ae9 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -19,6 +19,7 @@
#define CONFIG_ARM_ERRATA_828024
#define CONFIG_ARM_ERRATA_826974
+#include <asm/arch-fsl-lsch3/ls2085a_stream_id.h>
#include <asm/arch-fsl-lsch3/config.h>
#if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2))
#define CONFIG_SYS_HAS_SERDES
@@ -163,21 +164,30 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SYS_NAND_BASE_PHYS 0x30000000
/* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
+#define CONFIG_FSL_DEBUG_SERVER
/* 2 sec timeout */
#define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000)
/* MC firmware */
#define CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
/* TODO Actual DPL max length needs to be confirmed with the MC FW team */
#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
+#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000
+#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000
-/* Carve out a DDR region which will not be used by u-boot/Linux */
+/*
+ * Carve out a DDR region which will not be used by u-boot/Linux
+ *
+ * It will be used by MC and Debug Server. The MC region must be
+ * 512MB aligned, so the min size to hide is 512MB.
+ */
#if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
+#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
+#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024)
#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide()
#endif
@@ -186,7 +196,8 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_PCIE2 /* PCIE controler 2 */
#define CONFIG_PCIE3 /* PCIE controler 3 */
#define CONFIG_PCIE4 /* PCIE controler 4 */
-#define FSL_PCIE_COMPAT "fsl,20851a-pcie"
+#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
+#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"
#define CONFIG_SYS_PCI_64BIT
@@ -236,13 +247,13 @@ unsigned long long get_qixis_addr(void);
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x581200000\0" \
"kernel_load=0xa0000000\0" \
- "kernel_size=0x1000000\0" \
+ "kernel_size=0x2800000\0" \
"console=ttyAMA0,38400n8\0"
#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \
"earlycon=uart8250,mmio,0x21c0600,115200 " \
- "default_hugepagesz=2m hugepagesz=2m " \
- "hugepages=16"
+ "ramdisk_size=0x2000000 default_hugepagesz=2m" \
+ " hugepagesz=2m hugepages=16"
#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
"$kernel_size && bootm $kernel_load"
#define CONFIG_BOOTDELAY 10
@@ -289,4 +300,7 @@ unsigned long get_dram_size_to_hide(void);
#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
+
+
#endif /* __LS2_COMMON_H */
diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h
index e488ac8ebf..a6ef356ad8 100644
--- a/include/configs/ls2085aqds.h
+++ b/include/configs/ls2085aqds.h
@@ -9,9 +9,6 @@
#include "ls2085a_common.h"
-#define CONFIG_IDENT_STRING " LS2085A-QDS"
-#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-QDS"
-
#define CONFIG_DISPLAY_BOARDINFO
#ifndef __ASSEMBLY__
@@ -263,6 +260,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
+#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
+#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL
/*
* I2C
@@ -273,6 +272,15 @@ unsigned long get_board_ddr_clk(void);
/* I2C bus multiplexer */
#define I2C_MUX_CH_DEFAULT 0x8
+/* SPI */
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_EON
+#endif
+
/*
* MMC
*/
@@ -287,6 +295,7 @@ unsigned long get_board_ddr_clk(void);
#define RTC
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#define CONFIG_CMD_DATE
/* EEPROM */
#define CONFIG_ID_EEPROM
@@ -332,7 +341,7 @@ unsigned long get_board_ddr_clk(void);
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x581100000\0" \
"kernel_load=0xa0000000\0" \
- "kernel_size=0x1000000\0"
+ "kernel_size=0x28000000\0"
#ifdef CONFIG_FSL_MC_ENET
#define CONFIG_FSL_MEMAC
diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h
index 600261e42b..41eb55b4bf 100644
--- a/include/configs/ls2085ardb.h
+++ b/include/configs/ls2085ardb.h
@@ -8,8 +8,6 @@
#define __LS2_RDB_H
#include "ls2085a_common.h"
-#define CONFIG_IDENT_STRING " LS2085A-RDB"
-#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-RDB"
#undef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX 2
@@ -30,8 +28,8 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
-#define SPD_EEPROM_ADDRESS3 0x54
-#define SPD_EEPROM_ADDRESS4 0x53 /* Board error */
+#define SPD_EEPROM_ADDRESS3 0x53
+#define SPD_EEPROM_ADDRESS4 0x54
#define SPD_EEPROM_ADDRESS5 0x55
#define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */
#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
@@ -235,22 +233,33 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
+#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
+#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL
/*
* I2C
*/
-#define I2C_MUX_PCA_ADDR 0x77
-#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
+#define I2C_MUX_PCA_ADDR 0x75
+#define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/
/* I2C bus multiplexer */
#define I2C_MUX_CH_DEFAULT 0x8
+/* SPI */
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_BAR
+#endif
+
/*
* RTC configuration
*/
#define RTC
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#define CONFIG_CMD_DATE
/* EEPROM */
#define CONFIG_ID_EEPROM
@@ -284,6 +293,8 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_DOS_PARTITION
#endif
+#define CONFIG_MISC_INIT_R
+
/* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -296,6 +307,30 @@ unsigned long get_board_sys_clk(void);
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x581100000\0" \
"kernel_load=0xa0000000\0" \
- "kernel_size=0x1000000\0"
+ "kernel_size=0x2800000\0"
+
+/* MAC/PHY configuration */
+#ifdef CONFIG_FSL_MC_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_CORTINA
+#define CONFIG_PHYLIB
+#define CONFIG_SYS_CORTINA_FW_IN_NOR
+#define CONFIG_CORTINA_FW_ADDR 0x581000000
+#define CONFIG_CORTINA_FW_LENGTH 0x40000
+
+#define CORTINA_PHY_ADDR1 0x10
+#define CORTINA_PHY_ADDR2 0x11
+#define CORTINA_PHY_ADDR3 0x12
+#define CORTINA_PHY_ADDR4 0x13
+#define AQ_PHY_ADDR1 0x00
+#define AQ_PHY_ADDR2 0x01
+#define AQ_PHY_ADDR3 0x02
+#define AQ_PHY_ADDR4 0x03
+
+#define CONFIG_MII
+#define CONFIG_ETHPRIME "DPNI1"
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHY_AQUANTIA
+#endif
#endif /* __LS2_RDB_H */
diff --git a/include/exports.h b/include/exports.h
index 1a01e430bb..a3e0469d40 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -2,6 +2,10 @@
#define __EXPORTS_H__
#ifndef __ASSEMBLY__
+#ifdef CONFIG_PHY_AQUANTIA
+#include <miiphy.h>
+#include <phy.h>
+#endif
struct spi_slave;
@@ -34,6 +38,13 @@ unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base);
int i2c_write (uchar, uint, int , uchar* , int);
int i2c_read (uchar, uint, int , uchar* , int);
#endif
+#ifdef CONFIG_PHY_AQUANTIA
+struct mii_dev *mdio_get_current_dev(void);
+struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
+ phy_interface_t interface);
+struct phy_device *mdio_phydev_for_ethname(const char *ethname);
+int miiphy_set_current_dev(const char *devname);
+#endif
void app_startup(char * const *);
@@ -46,7 +57,7 @@ struct jt_funcs {
};
-#define XF_VERSION 7
+#define XF_VERSION 8
#if defined(CONFIG_X86)
extern gd_t *global_data;
diff --git a/include/fsl-mc/fsl_dpio.h b/include/fsl-mc/fsl_dpio.h
index e84b419afe..e779909ccc 100644
--- a/include/fsl-mc/fsl_dpio.h
+++ b/include/fsl-mc/fsl_dpio.h
@@ -8,8 +8,8 @@
#define _FSL_DPIO_H
/* DPIO Version */
-#define DPIO_VER_MAJOR 2
-#define DPIO_VER_MINOR 1
+#define DPIO_VER_MAJOR 3
+#define DPIO_VER_MINOR 0
/* Command IDs */
#define DPIO_CMDID_CLOSE 0x800
@@ -31,8 +31,8 @@ do { \
MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->qbman_portal_id);\
MC_RSP_OP(cmd, 0, 48, 8, uint8_t, attr->num_priorities);\
MC_RSP_OP(cmd, 0, 56, 4, enum dpio_channel_mode, attr->channel_mode);\
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->qbman_portal_ce_paddr);\
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, attr->qbman_portal_ci_paddr);\
+ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->qbman_portal_ce_offset);\
+ MC_RSP_OP(cmd, 2, 0, 64, uint64_t, attr->qbman_portal_ci_offset);\
MC_RSP_OP(cmd, 3, 0, 16, uint16_t, attr->version.major);\
MC_RSP_OP(cmd, 3, 16, 16, uint16_t, attr->version.minor);\
} while (0)
@@ -42,6 +42,7 @@ do { \
*/
struct fsl_mc_io;
+
/**
* dpio_open() - Open a control session for the specified object
* @mc_io: Pointer to MC portal's I/O object
@@ -61,18 +62,9 @@ struct fsl_mc_io;
int dpio_open(struct fsl_mc_io *mc_io, int dpio_id, uint16_t *token);
/**
- * dpio_open() - Open a control session for the specified object
+ * dpio_close() - Close the control session of the object
* @mc_io: Pointer to MC portal's I/O object
- * @dpio_id: DPIO unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpio_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object.
+ * @token: Token of DPIO object
*
* Return: '0' on Success; Error code otherwise.
*/
@@ -121,10 +113,8 @@ int dpio_reset(struct fsl_mc_io *mc_io, uint16_t token);
* struct dpio_attr - Structure representing DPIO attributes
* @id: DPIO object ID
* @version: DPIO version
- * @qbman_portal_ce_paddr: Physical address of the software portal
- * cache-enabled area
- * @qbman_portal_ci_paddr: Physical address of the software portal
- * cache-inhibited area
+ * @qbman_portal_ce_offset: offset of the software portal cache-enabled area
+ * @qbman_portal_ci_offset: offset of the software portal cache-inhibited area
* @qbman_portal_id: Software portal ID
* @channel_mode: Notification channel mode
* @num_priorities: Number of priorities for the notification channel (1-8);
@@ -141,8 +131,8 @@ struct dpio_attr {
uint16_t major;
uint16_t minor;
} version;
- uint64_t qbman_portal_ce_paddr;
- uint64_t qbman_portal_ci_paddr;
+ uint64_t qbman_portal_ce_offset;
+ uint64_t qbman_portal_ci_offset;
uint16_t qbman_portal_id;
enum dpio_channel_mode channel_mode;
uint8_t num_priorities;
diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h
index 986e7c8338..6feb29225d 100644
--- a/include/fsl-mc/fsl_dpmng.h
+++ b/include/fsl-mc/fsl_dpmng.h
@@ -14,7 +14,7 @@ struct fsl_mc_io;
/**
* Management Complex firmware version information
*/
-#define MC_VER_MAJOR 6
+#define MC_VER_MAJOR 7
#define MC_VER_MINOR 0
/**
diff --git a/include/fsl-mc/fsl_dpni.h b/include/fsl-mc/fsl_dpni.h
index 67c087d469..26b67f0fb0 100644
--- a/include/fsl-mc/fsl_dpni.h
+++ b/include/fsl-mc/fsl_dpni.h
@@ -7,7 +7,7 @@
#define _FSL_DPNI_H
/* DPNI Version */
-#define DPNI_VER_MAJOR 4
+#define DPNI_VER_MAJOR 5
#define DPNI_VER_MINOR 0
/* Command IDs */
@@ -78,7 +78,7 @@ do { \
MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->max_tcs); \
MC_RSP_OP(cmd, 0, 40, 8, uint8_t, attr->max_senders); \
MC_RSP_OP(cmd, 0, 48, 8, enum net_prot, attr->start_hdr); \
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->options); \
+ MC_RSP_OP(cmd, 1, 0, 32, uint32_t, attr->options); \
MC_RSP_OP(cmd, 2, 0, 8, uint8_t, attr->max_unicast_filters); \
MC_RSP_OP(cmd, 2, 8, 8, uint8_t, attr->max_multicast_filters);\
MC_RSP_OP(cmd, 2, 16, 8, uint8_t, attr->max_vlan_filters); \
@@ -98,7 +98,9 @@ do { \
MC_RSP_OP(cmd, 4, 16, 16, uint16_t, \
attr->ipr_cfg.min_frag_size_ipv4); \
MC_RSP_OP(cmd, 4, 32, 16, uint16_t, \
- attr->ipr_cfg.min_frag_size_ipv6); \
+ attr->ipr_cfg.min_frag_size_ipv6);\
+ MC_RSP_OP(cmd, 4, 48, 8, uint8_t, attr->max_policers); \
+ MC_RSP_OP(cmd, 4, 56, 8, uint8_t, attr->max_congestion_ctrl); \
MC_RSP_OP(cmd, 5, 0, 16, uint16_t, \
attr->ipr_cfg.max_open_frames_ipv4); \
MC_RSP_OP(cmd, 5, 16, 16, uint16_t, \
@@ -208,7 +210,7 @@ do { \
/* cmd, param, offset, width, type, arg_name */
#define DPNI_CMD_SET_LINK_CFG(cmd, cfg) \
do { \
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->rate);\
+ MC_CMD_OP(cmd, 1, 0, 32, uint32_t, cfg->rate);\
MC_CMD_OP(cmd, 2, 0, 64, uint64_t, cfg->options);\
} while (0)
@@ -216,7 +218,7 @@ do { \
#define DPNI_RSP_GET_LINK_STATE(cmd, state) \
do { \
MC_RSP_OP(cmd, 0, 32, 1, int, state->up);\
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, state->rate);\
+ MC_RSP_OP(cmd, 1, 0, 32, uint32_t, state->rate);\
MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\
} while (0)
@@ -326,6 +328,13 @@ do { \
MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \
MC_CMD_OP(cmd, 2, 16, 8, uint8_t, tc_id); \
MC_CMD_OP(cmd, 2, 32, 32, uint32_t, cfg->options); \
+ MC_CMD_OP(cmd, 3, 0, 4, enum dpni_flc_type, cfg->flc_cfg.flc_type); \
+ MC_CMD_OP(cmd, 3, 4, 4, enum dpni_stash_size, \
+ cfg->flc_cfg.frame_data_size);\
+ MC_CMD_OP(cmd, 3, 8, 4, enum dpni_stash_size, \
+ cfg->flc_cfg.flow_context_size);\
+ MC_CMD_OP(cmd, 3, 32, 32, uint32_t, cfg->flc_cfg.options);\
+ MC_CMD_OP(cmd, 4, 0, 64, uint64_t, cfg->flc_cfg.flow_context);\
} while (0)
/* cmd, param, offset, width, type, arg_name */
@@ -343,6 +352,13 @@ do { \
MC_RSP_OP(cmd, 0, 40, 2, enum dpni_dest, attr->dest_cfg.dest_type); \
MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->user_ctx); \
MC_RSP_OP(cmd, 2, 32, 32, uint32_t, attr->fqid); \
+ MC_RSP_OP(cmd, 3, 0, 4, enum dpni_flc_type, attr->flc_cfg.flc_type); \
+ MC_RSP_OP(cmd, 3, 4, 4, enum dpni_stash_size, \
+ attr->flc_cfg.frame_data_size);\
+ MC_RSP_OP(cmd, 3, 8, 4, enum dpni_stash_size, \
+ attr->flc_cfg.flow_context_size);\
+ MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->flc_cfg.options);\
+ MC_RSP_OP(cmd, 4, 0, 64, uint64_t, attr->flc_cfg.flow_context);\
} while (0)
enum net_prot {
@@ -399,7 +415,8 @@ enum net_prot {
NET_PROT_DUMMY_LAST
};
-/* Data Path Network Interface API
+/**
+ * Data Path Network Interface API
* Contains initialization APIs and runtime control APIs for DPNI
*/
@@ -545,6 +562,8 @@ int dpni_reset(struct fsl_mc_io *mc_io, uint16_t token);
* @max_qos_entries: if 'max_tcs > 1', declares the maximum entries in QoS table
* @max_qos_key_size: Maximum key size for the QoS look-up
* @max_dist_key_size: Maximum key size for the distribution look-up
+ * @max_policers: Maximum number of policers;
+ * @max_congestion_ctrl: Maximum number of congestion control groups (CGs);
* @ipr_cfg: IP reassembly configuration
*/
struct dpni_attr {
@@ -559,7 +578,7 @@ struct dpni_attr {
uint16_t minor;
} version;
enum net_prot start_hdr;
- uint64_t options;
+ uint32_t options;
uint8_t max_senders;
uint8_t max_tcs;
uint8_t max_dist_per_tc[DPNI_MAX_TC];
@@ -569,8 +588,11 @@ struct dpni_attr {
uint8_t max_qos_entries;
uint8_t max_qos_key_size;
uint8_t max_dist_key_size;
+ uint8_t max_policers;
+ uint8_t max_congestion_ctrl;
struct dpni_ipr_cfg ipr_cfg;
};
+
/**
* dpni_get_attributes() - Retrieve DPNI attributes.
* @mc_io: Pointer to MC portal's I/O objec
@@ -634,6 +656,7 @@ struct dpni_buffer_layout {
int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io,
uint16_t token,
struct dpni_buffer_layout *layout);
+
/**
* dpni_set_rx_buffer_layout() - Set Rx buffer layout configuration.
* @mc_io: Pointer to MC portal's I/O object
@@ -661,19 +684,19 @@ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io,
struct dpni_buffer_layout *layout);
/**
- * @brief Set Tx buffer layout configuration.
- *
- * @param[in] mc_io Pointer to MC portal's I/O object
- * @param[in] token Token of DPNI object
- * @param[in] layout Buffer layout configuration
+ * dpni_set_tx_buffer_layout() - Set Tx buffer layout configuration.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPNI object
+ * @layout: Buffer layout configuration
*
- * @returns '0' on Success; Error code otherwise.
+ * Return: '0' on Success; Error code otherwise.
*
* @warning Allowed only when DPNI is disabled
*/
int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io,
uint16_t token,
const struct dpni_buffer_layout *layout);
+
/**
* dpni_get_tx_conf_buffer_layout() - Retrieve Tx confirmation buffer layout
* attributes.
@@ -686,6 +709,7 @@ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io,
int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,
uint16_t token,
struct dpni_buffer_layout *layout);
+
/**
* dpni_set_tx_conf_buffer_layout() - Set Tx confirmation buffer layout
* configuration.
@@ -700,15 +724,16 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,
int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io,
uint16_t token,
const struct dpni_buffer_layout *layout);
+
/**
- * dpni_get_spid() - Get the AIOP storage profile ID associated with the DPNI
+ * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used
+ * for enqueue operations
* @mc_io: Pointer to MC portal's I/O object
* @token: Token of DPNI object
- * @spid: Returned aiop storage-profile ID
+ * @qdid: Returned virtual QDID value that should be used as an argument
+ * in all enqueue operations
*
* Return: '0' on Success; Error code otherwise.
- *
- * @warning Only relevant for DPNI that belongs to AIOP container.
*/
int dpni_get_qdid(struct fsl_mc_io *mc_io, uint16_t token, uint16_t *qdid);
@@ -781,13 +806,23 @@ int dpni_set_counter(struct fsl_mc_io *mc_io,
uint16_t token,
enum dpni_counter counter,
uint64_t value);
+
+/* Enable auto-negotiation */
+#define DPNI_LINK_OPT_AUTONEG 0x0000000000000001ULL
+/* Enable half-duplex mode */
+#define DPNI_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
+/* Enable pause frames */
+#define DPNI_LINK_OPT_PAUSE 0x0000000000000004ULL
+/* Enable a-symmetric pause frames */
+#define DPNI_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
+
/**
* struct - Structure representing DPNI link configuration
* @rate: Rate
* @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
*/
struct dpni_link_cfg {
- uint64_t rate;
+ uint32_t rate;
uint64_t options;
};
@@ -801,7 +836,7 @@ struct dpni_link_cfg {
*/
int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
uint16_t token,
- struct dpni_link_cfg *cfg);
+ const struct dpni_link_cfg *cfg);
/**
* struct dpni_link_state - Structure representing DPNI link state
@@ -810,7 +845,7 @@ int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
* @up: Link state; '0' for down, '1' for up
*/
struct dpni_link_state {
- uint64_t rate;
+ uint32_t rate;
uint64_t options;
int up;
};
@@ -838,6 +873,7 @@ int dpni_get_link_state(struct fsl_mc_io *mc_io,
int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
uint16_t token,
const uint8_t mac_addr[6]);
+
/**
* dpni_get_primary_mac_addr() - Get the primary MAC address
* @mc_io: Pointer to MC portal's I/O object
@@ -849,6 +885,7 @@ int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
uint16_t token,
uint8_t mac_addr[6]);
+
/**
* dpni_add_mac_addr() - Add MAC address filter
* @mc_io: Pointer to MC portal's I/O object
@@ -875,7 +912,7 @@ int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
/**
* enum dpni_dest - DPNI destination types
- * DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and
+ * @DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and
* does not generate FQDAN notifications; user is expected to
* dequeue from the queue based on polling or other user-defined
* method
@@ -906,12 +943,69 @@ struct dpni_dest_cfg {
uint8_t priority;
};
+/**
+ * enum dpni_flc_type - DPNI FLC types
+ * @DPNI_FLC_USER_DEFINED: select the FLC to be used for user defined value
+ * @DPNI_FLC_STASH: select the FLC to be used for stash control
+ */
+enum dpni_flc_type {
+ DPNI_FLC_USER_DEFINED = 0,
+ DPNI_FLC_STASH = 1,
+};
+
+/**
+ * enum dpni_stash_size - DPNI FLC stashing size
+ * @DPNI_STASH_SIZE_0B: no stash
+ * @DPNI_STASH_SIZE_64B: stashes 64 bytes
+ * @DPNI_STASH_SIZE_128B: stashes 128 bytes
+ * @DPNI_STASH_SIZE_192B: stashes 192 bytes
+ */
+enum dpni_stash_size {
+ DPNI_STASH_SIZE_0B = 0,
+ DPNI_STASH_SIZE_64B = 1,
+ DPNI_STASH_SIZE_128B = 2,
+ DPNI_STASH_SIZE_192B = 3,
+};
+
+/* DPNI FLC stash options */
+
+/* stashes the whole annotation area (up to 192 bytes) */
+#define DPNI_FLC_STASH_FRAME_ANNOTATION 0x00000001
+
+/**
+ * struct dpni_flc_cfg - Structure representing DPNI FLC configuration
+ * @flc_type: FLC type
+ * @options: Mask of available options;
+ * use 'DPNI_FLC_STASH_<X>' values
+ * @frame_data_size: Size of frame data to be stashed
+ * @flow_context_size: Size of flow context to be stashed
+ * @flow_context: 1. In case flc_type is 'DPNI_FLC_USER_DEFINED':
+ * this value will be provided in the frame descriptor
+ * (FD[FLC])
+ * 2. In case flc_type is 'DPNI_FLC_STASH':
+ * this value will be I/O virtual address of the
+ * flow-context;
+ * Must be cacheline-aligned and DMA-able memory
+ */
+struct dpni_flc_cfg {
+ enum dpni_flc_type flc_type;
+ uint32_t options;
+ enum dpni_stash_size frame_data_size;
+ enum dpni_stash_size flow_context_size;
+ uint64_t flow_context;
+};
+
/* DPNI queue modification options */
/* Select to modify the user's context associated with the queue */
#define DPNI_QUEUE_OPT_USER_CTX 0x00000001
/* Select to modify the queue's destination */
#define DPNI_QUEUE_OPT_DEST 0x00000002
+/** Select to modify the flow-context parameters;
+ * not applicable for Tx-conf/Err queues as the FD comes from the user
+ */
+#define DPNI_QUEUE_OPT_FLC 0x00000004
+
/**
* struct dpni_queue_cfg - Structure representing queue configuration
@@ -922,11 +1016,17 @@ struct dpni_dest_cfg {
* is contained in 'options'
* @dest_cfg: Queue destination parameters;
* valid only if 'DPNI_QUEUE_OPT_DEST' is contained in 'options'
+ * @flc_cfg: Flow context configuration; in case the TC's distribution
+ * is either NONE or HASH the FLC's settings of flow#0 are used.
+ * in the case of FS (flow-steering) the flow's FLC settings
+ * are used.
+ * valid only if 'DPNI_QUEUE_OPT_FLC' is contained in 'options'
*/
struct dpni_queue_cfg {
uint32_t options;
uint64_t user_ctx;
struct dpni_dest_cfg dest_cfg;
+ struct dpni_flc_cfg flc_cfg;
};
/**
@@ -934,11 +1034,13 @@ struct dpni_queue_cfg {
* @user_ctx: User context value provided in the frame descriptor of each
* dequeued frame
* @dest_cfg: Queue destination configuration
+ * @flc_cfg: Flow context configuration
* @fqid: Virtual fqid value to be used for dequeue operations
*/
struct dpni_queue_attr {
uint64_t user_ctx;
struct dpni_dest_cfg dest_cfg;
+ struct dpni_flc_cfg flc_cfg;
uint32_t fqid;
};
diff --git a/include/fsl-mc/fsl_dprc.h b/include/fsl-mc/fsl_dprc.h
index f837e8926c..26a4598b61 100644
--- a/include/fsl-mc/fsl_dprc.h
+++ b/include/fsl-mc/fsl_dprc.h
@@ -10,7 +10,7 @@
#define _FSL_DPRC_H
/* DPRC Version */
-#define DPRC_VER_MAJOR 2
+#define DPRC_VER_MAJOR 4
#define DPRC_VER_MINOR 0
/* Command IDs */
@@ -88,6 +88,22 @@ do { \
MC_RSP_OP(cmd, 4, 40, 8, char, obj_desc->type[13]);\
MC_RSP_OP(cmd, 4, 48, 8, char, obj_desc->type[14]);\
MC_RSP_OP(cmd, 4, 56, 8, char, obj_desc->type[15]);\
+ MC_RSP_OP(cmd, 5, 0, 8, char, obj_desc->label[0]);\
+ MC_RSP_OP(cmd, 5, 8, 8, char, obj_desc->label[1]);\
+ MC_RSP_OP(cmd, 5, 16, 8, char, obj_desc->label[2]);\
+ MC_RSP_OP(cmd, 5, 24, 8, char, obj_desc->label[3]);\
+ MC_RSP_OP(cmd, 5, 32, 8, char, obj_desc->label[4]);\
+ MC_RSP_OP(cmd, 5, 40, 8, char, obj_desc->label[5]);\
+ MC_RSP_OP(cmd, 5, 48, 8, char, obj_desc->label[6]);\
+ MC_RSP_OP(cmd, 5, 56, 8, char, obj_desc->label[7]);\
+ MC_RSP_OP(cmd, 6, 0, 8, char, obj_desc->label[8]);\
+ MC_RSP_OP(cmd, 6, 8, 8, char, obj_desc->label[9]);\
+ MC_RSP_OP(cmd, 6, 16, 8, char, obj_desc->label[10]);\
+ MC_RSP_OP(cmd, 6, 24, 8, char, obj_desc->label[11]);\
+ MC_RSP_OP(cmd, 6, 32, 8, char, obj_desc->label[12]);\
+ MC_RSP_OP(cmd, 6, 40, 8, char, obj_desc->label[13]);\
+ MC_RSP_OP(cmd, 6, 48, 8, char, obj_desc->label[14]);\
+ MC_RSP_OP(cmd, 6, 56, 8, char, obj_desc->label[15]);\
} while (0)
/* cmd, param, offset, width, type, arg_name */
@@ -175,11 +191,33 @@ do { \
/* param, offset, width, type, arg_name */
#define DPRC_RSP_GET_OBJ_REGION(cmd, region_desc) \
do { \
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, region_desc->base_paddr);\
+ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, region_desc->base_offset);\
MC_RSP_OP(cmd, 2, 0, 32, uint32_t, region_desc->size); \
} while (0)
/* cmd, param, offset, width, type, arg_name */
+#define DPRC_CMD_SET_OBJ_LABEL(cmd, obj_index, label) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 32, int, obj_index); \
+ MC_CMD_OP(cmd, 1, 0, 8, char, label[0]);\
+ MC_CMD_OP(cmd, 1, 8, 8, char, label[1]);\
+ MC_CMD_OP(cmd, 1, 16, 8, char, label[2]);\
+ MC_CMD_OP(cmd, 1, 24, 8, char, label[3]);\
+ MC_CMD_OP(cmd, 1, 32, 8, char, label[4]);\
+ MC_CMD_OP(cmd, 1, 40, 8, char, label[5]);\
+ MC_CMD_OP(cmd, 1, 48, 8, char, label[6]);\
+ MC_CMD_OP(cmd, 1, 56, 8, char, label[7]);\
+ MC_CMD_OP(cmd, 2, 0, 8, char, label[8]);\
+ MC_CMD_OP(cmd, 2, 8, 8, char, label[9]);\
+ MC_CMD_OP(cmd, 2, 16, 8, char, label[10]);\
+ MC_CMD_OP(cmd, 2, 24, 8, char, label[11]);\
+ MC_CMD_OP(cmd, 2, 32, 8, char, label[12]);\
+ MC_CMD_OP(cmd, 2, 40, 8, char, label[13]);\
+ MC_CMD_OP(cmd, 2, 48, 8, char, label[14]);\
+ MC_CMD_OP(cmd, 2, 56, 8, char, label[15]);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
#define DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2) \
do { \
MC_CMD_OP(cmd, 0, 0, 32, int, endpoint1->id); \
@@ -294,6 +332,7 @@ do { \
/* Data Path Resource Container API
* Contains DPRC API for managing and querying DPAA resources
*/
+
struct fsl_mc_io;
/**
@@ -366,7 +405,7 @@ int dprc_close(struct fsl_mc_io *mc_io, uint16_t token);
/* Object initialization allowed - software context associated with this
* container is allowed to invoke object initialization operations.
*/
-#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004
+#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004
/* Topology change allowed - software context associated with this
* container is allowed to invoke topology operations, such as attach/detach
@@ -389,11 +428,13 @@ int dprc_close(struct fsl_mc_io *mc_io, uint16_t token);
* @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free
* portal ID is allocated by the DPRC
* @options: Combination of 'DPRC_CFG_OPT_<X>' options
+ * @label: Object's label
*/
struct dprc_cfg {
uint16_t icid;
int portal_id;
uint64_t options;
+ char label[16];
};
/**
@@ -484,6 +525,7 @@ int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count);
* @irq_count: Number of interrupts supported by the object
* @region_count: Number of mappable regions supported by the object
* @state: Object state: combination of DPRC_OBJ_STATE_ states
+ * @label: Object label
*/
struct dprc_obj_desc {
char type[16];
@@ -494,6 +536,7 @@ struct dprc_obj_desc {
uint8_t irq_count;
uint8_t region_count;
uint32_t state;
+ char label[16];
};
/**
@@ -516,8 +559,8 @@ int dprc_get_obj(struct fsl_mc_io *mc_io,
struct dprc_obj_desc *obj_desc);
/**
- * dprc_get_res_count() - Obtains the number of free resources that are assigned
- * to this container, by pool type
+ * dprc_get_res_count() - Obtains the number of free resources that are
+ * assigned to this container, by pool type
* @mc_io: Pointer to MC portal's I/O object
* @token: Token of DPRC object
* @type: pool type
@@ -574,11 +617,14 @@ int dprc_get_res_ids(struct fsl_mc_io *mc_io,
/**
* struct dprc_region_desc - Mappable region descriptor
- * @base_paddr: Region base physical address
+ * @base_offset: Region offset from region's base address.
+ * For DPMCP and DPRC objects, region base is offset from SoC MC portals
+ * base address; For DPIO, region base is offset from SoC QMan portals
+ * base address
* @size: Region size (in bytes)
*/
struct dprc_region_desc {
- uint64_t base_paddr;
+ uint64_t base_offset;
uint32_t size;
};
@@ -642,8 +688,8 @@ int dprc_disconnect(struct fsl_mc_io *mc_io,
/**
* dprc_get_connection() - Get connected endpoint and link status if connection
* exists.
-* @mc_io Pointer to MC portal's I/O object
-* @token Token of DPRC object
+* @mc_io Pointer to MC portal's I/O object
+* @token Token of DPRC object
* @endpoint1 Endpoint 1 configuration parameters
* @endpoint2 Returned endpoint 2 configuration parameters
* @state: Returned link state: 1 - link is up, 0 - link is down
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index ec244150e8..9106f25f68 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -21,12 +21,9 @@
#define GCR1_M2_DE_RST BIT(14)
#define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST)
#define GSR_FS_MASK 0x3fffffff
-#define MCFAPR_PL_MASK (0x1 << 18)
-#define MCFAPR_BMT_MASK (0x1 << 17)
-#define MCFAPR_BYPASS_ICID_MASK \
- (MCFAPR_PL_MASK | MCFAPR_BMT_MASK)
#define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000)
+#define SOC_QBMAN_PORTALS_BASE_ADDR ((void __iomem *)0x000818000000)
#define SOC_MC_PORTAL_STRIDE 0x10000
#define SOC_MC_PORTAL_ADDR(_portal_id) \
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 4099a74a4a..728503b62c 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -136,4 +136,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
unsigned int controller_number,
unsigned int dimm_number);
+void update_spd_address(unsigned int ctrl_num,
+ unsigned int slot,
+ unsigned int *addr);
#endif
generated by cgit (git 2.34.1) at 2024-12-25 02:01:05 +0000