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-rw-r--r--include/configs/k2g_evm.h6
-rw-r--r--include/configs/rk3036_common.h1
-rw-r--r--include/configs/rk3288_common.h1
-rw-r--r--include/configs/ti_armv7_keystone2.h4
-rw-r--r--include/dm/device.h13
-rw-r--r--include/dm/uclass-id.h4
-rw-r--r--include/dwmmc.h73
-rw-r--r--include/fdtdec.h8
-rw-r--r--include/mmc.h66
-rw-r--r--include/sdhci.h80
10 files changed, 243 insertions, 13 deletions
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index f8bba6710d..71b00378ff 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -73,4 +73,10 @@
#define CONFIG_SF_DEFAULT_BUS 1
#define CONFIG_SF_DEFAULT_CS 0
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_CADENCE_QSPI
+#define CONFIG_CQSPI_REF_CLK 384000000
+#define CONFIG_CQSPI_DECODER 0x0
+#endif
+
#endif /* __CONFIG_K2G_EVM_H */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 1bdcf9d024..ae4b101e44 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -45,7 +45,6 @@
/* MMC/SD IP block */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_DWMMC
#define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9d50d834db..8adc26fc8b 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -51,7 +51,6 @@
/* MMC/SD IP block */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_DWMMC
#define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 2ee26c4036..4aa262e1a8 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -89,6 +89,10 @@
#define CONFIG_SYS_SPI2
#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
#define CONFIG_SYS_SPI2_NUM_CS 4
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_SPI
+#undef CONFIG_DM_SPI_FLASH
+#endif
/* Network Configuration */
#define CONFIG_PHYLIB
diff --git a/include/dm/device.h b/include/dm/device.h
index f03bcd3b49..1bfcf3bcbc 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -467,6 +467,19 @@ fdt_addr_t dev_get_addr(struct udevice *dev);
void *dev_get_addr_ptr(struct udevice *dev);
/**
+ * dev_map_physmem() - Read device address from reg property of the
+ * device node and map the address into CPU address
+ * space.
+ *
+ * @dev: Pointer to device
+ * @size: size of the memory to map
+ *
+ * @return mapped address, or NULL if the device does not have reg
+ * property.
+ */
+void *dev_map_physmem(struct udevice *dev, unsigned long size);
+
+/**
* dev_get_addr_index() - Get the indexed reg property of a device
*
* @dev: Pointer to a device
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index b768660e85..c5cdfc79d1 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -33,7 +33,6 @@ enum uclass_id {
UCLASS_CROS_EC, /* Chrome OS EC */
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DMA, /* Direct Memory Access */
- UCLASS_RAM, /* RAM controller */
UCLASS_ETH, /* Ethernet device */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
UCLASS_I2C, /* I2C bus */
@@ -56,11 +55,12 @@ enum uclass_id {
UCLASS_PCH, /* x86 platform controller hub */
UCLASS_PCI, /* PCI bus */
UCLASS_PCI_GENERIC, /* Generic PCI bus device */
- UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
UCLASS_PINCONFIG, /* Pin configuration node device */
+ UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
UCLASS_PMIC, /* PMIC I/O device */
UCLASS_PWM, /* Pulse-width modulator */
UCLASS_PWRSEQ, /* Power sequence device */
+ UCLASS_RAM, /* RAM controller */
UCLASS_REGULATOR, /* Regulator device */
UCLASS_REMOTEPROC, /* Remote Processor device */
UCLASS_RESET, /* Reset controller device */
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 335af51fdf..6aebe96b97 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -224,9 +224,82 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg)
return readb(host->ioaddr + reg);
}
+#ifdef CONFIG_BLK
+/**
+ * dwmci_setup_cfg() - Set up the configuration for DWMMC
+ *
+ * This is used to set up a DWMMC device when you are using CONFIG_BLK.
+ *
+ * This should be called from your MMC driver's probe() method once you have
+ * the information required.
+ *
+ * Generally your driver will have a platform data structure which holds both
+ * the configuration (struct mmc_config) and the MMC device info (struct mmc).
+ * For example:
+ *
+ * struct rockchip_mmc_plat {
+ * struct mmc_config cfg;
+ * struct mmc mmc;
+ * };
+ *
+ * ...
+ *
+ * Inside U_BOOT_DRIVER():
+ * .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
+ *
+ * To access platform data:
+ * struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
+ *
+ * See rockchip_dw_mmc.c for an example.
+ *
+ * @cfg: Configuration structure to fill in (generally &plat->mmc)
+ * @name: Device name (normally dev->name)
+ * @buswidth: Bus width (in bits, such as 4 or 8)
+ * @caps: Host capabilities (MMC_MODE_...)
+ * @max_clk: Maximum supported clock speed in HZ (e.g. 400000)
+ * @min_clk: Minimum supported clock speed in HZ (e.g. 150000000)
+ */
void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
uint caps, u32 max_clk, u32 min_clk);
+
+/**
+ * dwmci_bind() - Set up a new MMC block device
+ *
+ * This is used to set up a DWMMC block device when you are using CONFIG_BLK.
+ * It should be called from your driver's bind() method.
+ *
+ * See rockchip_dw_mmc.c for an example.
+ *
+ * @dev: Device to set up
+ * @mmc: Pointer to mmc structure (normally &plat->mmc)
+ * @cfg: Empty configuration structure (generally &plat->cfg). This is
+ * normally all zeroes at this point. The only purpose of passing
+ * this in is to set mmc->cfg to it.
+ * @return 0 if OK, -ve if the block device could not be created
+ */
int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
+#else
+/**
+ * add_dwmci() - Add a new DWMMC interface
+ *
+ * This is used when you are not using CONFIG_BLK. Convert your driver over!
+ *
+ * @host: DWMMC host structure
+ * @max_clk: Maximum supported clock speed in HZ (e.g. 400000)
+ * @min_clk: Minimum supported clock speed in HZ (e.g. 150000000)
+ * @return 0 if OK, -ve on error
+ */
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
+#endif /* !CONFIG_BLK */
+
+#ifdef CONFIG_DM_MMC_OPS
+/* Export the operations to drivers */
+int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data);
+int dwmci_set_ios(struct udevice *dev);
+int dwmci_probe(struct udevice *dev);
+extern const struct dm_mmc_ops dm_dwmci_ops;
+#endif
+
#endif /* __DWMMC_HW_H */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 05d70c4b9b..151c590ed1 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -134,13 +134,10 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound Codec */
- COMPAT_GOOGLE_CROS_EC_KEYB, /* Google CROS_EC Keyboard */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
- COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
- COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */
COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
@@ -149,14 +146,9 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */
COMPAT_INTEL_MICROCODE, /* Intel microcode update */
- COMPAT_INTEL_PANTHERPOINT_AHCI, /* Intel Pantherpoint AHCI */
- COMPAT_INTEL_MODEL_206AX, /* Intel Model 206AX CPU */
- COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
- COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */
COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
- COMPAT_INTEL_PCH, /* Intel PCH */
COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */
COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */
COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */
diff --git a/include/mmc.h b/include/mmc.h
index f383925ade..8f309f1f71 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -323,6 +323,58 @@ struct mmc_data {
/* forward decl. */
struct mmc;
+#ifdef CONFIG_DM_MMC_OPS
+struct dm_mmc_ops {
+ /**
+ * send_cmd() - Send a command to the MMC device
+ *
+ * @dev: Device to receive the command
+ * @cmd: Command to send
+ * @data: Additional data to send/receive
+ * @return 0 if OK, -ve on error
+ */
+ int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data);
+
+ /**
+ * set_ios() - Set the I/O speed/width for an MMC device
+ *
+ * @dev: Device to update
+ * @return 0 if OK, -ve on error
+ */
+ int (*set_ios)(struct udevice *dev);
+
+ /**
+ * get_cd() - See whether a card is present
+ *
+ * @dev: Device to check
+ * @return 0 if not present, 1 if present, -ve on error
+ */
+ int (*get_cd)(struct udevice *dev);
+
+ /**
+ * get_wp() - See whether a card has write-protect enabled
+ *
+ * @dev: Device to check
+ * @return 0 if write-enabled, 1 if write-protected, -ve on error
+ */
+ int (*get_wp)(struct udevice *dev);
+};
+
+#define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
+
+int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data);
+int dm_mmc_set_ios(struct udevice *dev);
+int dm_mmc_get_cd(struct udevice *dev);
+int dm_mmc_get_wp(struct udevice *dev);
+
+/* Transition functions for compatibility */
+int mmc_set_ios(struct mmc *mmc);
+int mmc_getcd(struct mmc *mmc);
+int mmc_getwp(struct mmc *mmc);
+
+#else
struct mmc_ops {
int (*send_cmd)(struct mmc *mmc,
struct mmc_cmd *cmd, struct mmc_data *data);
@@ -331,10 +383,13 @@ struct mmc_ops {
int (*getcd)(struct mmc *mmc);
int (*getwp)(struct mmc *mmc);
};
+#endif
struct mmc_config {
const char *name;
+#ifndef CONFIG_DM_MMC_OPS
const struct mmc_ops *ops;
+#endif
uint host_caps;
uint voltages;
uint f_min;
@@ -343,7 +398,12 @@ struct mmc_config {
unsigned char part_type;
};
-/* TODO struct mmc should be in mmc_private but it's hard to fix right now */
+/*
+ * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
+ * with mmc_get_mmc_dev().
+ *
+ * TODO struct mmc should be in mmc_private but it's hard to fix right now
+ */
struct mmc {
#ifndef CONFIG_BLK
struct list_head link;
@@ -446,10 +506,14 @@ void print_mmc_devices(char separator);
int get_mmc_num(void);
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
enum mmc_hwpart_conf_mode mode);
+
+#ifndef CONFIG_DM_MMC_OPS
int mmc_getcd(struct mmc *mmc);
int board_mmc_getcd(struct mmc *mmc);
int mmc_getwp(struct mmc *mmc);
int board_mmc_getwp(struct mmc *mmc);
+#endif
+
int mmc_set_dsr(struct mmc *mmc, u16 val);
/* Function to change the size of boot partition and rpmb partitions */
int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
diff --git a/include/sdhci.h b/include/sdhci.h
index e0f66670b6..c4d3b552d1 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -338,5 +338,85 @@ static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
}
#endif
+#ifdef CONFIG_BLK
+/**
+ * sdhci_setup_cfg() - Set up the configuration for DWMMC
+ *
+ * This is used to set up an SDHCI device when you are using CONFIG_BLK.
+ *
+ * This should be called from your MMC driver's probe() method once you have
+ * the information required.
+ *
+ * Generally your driver will have a platform data structure which holds both
+ * the configuration (struct mmc_config) and the MMC device info (struct mmc).
+ * For example:
+ *
+ * struct msm_sdhc_plat {
+ * struct mmc_config cfg;
+ * struct mmc mmc;
+ * };
+ *
+ * ...
+ *
+ * Inside U_BOOT_DRIVER():
+ * .platdata_auto_alloc_size = sizeof(struct msm_sdhc_plat),
+ *
+ * To access platform data:
+ * struct msm_sdhc_plat *plat = dev_get_platdata(dev);
+ *
+ * See msm_sdhci.c for an example.
+ *
+ * @cfg: Configuration structure to fill in (generally &plat->mmc)
+ * @name: Device name (normally dev->name)
+ * @buswidth: Bus width (in bits, such as 4 or 8)
+ * @caps: Host capabilities (MMC_MODE_...)
+ * @max_clk: Maximum supported clock speed in HZ (0 for default)
+ * @min_clk: Minimum supported clock speed in HZ (0 for default)
+ * @version: Host controller version (generally read from the
+ * SDHCI_HOST_VERSION register)
+ * @quirks: Quick flags (SDHCI_QUIRK_...)
+ * @host_caps: Additional host capabilities (0 if none)
+ */
+int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
+ uint caps, u32 max_clk, u32 min_clk, uint version,
+ uint quirks, uint host_caps);
+
+/**
+ * sdhci_bind() - Set up a new MMC block device
+ *
+ * This is used to set up an SDHCI block device when you are using CONFIG_BLK.
+ * It should be called from your driver's bind() method.
+ *
+ * See msm_sdhci.c for an example.
+ *
+ * @dev: Device to set up
+ * @mmc: Pointer to mmc structure (normally &plat->mmc)
+ * @cfg: Empty configuration structure (generally &plat->cfg). This is
+ * normally all zeroes at this point. The only purpose of passing
+ * this in is to set mmc->cfg to it.
+ * @return 0 if OK, -ve if the block device could not be created
+ */
+int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
+#else
+
+/**
+ * add_sdhci() - Add a new SDHCI interface
+ *
+ * This is used when you are not using CONFIG_BLK. Convert your driver over!
+ *
+ * @host: SDHCI host structure
+ * @max_clk: Maximum supported clock speed in HZ (0 for default)
+ * @min_clk: Minimum supported clock speed in HZ (0 for default)
+ * @return 0 if OK, -ve on error
+ */
int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk);
+#endif /* !CONFIG_BLK */
+
+#ifdef CONFIG_DM_MMC_OPS
+/* Export the operations to drivers */
+int sdhci_probe(struct udevice *dev);
+extern const struct dm_mmc_ops sdhci_ops;
+#else
+#endif
+
#endif /* __SDHCI_HW_H */