diff options
Diffstat (limited to 'include')
60 files changed, 963 insertions, 316 deletions
diff --git a/include/command.h b/include/command.h index 461b17447c..2e24e8ad3e 100644 --- a/include/command.h +++ b/include/command.h @@ -139,6 +139,14 @@ extern int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] extern unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, char * const argv[]); + +#if defined(CONFIG_CMD_NVEDIT_EFI) +extern int do_env_print_efi(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]); +extern int do_env_set_efi(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]); +#endif + /* * Error codes that commands return to cmd_process(). We use the standard 0 * and 1 for success and failure, but add one more case - failure with a diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index eb50012ff7..300f56541e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -71,6 +71,7 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index d61fdf9f7a..70aa425060 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -35,11 +35,22 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK +#ifdef CONFIG_SPL_DFU +#ifndef CONFIG_SPL_BUILD #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_EMMC \ DFU_ALT_INFO_RAM \ + DFU_ALT_INFO_QSPI +#else +#undef CONFIG_CMD_BOOTD +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_RAM +#endif +#endif #include <configs/ti_omap5_common.h> diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 667d084611..1d296ba51a 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -14,15 +14,10 @@ #define CONFIG_ARCH_MISC_INIT -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* SD/MMC support */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ @@ -32,9 +27,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - /* PCI host support */ #undef CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 646086a956..77a5968cc2 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -12,28 +12,18 @@ #include "tegra30-common.h" -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* PCI host support */ - /* PCI networking support */ #define CONFIG_E1000_NO_NVM diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 73629ddeb0..a11a800a71 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -22,9 +22,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_BEAVER -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -36,15 +33,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index f78a4e10a9..601b30dffd 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -24,17 +24,7 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_POWER_TPS65217 - #define CONFIG_MACH_TYPE 3589 -/* I2C IP block */ -#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000 - -/* MMC/SD IP block */ -#define CONFIG_SUPPORT_EMMC_BOOT - -/* Always 64 KiB env size */ -#define CONFIG_ENV_SIZE (64 << 10) #ifndef CONFIG_SPL_BUILD @@ -80,13 +70,11 @@ BUR_COMMON_ENV \ /* USB configuration */ #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_HOST -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST +/* Environment */ #define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index dcb66a6f9a..6b2553c73b 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -26,9 +26,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_CARDHU -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -40,15 +37,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 14008440da..74305f1b6e 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -22,9 +22,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -35,15 +32,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 4a18c72a53..6c4e9d4154 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -10,8 +10,6 @@ #include "tegra20-common.h" -/* High-level configuration options */ - /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_SDIO1 @@ -19,15 +17,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_TEGRA2 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 - -/* USB networking support */ - /* General networking support */ #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 1536 @@ -40,8 +29,6 @@ #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* Dynamic MTD partition support */ - /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define CONFIG_ENV_OFFSET (SZ_2M) #undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 908b3bde3e..7ece00e646 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -20,20 +20,12 @@ #define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T30 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ CONFIG_TDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - /* General networking support */ #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 16352 diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 9a8b5a7357..9b25a9d59d 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -19,9 +19,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DALMORE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -32,13 +29,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h index dd7a01290a..30c0c7fee7 100644 --- a/include/configs/e2220-1170.h +++ b/include/configs/e2220-1170.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/harmony.h b/include/configs/harmony.h index fc5ed5b2fd..f873cea265 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -29,16 +29,9 @@ #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* Dynamic MTD partition support */ - /* Environment in NAND (which is 512M), aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 003cd75baf..60c6bde16e 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -81,8 +81,10 @@ "initrd_high=0xffffffffffffffff\0" \ BOOTENV -/* Preserve environment on sd card */ +/* Preserve environment on eMMC */ #define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* Use eMMC */ +#define CONFIG_SYS_MMC_ENV_PART 2 /* Use Boot1 partition */ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 93fcdd6bcc..7b2c7947e9 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -31,15 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 324dba2b7e..9bbf34883e 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -6,7 +6,6 @@ #ifndef __LS1012A_COMMON_H #define __LS1012A_COMMON_H -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/config.h> diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 49b014181e..662b573ed9 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -26,7 +26,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/stream_id_lsch2.h> @@ -209,7 +208,7 @@ */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) -#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4a08) +#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4A00) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH #define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 @@ -255,6 +254,8 @@ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernel_addr_r=0x81000000\0" \ + "kernel_start=0x1000000\0" \ + "kernelheader_start=0x800000\0" \ "fdt_addr_r=0x90000000\0" \ "load_addr=0xa0000000\0" \ "kernelheader_addr=0x60800000\0" \ @@ -306,6 +307,12 @@ "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" \ + "nand_bootcmd=echo Trying load from NAND..;" \ + "nand info; nand read $load_addr " \ + "$kernel_start $kernel_size; env exists secureboot " \ + "&& nand read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ "sd_bootcmd=echo Trying load from SD ..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd && " \ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 6e36c9339b..0266681c52 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -26,7 +26,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 #include <asm/arch/config.h> diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 95e6786e6c..b663937d8c 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -21,7 +21,6 @@ #endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 235a757f75..0a6c90dc8b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -8,9 +8,7 @@ #define __LS2_COMMON_H #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV3 -#define CONFIG_FSL_TZPC_BP147 #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h new file mode 100644 index 0000000000..4b5608b5a3 --- /dev/null +++ b/include/configs/lx2160a_common.h @@ -0,0 +1,289 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __LX2_COMMON_H +#define __LX2_COMMON_H + +#include <asm/arch/stream_id_lsch3.h> +#include <asm/arch/config.h> +#include <asm/arch/soc.h> + +#define CONFIG_REMAKE_ELF +#define CONFIG_FSL_LAYERSCAPE +#define CONFIG_GICV3 +#define CONFIG_FSL_TZPC_BP147 +#define CONFIG_FSL_MEMAC + +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_FLASH_BASE 0x20000000 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F 1 + +/* DDR */ +#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL +#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2 +#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL +#define CONFIG_DDR_SPD +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS1 0x51 +#define SPD_EEPROM_ADDRESS2 0x52 +#define SPD_EEPROM_ADDRESS3 0x53 +#define SPD_EEPROM_ADDRESS4 0x54 +#define SPD_EEPROM_ADDRESS5 0x55 +#define SPD_EEPROM_ADDRESS6 0x56 +#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 +#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ +#define CONFIG_DIMM_SLOTS_PER_CTLR 2 +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 +#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ +#define CONFIG_SYS_MONITOR_LEN (936 * 1024) + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) + +/* SMP Definitinos */ +#define CPU_RELEASE_ADDR secondary_boot_func + +/* Generic Timer Definitions */ +/* + * This is not an accurate number. It is used in start.S. The frequency + * will be udpated later when get_bus_freq(0) is available. + */ + +#define COUNTER_FREQUENCY 25000000 /* 25MHz */ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) + +/* Serial Port */ +#define CONFIG_PL01X_SERIAL +#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) +#define CONFIG_SYS_SERIAL0 0x21c0000 +#define CONFIG_SYS_SERIAL1 0x21d0000 +#define CONFIG_SYS_SERIAL2 0x21e0000 +#define CONFIG_SYS_SERIAL3 0x21f0000 +/*below might needs to be removed*/ +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2, \ + (void *)CONFIG_SYS_SERIAL3 } +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* MC firmware */ +#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 +#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 +#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 +#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 + +/* Define phy_reset function to boot the MC based on mcinitcmd. + * This happens late enough to properly fixup u-boot env MAC addresses. + */ +#define CONFIG_RESET_PHY_R + +/* + * Carve out a DDR region which will not be used by u-boot/Linux + * + * It will be used by MC and Debug Server. The MC region must be + * 512MB aligned, so the min size to hide is 512MB. + */ +#ifdef CONFIG_FSL_MC_ENET +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#endif + +/* I2C bus multiplexer */ +#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ +#define I2C_MUX_CH_DEFAULT 0x8 + +/* RTC */ +#define RTC +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Qixis */ +#define CONFIG_FSL_QIXIS +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 + +/* PCI */ +#ifdef CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT +#define CONFIG_PCI_SCAN_SHOW +#endif + +/* MMC */ +#ifdef CONFIG_MMC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#endif + +/* SATA */ + +#ifdef CONFIG_SCSI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 +#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#endif + +/* USB */ +#ifdef CONFIG_USB +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + +/* FlexSPI */ +#ifdef CONFIG_NXP_FSPI +#define NXP_FSPI_FLASH_SIZE SZ_64M +#define NXP_FSPI_FLASH_NUM 1 +#endif + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(void); +unsigned long get_board_ddr_clk(void); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() +#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) + +#define CONFIG_HWCONFIG +#define HWCONFIG_BUFFER_SIZE 128 + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x500000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ + CONFIG_ENV_OFFSET) + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_MAXARGS 64 /* max command args */ + +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +/* Initial environment variables */ +#define XSPI_MC_INIT_CMD \ + "env exists secureboot && " \ + "esbc_validate 0x20700000 && " \ + "esbc_validate 0x20740000 ;" \ + "fsl_mc start mc 0x20a00000 0x20e00000\0" + +#define SD_MC_INIT_CMD \ + "mmc read 0x80000000 0x5000 0x800;" \ + "mmc read 0x80100000 0x7000 0x800;" \ + "env exists secureboot && " \ + "mmc read 0x80700000 0x3800 0x10 && " \ + "mmc read 0x80740000 0x3A00 0x10 && " \ + "esbc_validate 0x80700000 && " \ + "esbc_validate 0x80740000 ;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" + +#define EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "ramdisk_addr=0x800000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_start=0x1000000\0" \ + "kernelheader_start=0x7C0000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "kernelheader_size=0x40000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernelhdr_addr_sd=0x3E00\0" \ + "kernel_size_sd=0x1d000\0" \ + "kernelhdr_size_sd=0x10\0" \ + "console=ttyAMA0,38400n8\0" \ + BOOTENV \ + "mcmemsize=0x70000000\0" \ + XSPI_MC_INIT_CMD \ + "boot_scripts=lx2160ardb_boot.scr\0" \ + "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" + +#define XSPI_NOR_BOOTCOMMAND \ + "env exists mcinitcmd && env exists secureboot "\ + "&& esbc_validate 0x20780000; " \ + "env exists mcinitcmd && " \ + "fsl_mc lazyapply dpl 0x20d00000; " \ + "run distro_bootcmd;run xspi_bootcmd; " \ + "env exists secureboot && esbc_halt;" + +#define SD_BOOTCOMMAND \ + "env exists mcinitcmd && mmcinfo; " \ + "mmc read 0x80001000 0x6800 0x800; " \ + "env exists mcinitcmd && env exists secureboot " \ + " && mmc read 0x80780000 0x3C00 0x10 " \ + "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + "&& fsl_mc lazyapply dpl 0x80001000;" \ + "run distro_bootcmd;run sd_bootcmd;" \ + "env exists secureboot && esbc_halt;" + +#define BOOT_TARGET_DEVICES(func) \ + func(USB, usb, 0) \ + func(MMC, mmc, 0) \ + func(SCSI, scsi, 0) +#include <config_distro_bootcmd.h> + +#endif /* __LX2_COMMON_H */ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h new file mode 100644 index 0000000000..662e601f0f --- /dev/null +++ b/include/configs/lx2160aqds.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + */ + +#ifndef __LX2_QDS_H +#define __LX2_QDS_H + +#include "lx2160a_common.h" + +/* Qixis */ +#define QIXIS_XMAP_MASK 0x07 +#define QIXIS_XMAP_SHIFT 5 +#define QIXIS_RST_CTL_RESET_EN 0x30 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0xff +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SD +#define QIXIS_RCW_SRC_SD 0x08 +#define NON_EXTENDED_DUTCFG +#define QIXIS_SDID_MASK 0x07 +#define QIXIS_ESDHC_NO_ADAPTER 0x7 + +/* SYSCLK */ +#define QIXIS_SYSCLK_100 0x0 +#define QIXIS_SYSCLK_125 0x1 +#define QIXIS_SYSCLK_133 0x2 + +/* DDRCLK */ +#define QIXIS_DDRCLK_100 0x0 +#define QIXIS_DDRCLK_125 0x1 +#define QIXIS_DDRCLK_133 0x2 + +#define BRDCFG4_EMI1SEL_MASK 0xF8 +#define BRDCFG4_EMI1SEL_SHIFT 3 +#define BRDCFG4_EMI2SEL_MASK 0x07 +#define BRDCFG4_EMI2SEL_SHIFT 0 + +/* VID */ + +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "lx2160aqds_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed*/ +#define VDD_MV_MIN 775 +#define VDD_MV_MAX 925 + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 +#define PWM_CHANNEL0 0x0 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* RTC */ +#define CONFIG_SYS_RTC_BUS_NUM 0 +#define I2C_MUX_CH_RTC 0xB + +/* + * MMC + */ +#ifdef CONFIG_MMC +#ifndef __ASSEMBLY__ +u8 qixis_esdhc_detect_quirk(void); +#endif +#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk() +#endif + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" + +#define AQ_PHY_ADDR1 0x00 +#define AQ_PHY_ADDR2 0x01 +#define AQ_PHY_ADDR3 0x02 +#define AQ_PHY_ADDR4 0x03 + +#define CORTINA_NO_FW_UPLOAD +#define CORTINA_PHY_ADDR1 0x0 + +#define INPHI_PHY_ADDR1 0x0 +#define INPHI_PHY_ADDR2 0x1 + +#define RGMII_PHY_ADDR1 0x01 +#define RGMII_PHY_ADDR2 0x02 + +#define SGMII_CARD_PORT1_PHY_ADDR 0x1C +#define SGMII_CARD_PORT2_PHY_ADDR 0x1D +#define SGMII_CARD_PORT3_PHY_ADDR 0x1E +#define SGMII_CARD_PORT4_PHY_ADDR 0x1F + +#endif + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "lx2160aqds_vdd_mv=800\0" \ + "BOARD=lx2160aqds\0" \ + "xspi_bootcmd=echo Trying load from flexspi..;" \ + "sf probe 0:0 && sf read $load_addr " \ + "$kernel_start $kernel_size ; env exists secureboot &&" \ + "sf read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$BOARD\0" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_QDS_H */ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h new file mode 100644 index 0000000000..972bb5e102 --- /dev/null +++ b/include/configs/lx2160ardb.h @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __LX2_RDB_H +#define __LX2_RDB_H + +#include "lx2160a_common.h" + +/* Qixis */ +#define QIXIS_XMAP_MASK 0x07 +#define QIXIS_XMAP_SHIFT 5 +#define QIXIS_RST_CTL_RESET_EN 0x30 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0xff +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SD +#define QIXIS_RCW_SRC_SD 0x08 +#define NON_EXTENDED_DUTCFG + +/* VID */ + +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed*/ +#define VDD_MV_MIN 775 +#define VDD_MV_MAX 855 + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 +#define PWM_CHANNEL0 0x0 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* RTC */ +#define CONFIG_SYS_RTC_BUS_NUM 4 + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC1@xgmii" + +#define AQR107_PHY_ADDR1 0x04 +#define AQR107_PHY_ADDR2 0x05 + +#define CORTINA_NO_FW_UPLOAD +#define CORTINA_PHY_ADDR1 0x0 +#define INPHI_PHY_ADDR1 0x0 + +#define RGMII_PHY_ADDR1 0x01 +#define RGMII_PHY_ADDR2 0x02 + +#endif + +/* EMC2305 */ +#define I2C_MUX_CH_EMC2305 0x09 +#define I2C_EMC2305_ADDR 0x4D +#define I2C_EMC2305_CMD 0x40 +#define I2C_EMC2305_PWM 0x80 + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "lx2160ardb_vdd_mv=800\0" \ + "BOARD=lx2160ardb\0" \ + "xspi_bootcmd=echo Trying load from flexspi..;" \ + "sf probe 0:0 && sf read $load_addr " \ + "$kernel_start $kernel_size ; env exists secureboot &&" \ + "sf read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + " bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$BOARD\0" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_RDB_H */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index b290df5891..d212a7f680 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -25,11 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index dd76829e91..933f84028f 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -34,15 +31,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - -#define CONFIG_KEYBOARD - #undef CONFIG_LOADADDR #define CONFIG_LOADADDR 0x82408000 diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index 6654a1b4df..59866997e3 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 0e37511daf..c97b226027 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -17,9 +17,6 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -30,15 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 1daf49a453..4920896e9c 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -18,9 +18,6 @@ #define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -31,13 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB2.0 Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index cfe8d8cbed..e546c1d73f 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -13,16 +13,11 @@ /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) -/* PCI host support */ - #define BOARD_EXTRA_ENV_SETTINGS \ "calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \ "ramdisk_addr_r\0" \ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 447f99af68..b76958c36d 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -26,11 +26,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 125a1f1f43..43856bad2c 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -25,13 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index b8d02f0397..5df013b0b3 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -26,23 +26,11 @@ #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* Enable keyboard */ -#define CONFIG_TEGRA_KEYBOARD -#define CONFIG_KEYBOARD - /* NAND support */ #define CONFIG_TEGRA_NAND diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h new file mode 100644 index 0000000000..7007b5f6af --- /dev/null +++ b/include/configs/sifive-fu540.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel <anup.patel@wdc.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) + +#define CONFIG_SYS_MALLOC_LEN SZ_8M + +#define CONFIG_SYS_BOOTM_LEN SZ_16M + +#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 + +/* Environment options */ +#define CONFIG_ENV_SIZE SZ_4K + +#define BOOT_TARGET_DEVICES(func) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_addr_r=0x80600000\0" \ + "fdt_addr_r=0x82200000\0" \ + "scriptaddr=0x82300000\0" \ + "pxefile_addr_r=0x82400000\0" \ + "ramdisk_addr_r=0x82500000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index dd3e026b14..85914ec695 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -16,9 +16,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -30,13 +27,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - /* Tag support */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/tec.h b/include/configs/tec.h index a40212190a..907c8d5e23 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -25,11 +25,6 @@ /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ -/* USB host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index d37e2d79d3..84f671d00c 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -39,15 +39,9 @@ */ #define CONFIG_SYS_MMC_MAX_DEVICE 4 -/* - * select serial console configuration - */ - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -/* turn on command-line edit/hist/auto */ - /* * Increasing the size of the IO buffer as default nfsargs size is more * than 256 and so it is not possible to edit it diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index ccfc516a82..1aa4412645 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -15,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -36,13 +36,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -50,8 +50,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index b275f795a3..3530684164 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -17,7 +17,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -38,13 +38,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -52,8 +52,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 7f0a5292c2..e58477e289 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x02800000 /* 40MB */ +#define CONFIG_STACKBASE 0x03800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -37,13 +37,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x01000000 @@ -51,8 +51,8 @@ "scriptaddr=0x10000000\0" \ "pxefile_addr_r=0x10100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x02000000\0" \ - "ramdisk_addr_r=0x02100000\0" + "fdt_addr_r=0x03000000\0" \ + "ramdisk_addr_r=0x03100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x00108000 @@ -78,7 +78,7 @@ * parameter, the default (2) causes occasional Data Buffer Errors in OUT * packets depending on the buffer address and size. */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 10 +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #define CONFIG_EHCI_IS_TDI #define CONFIG_SYS_NAND_SELF_INIT diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 16b962db64..1c533118ad 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -14,10 +14,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/*----------------------------------------------------------------------- - * Physical Memory Map - */ - /* Generic Interrupt Controller */ #define CONFIG_GICV2 diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 70964a90ce..2d8948d9d9 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -16,11 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /* * Memory layout for where various images get loaded by boot scripts: @@ -37,13 +33,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -51,8 +47,8 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 427da1c1c2..4b1eb7b1c8 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -23,9 +23,6 @@ /* SPI */ #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in SPI */ #define CONFIG_ENV_SPI_MAX_HZ 48000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 @@ -33,15 +30,6 @@ /* 1MiB flash, environment located as high as possible */ #define CONFIG_ENV_OFFSET (SZ_1M - CONFIG_ENV_SIZE) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* PCI host support */ - -/* General networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 95d6452553..1e509ce9ad 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -124,8 +124,6 @@ "third_image=u-boot.bin\0" #endif -#define CONFIG_PREBOOT "env exist ${bootdev}preboot && run ${bootdev}preboot" - #define CONFIG_ROOTPATH "/nfs/root/path" #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs $bootargs root=/dev/nfs rw " \ diff --git a/include/configs/venice2.h b/include/configs/venice2.h index e542187efc..a86ae212f2 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* I2C */ -#define CONFIG_SYS_I2C_TEGRA - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 @@ -31,13 +28,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - -/* General networking support */ - #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 3f9db3303f..09f90db1f5 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -24,11 +24,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2 -/* USB Host support */ -#define CONFIG_USB_EHCI_TEGRA - -/* USB networking support */ - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index f3bafb3c63..86e59781b0 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -106,7 +106,7 @@ enum uclass_id { UCLASS_VIRTIO, /* VirtIO transport device */ UCLASS_W1, /* Dallas 1-Wire bus */ UCLASS_W1_EEPROM, /* one-wire EEPROMs */ - UCLASS_WDT, /* Watchdot Timer driver */ + UCLASS_WDT, /* Watchdog Timer driver */ UCLASS_COUNT, UCLASS_INVALID = -1, diff --git a/include/dt-bindings/clk/sifive-fu540-prci.h b/include/dt-bindings/clk/sifive-fu540-prci.h new file mode 100644 index 0000000000..531523ea62 --- /dev/null +++ b/include/dt-bindings/clk/sifive-fu540-prci.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Copyright (C) 2018 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __LINUX_CLK_SIFIVE_FU540_PRCI_H +#define __LINUX_CLK_SIFIVE_FU540_PRCI_H + +/* Clock indexes for use by Device Tree data */ + +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + +#endif diff --git a/include/dt-bindings/sound/azalia.h b/include/dt-bindings/sound/azalia.h new file mode 100644 index 0000000000..10ace3ef56 --- /dev/null +++ b/include/dt-bindings/sound/azalia.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Intel HDA audio codec config. This is a mechanicm to configure codecs when + * using Intel HDA audio. + * + * Copyright 2018 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __AZALIA_H +#define __AZALIA_H + +#define AZALIA_CODEC_SHIFT 28 +#define AZALIA_NID_SHIFT 20 +#define AZALIA_VERB_SHIFT 8 + +/* Supported opcodes */ +#define AZALIA_OPCODE_CONFIG_DEFAULT 0x71c +#define AZALIA_OPCODE_IMPL_ID 0x720 +#define AZALIA_OPCODE_READ_PARAM 0xf00 + +#define AZALIA_PARAM_VENDOR_ID 0 + +/* Generate the register value to write a particular byte of a 32-bit value */ +#define AZALIA_SET_BYTE(codec, nid, opcode, val, byte) \ + ((codec) << AZALIA_CODEC_SHIFT | \ + (nid) << AZALIA_NID_SHIFT | \ + ((opcode) + (byte)) << AZALIA_VERB_SHIFT | \ + (((val) >> ((byte) * 8)) & 0xff)) + +/* Generate the register value to write all bytes of a 32-bit value */ +#define AZALIA_WORD(codec, nid, opcode, val) \ + (AZALIA_SET_BYTE(codec, nid, opcode, val, 0) | \ + AZALIA_SET_BYTE(codec, nid, opcode, val, 1) | \ + AZALIA_SET_BYTE(codec, nid, opcode, val, 2) | \ + AZALIA_SET_BYTE(codec, nid, opcode, val, 3)) + +#define AZALIA_PIN_CFG(codec, nid, val) \ + AZALIA_WORD(codec, nid, AZALIA_OPCODE_CONFIG_DEFAULT, val) + +#define AZALIA_SUBVENDOR(codec, val) \ + AZALIA_WORD(codec, 1, AZALIA_OPCODE_IMPL_ID, val) + +#endif /* __AZALIA_H */ diff --git a/include/dwmmc.h b/include/dwmmc.h index 4ceda5e43c..f06720dc0d 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -130,6 +130,13 @@ /* UHS register */ #define DWMCI_DDR_MODE (1 << 16) +/* Internal IDMAC interrupt defines */ +#define DWMCI_IDINTEN_RI BIT(1) +#define DWMCI_IDINTEN_TI BIT(0) + +#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \ + DWMCI_IDINTEN_RI) + /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) diff --git a/include/efi_api.h b/include/efi_api.h index 45ca05e8ac..ccf608653d 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -1438,4 +1438,13 @@ struct efi_unicode_collation_protocol { char *supported_languages; }; +/* Boot manager load options */ +#define LOAD_OPTION_ACTIVE 0x00000001 +#define LOAD_OPTION_FORCE_RECONNECT 0x00000002 +#define LOAD_OPTION_HIDDEN 0x00000008 +/* All values 0x00000200-0x00001F00 are reserved */ +#define LOAD_OPTION_CATEGORY 0x00001F00 +#define LOAD_OPTION_CATEGORY_BOOT 0x00000000 +#define LOAD_OPTION_CATEGORY_APP 0x00000100 + #endif diff --git a/include/efi_loader.h b/include/efi_loader.h index 9dd933dae7..512880ab8f 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -301,8 +301,8 @@ efi_status_t efi_set_watchdog(unsigned long timeout); /* Called from places to check whether a timer expired */ void efi_timer_check(void); /* PE loader implementation */ -void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, - struct efi_loaded_image *loaded_image_info); +efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, + struct efi_loaded_image *loaded_image_info); /* Called once to store the pristine gd pointer */ void efi_save_gd(void); /* Special case handler for error/abort that just tries to dtrt to get @@ -320,6 +320,10 @@ efi_status_t efi_create_handle(efi_handle_t *handle); void efi_delete_handle(efi_handle_t obj); /* Call this to validate a handle and find the EFI object for it */ struct efi_object *efi_search_obj(const efi_handle_t handle); +/* Start image */ +efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, + efi_uintn_t *exit_data_size, + u16 **exit_data); /* Find a protocol on a handle */ efi_status_t efi_search_protocol(const efi_handle_t handle, const efi_guid_t *protocol_guid, @@ -397,7 +401,7 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path, struct efi_loaded_image_obj **handle_ptr, struct efi_loaded_image **info_ptr); efi_status_t efi_load_image_from_path(struct efi_device_path *file_path, - void **buffer); + void **buffer, efi_uintn_t *size); /* Print information about all loaded images */ void efi_print_image_infos(void *pc); diff --git a/include/hda_codec.h b/include/hda_codec.h new file mode 100644 index 0000000000..56de571f0f --- /dev/null +++ b/include/hda_codec.h @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Support for Intel High-Definition Audio codec + * + * Copyright 2018 Google LLC + * + * Taken from coreboot file of the same name + */ + +#ifndef __HDA_CODEC_H_ +#define __HDA_CODEC_H_ + +struct hda_regs; + +/** + * struct hda_codec_priv - Private data required by the HDA codec + * + * @regs: HDA registers + * @beep_nid: Node ID of beep node (>0) + */ +struct hda_codec_priv { + struct hda_regs *regs; + uint beep_nid; +}; + +/** + * hda_wait_for_ready() - Wait for the codec to indicate it is ready + * + * @regs: HDA registers + * @return 0 if OK -ETIMEDOUT if codec did not respond in time + */ +int hda_wait_for_ready(struct hda_regs *regs); + +/** + * hda_wait_for_valid() - Wait for the codec to accept the last command + * + * @regs: HDA registers + * @return 0 if OK -ETIMEDOUT if codec did not respond in time + */ +int hda_wait_for_valid(struct hda_regs *regs); + +/** + * hda_codec_detect() - Detect which codecs are present + * + * @regs: HDA registers + * @return bit mask of active codecs (0 if none) + * @return 0 if OK, -ve on error + */ +int hda_codec_detect(struct hda_regs *regs); + +/** + * hda_codecs_init() - Init all codecs + * + * @dev: Sound device + * @regs: HDA registers + * @codec_mask: Mask of codecs to init (bits 3:0) + * @return 0 if OK, -ve on error + */ +int hda_codecs_init(struct udevice *dev, struct hda_regs *regs, u32 codec_mask); + +/** + * hda_codec_start_beep() - Start beeping + * + * This tells the sound hardware to start a beep. It will continue until stopped + * by sound_stop_beep(). + * + * @dev: Sound device + * @frequency_hz: Beep frequency in hertz + * @return if OK, -ve on error + */ +int hda_codec_start_beep(struct udevice *dev, int frequency_hz); + +/** + * hda_codec_stop_beep() - Stop beeping + * + * This tells the sound hardware to stop a previously started beep. + * + * @dev: Sound device + * @return if OK, -ve on error + */ +int hda_codec_stop_beep(struct udevice *dev); + +/** + * hda_codec_init() - Set up the HDA codec base address + * + * This should be called at the start of the probe() method. + * + * @dev: Sound device + * @return 0 if OK, -ve on error + */ +int hda_codec_init(struct udevice *dev); + +/** + * hda_codec_finish_init() - Finish setting up the HDA codec base address + * + * This should be called at the end of the probe() method. + * + * @dev: Sound device + * @return 0 if OK, -ve on error + */ +int hda_codec_finish_init(struct udevice *dev); + +#endif /* __HDA_CODEC_H_ */ diff --git a/include/log.h b/include/log.h index d7f6471006..7566ba7f2d 100644 --- a/include/log.h +++ b/include/log.h @@ -14,7 +14,7 @@ /** Log levels supported, ranging from most to least important */ enum log_level_t { - LOGL_EMERG = 0, /*U-Boot is unstable */ + LOGL_EMERG = 0, /* U-Boot is unstable */ LOGL_ALERT, /* Action must be taken immediately */ LOGL_CRIT, /* Critical conditions */ LOGL_ERR, /* Error that prevents something from working */ @@ -111,11 +111,16 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #endif #if CONFIG_IS_ENABLED(LOG) +#ifdef LOG_DEBUG +#define _LOG_DEBUG 1 +#else +#define _LOG_DEBUG 0 +#endif /* Emit a log record if the level is less that the maximum */ #define log(_cat, _level, _fmt, _args...) ({ \ int _l = _level; \ - if (CONFIG_IS_ENABLED(LOG) && _l <= _LOG_MAX_LEVEL) \ + if (CONFIG_IS_ENABLED(LOG) && (_l <= _LOG_MAX_LEVEL || _LOG_DEBUG)) \ _log((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \ __func__, \ pr_fmt(_fmt), ##_args); \ diff --git a/include/mmc.h b/include/mmc.h index d84e4fca73..1f30f71d25 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -690,6 +690,12 @@ int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \ + CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ + CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) +int mmc_deinit(struct mmc *mmc); +#endif + /** * mmc_of_parse() - Parse the device tree to get the capabilities of the host * diff --git a/include/pch.h b/include/pch.h index 73994b8343..046a5fde3a 100644 --- a/include/pch.h +++ b/include/pch.h @@ -11,7 +11,23 @@ #define BIOS_CTRL_BIOSWE BIT(0) -/* Operations for the Platform Controller Hub */ +/* All the supported PCH ioctls */ +enum pch_req_t { + /* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */ + PCH_REQ_HDA_CONFIG, + + PCH_REQ_TEST1, /* Test requests for sandbox driver */ + PCH_REQ_TEST2, + PCH_REQ_TEST3, + + PCH_REQ_COUNT, /* Number of ioctrls supported */ +}; + +/** + * struct pch_ops - Operations for the Platform Controller Hub + * + * Consider using ioctl() to add rarely used or driver-specific operations. + */ struct pch_ops { /** * get_spi_base() - get the address of SPI base @@ -49,6 +65,23 @@ struct pch_ops { * @return 0 if OK, -ve on error (e.g. there is no IO base) */ int (*get_io_base)(struct udevice *dev, u32 *iobasep); + + /** + * ioctl() - perform misc read/write operations + * + * This is a catch-all operation intended to avoid adding lots of + * methods to this uclass, of which few are commonly used. Uncommon + * operations that pertain only to a few devices in this uclass should + * use this method instead of adding new methods. + * + * @dev: PCH device to check + * @req: PCH request ID + * @data: Input/output data + * @size: Size of input data (and maximum size of output data) + * @return size of output data on sucesss, -ve on error + */ + int (*ioctl)(struct udevice *dev, enum pch_req_t req, void *data, + int size); }; #define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops) @@ -90,4 +123,20 @@ int pch_get_gpio_base(struct udevice *dev, u32 *gbasep); */ int pch_get_io_base(struct udevice *dev, u32 *iobasep); +/** + * pch_ioctl() - perform misc read/write operations + * + * This is a catch-all operation intended to avoid adding lots of + * methods to this uclass, of which few are commonly used. Uncommon + * operations that pertain only to a few devices in this uclass should + * use this method instead of adding new methods. + * + * @dev: PCH device to check + * @req: PCH request ID + * @data: Input/output data + * @size: Size of input data (and maximum size of output data) + * @return size of output data on sucesss, -ve on error + */ +int pch_ioctl(struct udevice *dev, ulong req, void *data, int size); + #endif diff --git a/include/pci.h b/include/pci.h index 041f8e3747..936cfe975c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -735,12 +735,6 @@ extern pci_dev_t pci_find_device (unsigned int vendor, unsigned int device, int extern pci_dev_t pci_find_devices (struct pci_device_id *ids, int index); pci_dev_t pci_find_class(unsigned int find_class, int index); -extern int pci_hose_config_device(struct pci_controller *hose, - pci_dev_t dev, - unsigned long io, - pci_addr_t mem, - unsigned long command); - extern int pci_hose_find_capability(struct pci_controller *hose, pci_dev_t dev, int cap); extern int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev, @@ -828,7 +822,7 @@ struct udevice; * * Every device on a PCI bus has this per-child data. * - * It can be accessed using dev_get_parent_priv(dev) if dev->parent is a + * It can be accessed using dev_get_parent_platdata(dev) if dev->parent is a * PCI bus (i.e. UCLASS_PCI) * * @devfn: Encoded device and function index - see PCI_DEVFN() diff --git a/include/pci_ids.h b/include/pci_ids.h index fdda679cc0..bd59578ccb 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -41,6 +41,7 @@ #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 #define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 +#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 #define PCI_BASE_CLASS_MEMORY 0x05 @@ -1363,6 +1364,7 @@ #define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 #define PCI_DEVICE_ID_CREATIVE_20K1 0x0005 #define PCI_DEVICE_ID_CREATIVE_20K2 0x000b +#define PCI_DEVICE_ID_CREATIVE_CA01322 0x0011 #define PCI_SUBDEVICE_ID_CREATIVE_SB0760 0x0024 #define PCI_SUBDEVICE_ID_CREATIVE_SB08801 0x0041 #define PCI_SUBDEVICE_ID_CREATIVE_SB08802 0x0042 @@ -2827,6 +2829,7 @@ #define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd #define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de #define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_HDMI 0x2806 #define PCI_DEVICE_ID_INTEL_ICH8_0 0x2810 #define PCI_DEVICE_ID_INTEL_ICH8_1 0x2811 #define PCI_DEVICE_ID_INTEL_ICH8_2 0x2812 @@ -3025,6 +3028,8 @@ #define PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI 0x9c03 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC 0x9c45 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI 0x9c83 +#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_HDA 0x9ca0 +#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_ADSP 0x9cb6 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LPC 0x9cc3 #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 diff --git a/include/sound.h b/include/sound.h index b7959cc260..47de9fa3ed 100644 --- a/include/sound.h +++ b/include/sound.h @@ -54,7 +54,7 @@ void sound_create_square_wave(uint sample_rate, unsigned short *data, int size, /* Operations for sound */ struct sound_ops { /** - * setup() - Set up to play a sound + * setup() - Set up to play a sound (optional) */ int (*setup)(struct udevice *dev); @@ -67,6 +67,28 @@ struct sound_ops { * @return 0 if OK, -ve on error */ int (*play)(struct udevice *dev, void *data, uint data_size); + + /** + * start_beep() - Start beeping (optional) + * + * This tells the sound hardware to start a beep. It will continue until + * stopped by sound_stop_beep(). + * + * @dev: Sound device + * @frequency_hz: Beep frequency in hertz + * @return if OK, -ENOSYS if not supported, -ve on error + */ + int (*start_beep)(struct udevice *dev, int frequency_hz); + + /** + * stop_beep() - Stop beeping (optional) + * + * This tells the sound hardware to stop a previously started beep. + * + * @dev: Sound device + * @return if OK, -ve on error + */ + int (*stop_beep)(struct udevice *dev); }; #define sound_get_ops(dev) ((struct sound_ops *)(dev)->driver->ops) @@ -87,6 +109,28 @@ int sound_setup(struct udevice *dev); int sound_beep(struct udevice *dev, int msecs, int frequency_hz); /** + * sound_start_beep() - Start beeping + * + * This tells the sound hardware to start a beep. It will continue until stopped + * by sound_stop_beep(). + * + * @dev: Sound device + * @frequency_hz: Beep frequency in hertz + * @return if OK, -ve on error + */ +int sound_start_beep(struct udevice *dev, int frequency_hz); + +/** + * sound_stop_beep() - Stop beeping + * + * This tells the sound hardware to stop a previously started beep. + * + * @dev: Sound device + * @return if OK, -ve on error + */ +int sound_stop_beep(struct udevice *dev); + +/** * sound_find_codec_i2s() - Called by sound drivers to locate codec and i2s * * This finds the audio codec and i2s devices and puts them in the uclass's diff --git a/include/spl.h b/include/spl.h index c82f2fd033..f09909e189 100644 --- a/include/spl.h +++ b/include/spl.h @@ -74,6 +74,11 @@ struct spl_image_info { u32 size; u32 flags; void *arg; +#ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK + ulong dcrc_data; + ulong dcrc_length; + ulong dcrc; +#endif }; /* |