diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/sam9x60ek.h | 95 | ||||
| -rw-r--r-- | include/configs/sama5d27_wlsom1_ek.h | 46 | ||||
| -rw-r--r-- | include/efi_api.h | 7 | ||||
| -rw-r--r-- | include/nvme.h | 12 |
4 files changed, 160 insertions, 0 deletions
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h new file mode 100644 index 0000000000..5f89ae4a51 --- /dev/null +++ b/include/configs/sam9x60ek.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuation settings for the SAM9X60EK board. + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com> + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT + +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID 0 /* ignored in arm */ + +/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE + +/* + * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) + * NB: in this case, USB 1.1 devices won't be recognized. + */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_MASK_ALE BIT(21) +#define CONFIG_SYS_NAND_MASK_CLE BIT(22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 +#define CONFIG_SYS_NAND_ONFI_DETECTION + +#define CONFIG_MTD_DEVICE +#endif + +/* PMECC & PMERRLOC */ +#define CONFIG_ATMEL_NAND_HWECC +#define CONFIG_ATMEL_NAND_HW_PMECC +#define CONFIG_PMECC_CAP 8 +#define CONFIG_PMECC_SECTOR_SIZE 512 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#ifdef CONFIG_SD_BOOT +/* bootstrap + u-boot + env + linux in sd card */ +#define CONFIG_BOOTCOMMAND \ + "fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;" \ + "fatload mmc 0:1 0x22000000 zImage;" \ + "bootz 0x22000000 - 0x21000000" + +#elif defined(CONFIG_NAND_BOOT) +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_BOOTCOMMAND "nand read " \ + "0x22000000 0x200000 0x600000; " \ + "nand read 0x21000000 0x180000 0x20000; " \ + "bootz 0x22000000 - 0x21000000" + +#elif defined(CONFIG_QSPI_BOOT) +/* bootstrap + u-boot + env + linux in SPI NOR flash */ +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x21000000 0x180000 0x80000; " \ + "sf read 0x22000000 0x200000 0x600000; " \ + "bootz 0x22000000 - 0x21000000" +#endif + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) + +#endif diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h new file mode 100644 index 0000000000..6bcbc06020 --- /dev/null +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA5D27 WLSOM1 EK Board. + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "at91-sama5_common.h" + +#undef CONFIG_SYS_AT91_MAIN_CLOCK +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_INIT_SP_ADDR 0x218000 +#else +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#endif + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* SPL */ +#define CONFIG_SPL_TEXT_BASE 0x200000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_BSS_START_ADDR 0x20000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 + +#define CONFIG_SYS_MONITOR_LEN (512 << 10) + +#ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#endif + +#endif diff --git a/include/efi_api.h b/include/efi_api.h index 37e56da460..22396172e1 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -422,6 +422,7 @@ struct efi_device_path_acpi_path { # define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05 # define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR 0x0b # define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS 0x0f +# define DEVICE_PATH_SUB_TYPE_MSG_NVME 0x17 # define DEVICE_PATH_SUB_TYPE_MSG_SD 0x1a # define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d @@ -464,6 +465,12 @@ struct efi_device_path_sd_mmc_path { u8 slot_number; } __packed; +struct efi_device_path_nvme { + struct efi_device_path dp; + u32 ns_id; + u8 eui64[8]; +} __packed; + #define DEVICE_PATH_TYPE_MEDIA_DEVICE 0x04 # define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH 0x01 # define DEVICE_PATH_SUB_TYPE_CDROM_PATH 0x02 diff --git a/include/nvme.h b/include/nvme.h index 2c3d14d241..2cdf8ce320 100644 --- a/include/nvme.h +++ b/include/nvme.h @@ -78,4 +78,16 @@ int nvme_scan_namespace(void); */ int nvme_print_info(struct udevice *udev); +/** + * nvme_get_namespace_id - return namespace identifier + * + * This returns the namespace identifier. + * + * @udev: NVMe controller device + * @ns_id: Place where to put the name space identifier + * @eui64: Place where to put the IEEE Extended Unique Identifier + * @return: 0 on success, -ve on error + */ +int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64); + #endif /* __NVME_H__ */ |