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-rw-r--r--include/atmel_lcd.h9
-rw-r--r--include/configs/bfin_adi_common.h5
-rw-r--r--include/configs/ge_bx50v3.h41
-rw-r--r--include/configs/gw_ventana.h42
-rw-r--r--include/configs/ls2080a_common.h11
-rw-r--r--include/configs/ls2080a_simu.h7
-rw-r--r--include/configs/ls2080aqds.h43
-rw-r--r--include/configs/mx6_common.h3
-rw-r--r--include/configs/mx7_common.h3
-rw-r--r--include/configs/omap3_cairo.h2
-rw-r--r--include/configs/snapper9g45.h155
-rw-r--r--include/configs/stm32f429-discovery.h2
-rw-r--r--include/configs/sunxi-common.h5
-rw-r--r--include/configs/ti_armv7_keystone2.h1
-rw-r--r--include/configs/ts4800.h19
-rw-r--r--include/dt-bindings/clock/at91.h23
-rw-r--r--include/dt-bindings/dma/at91.h52
-rw-r--r--include/dt-bindings/pinctrl/at91.h40
-rw-r--r--include/i2c.h3
-rw-r--r--include/linux/compat.h2
20 files changed, 405 insertions, 63 deletions
diff --git a/include/atmel_lcd.h b/include/atmel_lcd.h
index 6993128b1b..8a2f46f6c7 100644
--- a/include/atmel_lcd.h
+++ b/include/atmel_lcd.h
@@ -10,6 +10,15 @@
#ifndef _ATMEL_LCD_H_
#define _ATMEL_LCD_H_
+/**
+ * struct atmel_lcd_platdata - platform data for Atmel LCDs with driver model
+ *
+ * @timing_index: Index of LCD timing to use in device tree node
+ */
+struct atmel_lcd_platdata {
+ int timing_index;
+};
+
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 13076072e4..502ddad96b 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -97,11 +97,6 @@
/*
* Env Settings
*/
-#ifndef CONFIG_BOOTDELAY
-# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
-# else
-# endif
-#endif
#ifndef CONFIG_BOOTCOMMAND
# define CONFIG_BOOTCOMMAND "run ramboot"
#endif
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 42771b51d4..4de2460bc0 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -59,13 +59,14 @@
#define CONFIG_MXC_OCOTP
/* SATA Configs */
-#define CONFIG_CMD_SATA
+#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
+#endif
/* MMC Configs */
#define CONFIG_FSL_ESDHC
@@ -77,6 +78,7 @@
#define CONFIG_DOS_PARTITION
/* USB Configs */
+#ifdef CONFIG_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
@@ -98,8 +100,10 @@
#define CONFIG_G_DNL_VENDOR_NUM 0x0525
#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
#define CONFIG_G_DNL_MANUFACTURER "Advantech"
+#endif
/* Networking Configs */
+#ifdef CONFIG_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -108,6 +112,7 @@
#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
+#endif
/* Serial Flash */
#ifdef CONFIG_CMD_SF
@@ -220,29 +225,37 @@
"bootm; " \
"fi;\0" \
-#define CONFIG_BOOTCOMMAND \
- "usb start; " \
- "setenv dev usb; " \
- "setenv devnum 0; " \
- "setenv rootdev sda1; " \
- "run tryboot; " \
- \
+#define CONFIG_MMCBOOTCOMMAND \
"setenv dev mmc; " \
- "setenv rootdev mmcblk0p1; " \
+ "setenv rootdev mmcblk0p${partnum}; " \
\
"setenv devnum ${sddev}; " \
"if mmc dev ${devnum}; then " \
"run tryboot; " \
- "setenv rootdev mmcblk1p1; " \
+ "setenv rootdev mmcblk1p${partnum}; " \
"fi; " \
\
"setenv devnum ${emmcdev}; " \
"if mmc dev ${devnum}; then " \
"run tryboot; " \
"fi; " \
+
+#define CONFIG_USBBOOTCOMMAND \
+ "usb start; " \
+ "setenv dev usb; " \
+ "setenv devnum 0; " \
+ "setenv rootdev sda${partnum}; " \
+ "run tryboot; " \
\
+ CONFIG_MMCBOOTCOMMAND \
"bmode usb; " \
+#ifdef CONFIG_CMD_USB
+#define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
+#else
+#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
+#endif
+
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
@@ -292,13 +305,14 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+
/* Framebuffer */
-#define CONFIG_VIDEO
+#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
@@ -308,6 +322,7 @@
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
+#endif
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index e11629cc55..982ddba39c 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -18,7 +18,6 @@
/* Falcon Mode */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_OS_BOOT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
@@ -33,6 +32,7 @@
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#include "mx6_common.h"
+#undef CONFIG_SPL_EXT_SUPPORT
#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
@@ -52,9 +52,6 @@
#define CONFIG_DM_THERMAL
#endif
-/* GPIO */
-#define CONFIG_MXC_GPIO
-
/* Thermal */
#define CONFIG_IMX_THERMAL
@@ -204,6 +201,7 @@
/* Miscellaneous configurable options */
#define CONFIG_HWCONFIG
+#define CONFIG_PREBOOT
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -284,37 +282,45 @@
\
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
+ "disk=0\0" \
+ "part=1\0" \
\
"fdt_high=0xffffffff\0" \
"fdt_addr=0x18000000\0" \
"initrd_high=0xffffffff\0" \
+ "fixfdt=" \
+ "fdt addr ${fdt_addr}\0" \
"bootdir=boot\0" \
"loadfdt=" \
"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
+ "run fixfdt; " \
"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
+ "run fixfdt; " \
"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
+ "run fixfdt; " \
"fi\0" \
\
+ "fs=ext4\0" \
"script=6x_bootscript-ventana\0" \
"loadscript=" \
"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
- "source; " \
+ "source ${loadaddr}; " \
"fi\0" \
\
"uimage=uImage\0" \
- "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
+ "mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
"mmc_boot=" \
- "setenv fsload 'ext2load mmc 0:1'; " \
- "mmc dev 0 && mmc rescan && " \
+ "setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
+ "mmc dev ${disk} && mmc rescan && " \
"setenv dtype mmc; run loadscript; " \
"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
"setenv bootargs console=${console},${baudrate} " \
- "root=/dev/mmcblk0p1 rootfstype=ext4 " \
+ "root=/dev/mmcblk0p1 rootfstype=${fs} " \
"rootwait rw ${video} ${extra}; " \
- "if run loadfdt && fdt addr ${fdt_addr}; then " \
+ "if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"bootm; " \
@@ -322,26 +328,28 @@
"fi\0" \
\
"sata_boot=" \
- "setenv fsload 'ext2load sata 0:1'; sata init && " \
+ "setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
+ "sata init && " \
"setenv dtype sata; run loadscript; " \
"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
"setenv bootargs console=${console},${baudrate} " \
- "root=/dev/sda1 rootfstype=ext4 " \
+ "root=/dev/sda1 rootfstype=${fs} " \
"rootwait rw ${video} ${extra}; " \
- "if run loadfdt && fdt addr ${fdt_addr}; then " \
+ "if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"bootm; " \
"fi; " \
"fi\0" \
"usb_boot=" \
- "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
+ "setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
+ "usb start && usb dev ${disk} && " \
"setenv dtype usb; run loadscript; " \
"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
"setenv bootargs console=${console},${baudrate} " \
- "root=/dev/sda1 rootfstype=ext4 " \
+ "root=/dev/sda1 rootfstype=${fs} " \
"rootwait rw ${video} ${extra}; " \
- "if run loadfdt && fdt addr ${fdt_addr}; then " \
+ "if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"bootm; " \
@@ -404,7 +412,7 @@
"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
"setenv bootargs console=${console},${baudrate} " \
"root=${root} ${video} ${extra}; " \
- "if run loadfdt && fdt addr ${fdt_addr}; then " \
+ "if run loadfdt; then " \
"ubifsumount; " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 2bf524f69a..ebe1415421 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -29,11 +29,13 @@
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
/* Link Definitions */
+#ifndef CONFIG_QSPI_BOOT
#ifdef CONFIG_SPL
#define CONFIG_SYS_TEXT_BASE 0x80400000
#else
#define CONFIG_SYS_TEXT_BASE 0x30100000
#endif
+#endif
#ifdef CONFIG_EMU
#define CONFIG_SYS_NO_FLASH
@@ -138,13 +140,6 @@
#define CONFIG_SYS_FLASH1_BASE_PHYS 0xC0000000
#define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000
-#ifndef CONFIG_SYS_NO_FLASH
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-#define CONFIG_SYS_FLASH_QUIET_TEST
-#endif
-
#ifndef __ASSEMBLY__
unsigned long long get_qixis_addr(void);
#endif
@@ -289,7 +284,7 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h
index 7563aafbc6..7f245b5fad 100644
--- a/include/configs/ls2080a_simu.h
+++ b/include/configs/ls2080a_simu.h
@@ -30,6 +30,13 @@
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
+#ifndef CONFIG_SYS_NO_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#endif
+
/*
* NOR Flash Timing Params
*/
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b44066c407..df1455bef3 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_FSL_CLK
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_QIXIS_I2C_ACCESS
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_SYS_I2C_IFDR_DIV 0x7e
+#endif
+
+#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
@@ -162,11 +172,13 @@ unsigned long get_board_ddr_clk(void);
#define QIXIS_LBMAP_DFLTBANK 0x00
#define QIXIS_LBMAP_ALTBANK 0x04
#define QIXIS_LBMAP_NAND 0x09
+#define QIXIS_LBMAP_QSPI 0x0f
#define QIXIS_RST_CTL_RESET 0x31
#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
#define QIXIS_RCW_SRC_NAND 0x107
+#define QIXIS_RCW_SRC_QSPI 0x62
#define QIXIS_RST_FORCE_MEM 0x01
#define CONFIG_SYS_CSPR3_EXT (0x0)
@@ -227,7 +239,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024)
-#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024)
#else
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
@@ -257,11 +269,19 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
+#if defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_TEXT_BASE 0x20010000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
+#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#else
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x2000
#endif
+#endif
/* Debug Server firmware */
#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
@@ -279,8 +299,27 @@ unsigned long get_board_ddr_clk(void);
#define I2C_MUX_CH_DEFAULT 0x8
/* SPI */
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_EON
+#endif
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_SPI_FLASH_SPANSION
+#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */
+#define FSL_QSPI_FLASH_NUM 4
+#endif
+/*
+ * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
+ * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
+ * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
+ */
+#define FSL_QIXIS_BRDCFG9_QSPI 0x1
+
#endif
/*
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 27f38f497e..fb49322f3b 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -59,9 +59,6 @@
#endif
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#ifndef CONFIG_BOOTDELAY
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 5e5656d480..fbc6de6283 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -34,9 +34,6 @@
#define CONFIG_LOADADDR 0x80800000
#define CONFIG_SYS_TEXT_BASE 0x87800000
-#ifndef CONFIG_BOOTDELAY
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index 96c3c4b958..82e0d5000c 100644
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -73,8 +73,6 @@
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
-/* override default CONFIG_BOOTDELAY */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"machid=ffffffff\0" \
"fdt_high=0x87000000\0" \
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
new file mode 100644
index 0000000000..ddfbcec980
--- /dev/null
+++ b/include/configs/snapper9g45.h
@@ -0,0 +1,155 @@
+/*
+ * Bluewater Systems Snapper 9G45 module
+ *
+ * (C) Copyright 2011 Bluewater Systems
+ * Author: Andre Renaud <andre@bluewatersys.com>
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* SoC type is defined in boards.cfg */
+#include <asm/hardware.h>
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_TEXT_BASE 0x73f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
+
+/* CPU */
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
+#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */
+#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
+/* Mem test settings */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
+
+/* NAND Flash */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT 20
+#define CONFIG_RESET_PHY_R
+#define CONFIG_AT91_WANTS_COMMON_PHY
+#define CONFIG_TFTP_PORT
+#define CONFIG_TFTP_TSIZE
+
+/* USB */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_USB_STORAGE
+#define CONFIG_PARTITION_UUIDS
+
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+
+/* LCD */
+#define CONFIG_ATMEL_LCD
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_GURNARD_SPLASH
+
+#define CONFIG_ATMEL_SPI
+
+/* GPIOs and IO expander */
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP 1
+
+/* UARTs/Serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_BAUDRATE 115200
+
+/* Boot options */
+#define CONFIG_SYS_LOAD_ADDR 0x23000000
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Environment settings */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET (512 << 10)
+#define CONFIG_ENV_SIZE (256 << 10)
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "ethaddr=00:00:00:00:00:00\0" \
+ "serial=0\0" \
+ "stdout=serial_atmel\0" \
+ "stderr=serial_atmel\0" \
+ "stdin=serial_atmel\0" \
+ "bootlimit=3\0" \
+ "loadaddr=0x71000000\0" \
+ "board_rev=2\0" \
+ "bootfile=/tftpboot/uImage\0" \
+ "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
+ "nfsroot=/export/root\0" \
+ "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
+ "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
+ "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
+ "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
+ "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
+ "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
+ "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
+
+/* Console settings */
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+
+/* U-Boot memory settings */
+#define CONFIG_SYS_MALLOC_LEN (1 << 20)
+
+/* Command line configuration */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PART
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index 8bbe580ebf..f05c1aacaf 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -82,8 +82,6 @@
"bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
"bootm 0x08044000 - 0x08042000\0"
-#define CONFIG_AUTOBOOT
-
/*
* Command line configuration.
*/
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b33cfb86f8..94275a7183 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -100,7 +100,7 @@
* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
+#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */
#else
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
@@ -213,8 +213,7 @@
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-/* FIXME: 40 KiB instead of 32 KiB ? */
-#define LOW_LEVEL_SRAM_STACK 0x00018000
+#define LOW_LEVEL_SRAM_STACK 0x0001A000
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#else
/* end of 32 KiB in sram */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 707106ffab..2ee26c4036 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -245,7 +245,6 @@
"tftp_root=/\0" \
"nfs_root=/export\0" \
"mem_lpae=1\0" \
- "mem_reserve=512M\0" \
"addr_ubi=0x82000000\0" \
"addr_secdb_key=0xc000000\0" \
"name_kern=zImage\0" \
diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index 8b4726f19c..252b3fc706 100644
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -62,6 +62,8 @@
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
+
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
@@ -95,19 +97,28 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
- "image=uImage\0" \
+ "image=zImage\0" \
+ "fdt_file=imx51-ts4800.dtb\0" \
+ "fdt_addr=0x90fe0000\0" \
"mmcdev=0\0" \
- "mmcpart=1\0" \
- "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \
+ "mmcpart=2\0" \
+ "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcargs=setenv bootargs root=${mmcroot}\0" \
"addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs addtty; " \
- "bootm; "
+ "if run loadfdt; then " \
+ "bootz ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "echo ERR: cannot load FDT; " \
+ "fi; "
+
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
new file mode 100644
index 0000000000..ab3ee241d1
--- /dev/null
+++ b/include/dt-bindings/clock/at91.h
@@ -0,0 +1,23 @@
+/*
+ * This header provides constants for AT91 pmc status.
+ *
+ * The constants defined in this header are being used in dts.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AT91_H
+#define _DT_BINDINGS_CLK_AT91_H
+
+#define AT91_PMC_MOSCS 0 /* MOSCS Flag */
+#define AT91_PMC_LOCKA 1 /* PLLA Lock */
+#define AT91_PMC_LOCKB 2 /* PLLB Lock */
+#define AT91_PMC_MCKRDY 3 /* Master Clock */
+#define AT91_PMC_LOCKU 6 /* UPLL Lock */
+#define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
+#define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */
+#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */
+#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */
+#define AT91_PMC_GCKRDY 24 /* Generated Clocks */
+
+#endif
diff --git a/include/dt-bindings/dma/at91.h b/include/dt-bindings/dma/at91.h
new file mode 100644
index 0000000000..ab6cbba454
--- /dev/null
+++ b/include/dt-bindings/dma/at91.h
@@ -0,0 +1,52 @@
+/*
+ * This header provides macros for at91 dma bindings.
+ *
+ * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_DMA_H__
+#define __DT_BINDINGS_AT91_DMA_H__
+
+/* ---------- HDMAC ---------- */
+
+/*
+ * Source and/or destination peripheral ID
+ */
+#define AT91_DMA_CFG_PER_ID_MASK (0xff)
+#define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK)
+
+/*
+ * FIFO configuration: it defines when a request is serviced.
+ */
+#define AT91_DMA_CFG_FIFOCFG_OFFSET (8)
+#define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
+#define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */
+#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */
+#define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */
+
+
+/* ---------- XDMAC ---------- */
+#define AT91_XDMAC_DT_MEM_IF_MASK (0x1)
+#define AT91_XDMAC_DT_MEM_IF_OFFSET (13)
+#define AT91_XDMAC_DT_MEM_IF(mem_if) (((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \
+ << AT91_XDMAC_DT_MEM_IF_OFFSET)
+#define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
+ & AT91_XDMAC_DT_MEM_IF_MASK)
+
+#define AT91_XDMAC_DT_PER_IF_MASK (0x1)
+#define AT91_XDMAC_DT_PER_IF_OFFSET (14)
+#define AT91_XDMAC_DT_PER_IF(per_if) (((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \
+ << AT91_XDMAC_DT_PER_IF_OFFSET)
+#define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
+ & AT91_XDMAC_DT_PER_IF_MASK)
+
+#define AT91_XDMAC_DT_PERID_MASK (0x7f)
+#define AT91_XDMAC_DT_PERID_OFFSET (24)
+#define AT91_XDMAC_DT_PERID(perid) (((perid) & AT91_XDMAC_DT_PERID_MASK) \
+ << AT91_XDMAC_DT_PERID_OFFSET)
+#define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
+ & AT91_XDMAC_DT_PERID_MASK)
+
+#endif /* __DT_BINDINGS_AT91_DMA_H__ */
diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
new file mode 100644
index 0000000000..bbca3d0389
--- /dev/null
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -0,0 +1,40 @@
+/*
+ * This header provides constants for most at91 pinctrl bindings.
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
+#define __DT_BINDINGS_AT91_PINCTRL_H__
+
+#define AT91_PINCTRL_NONE (0 << 0)
+#define AT91_PINCTRL_PULL_UP (1 << 0)
+#define AT91_PINCTRL_MULTI_DRIVE (1 << 1)
+#define AT91_PINCTRL_DEGLITCH (1 << 2)
+#define AT91_PINCTRL_PULL_DOWN (1 << 3)
+#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
+#define AT91_PINCTRL_DEBOUNCE (1 << 16)
+#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
+
+#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
+
+#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
+
+#define AT91_PIOA 0
+#define AT91_PIOB 1
+#define AT91_PIOC 2
+#define AT91_PIOD 3
+#define AT91_PIOE 4
+
+#define AT91_PERIPH_GPIO 0
+#define AT91_PERIPH_A 1
+#define AT91_PERIPH_B 2
+#define AT91_PERIPH_C 3
+#define AT91_PERIPH_D 4
+
+#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
diff --git a/include/i2c.h b/include/i2c.h
index 1f5ae4538a..d500445aaf 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -701,6 +701,9 @@ extern struct i2c_bus_hose i2c_bus[];
* Initialization, must be called once on start up, may be called
* repeatedly to change the speed and slave addresses.
*/
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+void i2c_early_init_f(void);
+#endif
void i2c_init(int speed, int slaveaddr);
void i2c_init_board(void);
#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
diff --git a/include/linux/compat.h b/include/linux/compat.h
index e561ee311a..7236b8d0c3 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -25,6 +25,8 @@ extern struct p_current *current;
printf(fmt, ##args)
#define dev_err(dev, fmt, args...) \
printf(fmt, ##args)
+#define dev_warn(dev, fmt, args...) \
+ printf(fmt, ##args)
#define printk printf
#define printk_once printf
generated by cgit (git 2.34.1) at 2025-02-12 21:47:01 +0000