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2018-01-27net: sh_eth: Split sh_eth_initMarek Vasut
Split sh_eth_init() function into smaller chunks, which can be called from both DM and non-DM code while handling the specifics of both configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Separate out MAC address programmingMarek Vasut
Pull out the code for writing MAC address into the NIC into a separate function, so it can be reused by both DM and non-DM code. This is done in preparation for DM support, which handles MAC address programming separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Split sh_eth_recvMarek Vasut
Split sh_eth_recv into two functions, one which checks whether a packet was received and one which handles the received packet. This is done in preparation for DM support, which handles these two parts separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Pass sh_eth_dev aroundMarek Vasut
Pass sh_eth_dev structure around instead of eth_device, since the later is specific to the legacy networking support. This change is done in preparation for the DM addition. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: sh_eth: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2Marek Vasut
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27net: ravb: staticize ravb_startMarek Vasut
Cosmetic fix, make ravb_start() static. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27pci: rmobile: Add RCar Gen2 PCIe controller driverMarek Vasut
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs. The PCIe on Gen2 is used both to connect external PCIe peripherals as well as access the on-SoC USB EHCI controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-01-27gpio: rmobile: Add RCar Gen2 compatible stringMarek Vasut
Add DT compatible string for RCar Gen2. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7794 E2 PFC tablesMarek Vasut
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7792 V2H PFC tablesMarek Vasut
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tablesMarek Vasut
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24pinctrl: rmobile: Import R8A7790 H2 PFC tablesMarek Vasut
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7794 E2 clock tablesMarek Vasut
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7792 V2H clock tablesMarek Vasut
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7791/R8A7793 M2 clock tablesMarek Vasut
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Import R8A7790 H2 clock tablesMarek Vasut
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Add Gen2 clock coreMarek Vasut
Add common clock code for Renesas RCar Gen2 platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Add DIV6P1 clock typeMarek Vasut
Add macros for the DIV6P1 clock type, which is used on Gen2 and optionally also on Gen3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut
Pull code which is common for RCar Gen2 and RCar Gen3 into separate source file. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make clock tables Kconfig configurableMarek Vasut
Add Kconfig entries for each SoC clock table, so they can be compiled in or out at build time. This can reduce the size of the binary if desired. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this is thus far always zero. Split the tables so the RMSTPCR can be set too. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Pull Gen3 specific bits into separate headerMarek Vasut
Extract the macros specific to Gen3 clock into a separate header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make PLL configurations per-SoCMarek Vasut
Not all SoCs have the same PLL configuration options, so make those PLL configuraion tables per-SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Make clk_ids per-driverMarek Vasut
Not all drivers use the same IDs, so make those IDs per-driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24clk: renesas: Split RCar Gen3 driverMarek Vasut
Split the massive driver into smaller per-SoC drivers and pull the common code into a separate file. This would allow configuring out unnecessary clock drivers once the Kconfig changes are in and also allow adding more clock tables easily. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24serial: sh: Add support for R7S72100 (RZ/A1)Chris Brandt
Add support for RZ/A1 series SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2018-01-24serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2Marek Vasut
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24serial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()Marek Vasut
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is the current recommended practice. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24ARM: rmobile: Convert CONFIG_R8A77xx to KconfigMarek Vasut
Convert these configuration options to Kconfig, update board defconfigs and drop them from whitelist. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24ARM: dts: rmobile: Factor out U-Boot extrasMarek Vasut
Pull out u-boot extras into dtsi files to make synchronization of DTS from Linux kernel as easy as a simple copy. All the U-Boot extras are now in *-u-boot.dts* files instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24ARM: dts: rmobile: Update DTS to match Linux 4.14Marek Vasut
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-23Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-01-23armv8: ls1088a: Add IFC and eMMC as qixis boot sourcesAshish Kumar
Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC, QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for qixis commands. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [YS: Modify subject and add commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23fsl: common: qixis: Add ifc and emmc switching via qixisAshish Kumar
Currently only SD, NAND can be secondary boot sources controlled by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR can be secondary boot source, while QSPI-NOR is the primary. Add options in qixis to switch to other boot sources including ifc and emmc. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23crypto/fsl: Fix HW accelerated hash commandsBreno Lima
The hash command function were not flushing the dcache before passing data to CAAM/DMA and not invalidating the dcache when getting data back. Due the data cache incoherency, HW accelerated hash commands used to fail with CAAM errors like "Invalid KEY Command". Check if pbuf and pout buffers are properly aligned to the cache line size and flush/invalidate the memory regions to address this issue. This solution is based in a previous work from Clemens Gruber in commit 598e9dccc75d ("crypto/fsl: fix BLOB encapsulation and decapsulation") Reported-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ARM: dts: Freescale: re-license device tree files under GPLv2+/X11Pankaj Bansal
The current GPL only licensing on the device trees makes it very impractical for other software components licensed under another license. To make it easier to reuse them, re-license the the device trees for Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license. Same trend is followed in linux. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23armv8: ls1088a: vid: Compiling VID specific functions for SPLRajesh Bhagat
Enables and compiles VID specific functions for SPL. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ls1088a: Add VID support for QDS and RDB platformsRajesh Bhagat
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems. It reads the fusesr register and changes the VDD accordingly by adjusting the voltage via LTC3882 regulator. This patch also takes care of the special case of 0.9V VDD is present in fusesr register. In that case,it also changes the SERDES voltage by disabling the SERDES, changing the SVDD and then re-enabling SERDES. Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23common: board_f: vid: Add VID specific API to adjust core voltageRajesh Bhagat
Adds a VID specific API in init_sequence_f and spl code flow namely init_func_vid which is required to adjust core voltage. VID specific code is required in spl, hence moving flag CONFIG_VID out of spl flags. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ls1088a: ddr: configure DDR for 0.9v for VID supportRajesh Bhagat
When VID feature is supported, check the contents of fuse register and configure DDR operate at 0.9v. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCsRajesh Bhagat
Sets DDR configuration parameter cdr1 before all other settings to support case 0.9v VDD is enabled for some SoCs Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Add support for LTC3882 voltage regulator chipRajesh Bhagat
Restructures common driver to support LTC3882 voltage regulator chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23Kconfig: Add LTC3882 voltage regulator configRajesh Bhagat
Adds below LTC3882 voltage regulator config: CONFIG_VOL_MONITOR_LTC3882_READ CONFIG_VOL_MONITOR_LTC3882_SET Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Move IR chip specific code in flagRajesh Bhagat
Moves IR chip (IR36021) specific code in flag to resolve compilation issue where it is not present. For example, LS1088A is having a new LTC3882 voltage chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Add board specific vdd adjust APIRajesh Bhagat
Adds a board specific API namely board_adjust_vdd which is required to define the board VDD adjust settings. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common:vid: Add LS1088A VID Supported voltage valuesRajesh Bhagat
Adds below voltage values supported by LS1088A Soc: 1.025V(default), 0.9875V, 0.9750V, 0.9V, 1.0V, 1.0125V, 1.0250V. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23armv8: lsch3: Add serdes and DDR voltage setupRajesh Bhagat
Adds SERDES voltage and reset SERDES lanes API and makes enable/disable DDR controller support 0.9V API common. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-01-23 This time around we have a lot of EFI patches from Heinrich. Highlights are: - Allow EFI applications to register as drivers - Allow exposure of U-Boot block devices from an EFI payload - Compatibility improvements
2018-01-22Revert "travis-ci: Add qemu-x86_64 target"Tom Rini
This reverts commit 998ae28799c79c6bc796aea182ae6acf13d18284. This continues to fail in travis itself, so remove for now. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22Convert CONFIG_SOC_DA8XX et al to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_SOC_DA8XX CONFIG_SOC_DA850 CONFIG_DA850_LOWLEVEL CONFIG_MACH_DAVINCI_DA850_EVM CONFIG_SYS_DA850_PLL_INIT CONFIG_SYS_DA850_DDR_INIT Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: David Lechner <david@lechnology.com> [trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX] Signed-off-by: Tom Rini <trini@konsulko.com>
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