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2020-08-27cmd: mem: Remove already removed CONFIG_SYS_MEMTEST_SCRATCHMichal Simek
The commit e519f03a1846 ("cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mapping") removed CONFIG_SYS_MEMTEST_SCRATCH but commit 091401131085 ("command: Remove the cmd_tbl_t typedef") has added it back. That's why symbol is still in the tree that's why remove it again. Fixes: 091401131085 ("command: Remove the cmd_tbl_t typedef Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27lib/rsa: correct check after allocation in fdt_add_bignum()Heinrich Schuchardt
After allocating to pointer ctx we should check that pointer and not another pointer already checked above. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27test: undefined reference to 'sscanf'Heinrich Schuchardt
Compiling with CONFIG_UNIT_TEST=y leads to: aarch64-linux-gnu-ld.bfd: test/lib/sscanf.c:50: undefined reference to `sscanf' Add missing build dependency. Fixes:e87dfb0526be ("lib: sscanf: add sscanf implementation") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-08-27checkpatch.pl: Make fdt / initrd relocation disabling an errorTom Rini
Entirely disabling relocation of the device tree or initrd is almost never the right answer. Doing this by default leads to hard to diagnose run-time failures. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27env: Kconfig: Add missing dependency for ENV_IS_IN_EXT4Michal Simek
ENV_IS_IN_EXT4 also need to enable FS_EXT4 which is not covered in Kconfig. Kconfig reports this as: WARNING: unmet direct dependencies detected for EXT4_WRITE Depends on [n]: FS_EXT4 [=n] Selected by [y]: - ENV_IS_IN_EXT4 [=y] && !CHAIN_OF_TRUST [=n] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27arc: Kconfig: Add missing DM dependencyMichal Simek
ARC is selecting TIMER which depends on DM but DM is not selected and doesn't need to be enabled. Fix it by selecting DM for ARC architecture. Kconfig is showing this missing dependency by: WARNING: unmet direct dependencies detected for TIMER Depends on [n]: DM [=n] Selected by [y]: - ARC [=y] && <choice> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-27cmd: Kconfig: Change dependency for CMD_ADCMichal Simek
CMD_ADC selected DM_REGULATOR unconditionally without enabling DM. That's why change select to depends on to cover it. Kconfig is showing this issue as: WARNING: unmet direct dependencies detected for REGMAP Depends on [n]: DM [=n] Selected by [y]: - DM_REGULATOR_PBIAS [=y] && DM_REGULATOR [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Update CMD_ADC=y configs to enable DM_REGULATOR now] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-27pci: kconfig: Setup proper dependency for PCIE_ROCKCHIPMichal Simek
There is missing dependency for PCIE_ROCKCHIP which selects PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP. WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE Depends on [n]: ARCH_ROCKCHIP [=n] Selected by [y]: - PCIE_ROCKCHIP [=y] && PCI [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27drivers: usb: Fix config indentationRuben Di Battista
The indentation was messing up with the scripts/build-whitelist.sh that was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the other indented options) erroneously as ad-hoc configure option with the following error: ``` Error: You must add new CONFIG options using Kconfig The following new ad-hoc CONFIG options were detected: CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE ```
2020-08-26Prepare v2020.10-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-25Merge tag 'u-boot-imx-20200825' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2020.10 ----------- - mx6: SOCs user selectable Fix for imx6q_logic Some DM conversion - mx7: introduce secondary boot device Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel) - Infrastructure changes to PCI uclass to support these SoC's (Suneel) - Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel) - Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25Merge tag 'i2c-bugfixes-for-v2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for v2020.10 - fix some issues with octeon_i2c driver on ARM Octeon TX2 - fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
2020-08-25Merge tag 'u-boot-rockchip-20200820' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3399 evb sdcard support - Fix for SPL_LED support
2020-08-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
2020-08-25Merge branch '2020-08-24-misc-improvements'Tom Rini
- Squashfs compression support - Coverity fixes - XEN guest updates - Finish previous MediaTek updates - Arm Total Compute platform support
2020-08-25x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LENStefan Roese
With the upcoming increase of the malloc area in U-Boot ("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU x86 test fails: U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000) alloc space exhausted Error binding driver 'cpu_qemu': -12 Some drivers failed to bind alloc space exhausted initcall sequence fff6a760 failed at call fff13b3d (err=-19) This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is already used on qemu-x86_64_defconfig. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25imx8m: config: convert to bootm_sizeGrygorii Tertychnyi
Restrict the memory range available for image processing in the "bootm" to 256 MiB so the kernel can access it and FDT or initrd are not overwritten on ARM64. Signed-off-by: Grygorii Tertychnyi <grygorii.tertychnyi@leica-geosystems.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-25ARM: imx6q_logic: Fix broken booting by moving fdt_addr_r addressAdam Ford
The loading address is too close to the kernel address, so newer kernels may overlap memory space, so loading the device tree may corrupt zImage. This patch moves the fdt_addr_r to 0x14000000 which is also consistent with guidance that the kernel be allocated 32MB. This places it in the same place as the ramdisk, so this patch moves the ramdisk address 512KB after the fdt. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-25pico-imx6: Remove unneeded CONFIG_DM_MDIOFabio Estevam
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig: "Useful in particular for systems that support DM_ETH and have a stand-alone MDIO hardware block shared by multiple Ethernet interfaces." i.MX6 has a single FEC instance, so there is no need to select CONFIG_DM_MDIO. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-08-25arm: mx6: Make all i.MX6 SoCs user-selectableTom Rini
We have a number of platforms that are a combination of a carrier board and System-on-Module (SoM) that in turn allows for the board to have different SoCs on it. In some cases, this is handled via board-specific Kconfig options. In other cases we make use of CONFIG_SYS_EXTRA_OPTIONS. This latter case however can lead to invalid configurations as we will not in turn get options that in Kconfig are selected by or depend on that setting. To resolve this, make the SoC option a choice in Kconfig and make boards depend on what they can support. This change opens us up for further clean-ups in the cases where a single CONFIG_TARGET_xxx can support different SoCs and today they do not, or do not cleanly do so. Reported-by: Matt Porter <mporter@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Soeren Moch <smoch@web.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Heiko Schocher <hs@denx.de> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ian Ray <ian.ray@ge.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Cc: Simone CIANNI <simone.cianni@bticino.it> Cc: Adam Ford <aford173@gmail.com> Cc: Marcin Niestroj <m.niestroj@grinn-global.com> Cc: "Eric Bénard" <eric@eukrea.com> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Cc: Eric Nelson <eric@nelint.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Parthiban Nallathambi <parthiban@linumiz.com> Cc: Marek Vasut <marex@denx.de> Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Niel Fourie <lusus@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Richard Hu <richard.hu@technexion.com> Cc: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com> Cc: Breno Lima <breno.lima@nxp.com> Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org> Cc: Silvio Fricke <open-source@softing.de> Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-25arm: octeontx2: Add support for OcteonTX2 SoC platformsSuneel Garapati
This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25arm: octeontx: Add support for OcteonTX SoC platformsSuneel Garapati
This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25watchdog: Add reset support for OcteonTX / TX2Suneel Garapati
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati
Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati
Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: octeontx2: Add headers for OcteonTX2Suneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25arm: octeontx: Add headers for OcteonTXSuneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: include/asm/io.h: Add 64bit clrbits and setbits helpersSuneel Garapati
Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Check validity of ofnodeSuneel Garapati
Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati
Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati
SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati
If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954xTrommel, Kees (Contractor)
Fix for the case of a U-Boot configuration with CONFIG_SPL, CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because dm_write_i2c does not exist because CONFIG_SPL_DM is not defined. Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com> Cc: Heiko Schocher <hs@denx.de>
2020-08-25i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 supportStefan Roese
This patch fixes a few issues noticed, when testing this new driver on ARM Octeon TX2 again. Here the details: - Remove "common.h" header inclusion - Use correct THP define on Octeon TX2 - Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi" compatible and add a check to the Octeon TX2 specific "cavium,thunderx-i2c" so that the correct driver data is selected. - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati
Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese
Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25ARM: renesas: Drop unnecessary function ft_board_setup()Stefan Roese
Marek explained on IRC, that ft_board_setup() is not used / necessary at all. So its best to just drop it completely, as it interferes with the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed). Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25dm: core: Add API to read PCI bus-range propertyStefan Roese
Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25fdtdec: Add API to read pci bus-range propertySuneel Garapati
Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25cmd: provide command sbiHeinrich Schuchardt
Provide a command to display information about the SBI implementation. The output might look like: => sbi SBI 0.2 OpenSBI Extensions: sbi_set_timer sbi_console_putchar sbi_console_getchar sbi_clear_ipi sbi_send_ipi sbi_remote_fence_i sbi_remote_sfence_vma sbi_remote_sfence_vma_asid sbi_shutdown SBI Base Functionality Timer Extension IPI Extension RFENCE Extension Hart State Management Extension The command can be used to construct a unit test checking that the communication with the SEE is working. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
2020-08-25configs: defconfig for Sipeed Maix in S-modeHeinrich Schuchardt
Provide a defconfig that can be used to build U-Boot for the Maix boards running upon OpenSBI. Update the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-25riscv: fix building with CONFIG_SPL_SMP=nHeinrich Schuchardt
Building with CONFIG_SPL_SMP=n results in: arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’: arch/riscv/lib/spl.c:33:6: error: unused variable ‘ret’ [-Werror=unused-variable] 33 | int ret; | ^~~ Define the variable ret as __maybe_unused. Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL") Fixes: 8c59f2023cc8 ("riscv: add SPL support") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25clk: kendryte/pll.h: do not redefine nop()Heinrich Schuchardt
The kendryte PLL code uses nop as barrier. The macro is not defined for the sandbox on x86 but is defined on RISC-V. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>