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2007-03-28i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is definedStefan Roese
The "old" i2c commands (iprobe, imd...) are now compiled in again, even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE config option. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24Merge with /home/stefan/git/u-boot/acadiaStefan Roese
2007-03-24[PATCH] Add 4xx GPIO functionsStefan Roese
This patch adds some 4xx GPIO functions. It also moves some of the common code and defines into a common 4xx GPIO header file. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24[PATCH] Small Sequoia cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24[PATCH] Clean up 40EZ/Acadia supportStefan Roese
This patch cleans up all the open issue of the preliminary Acadia support. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21ppc4xx: Fix file mode of include/configs/acadia.hStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21Merge with /home/stefan/git/u-boot/acadiaStefan Roese
2007-03-21[PATCH] Add AMCC Acadia (405EZ) eval board supportStefan Roese
This patch adds support for the new AMCC Acadia eval board. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21[PATCH] Add AMCC PPC405EZ supportStefan Roese
This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-16[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval boardStefan Roese
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the DDR memory are dynamically programmed matching the total size of the equipped memory (DIMM modules). Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-14[PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405Matthias Fuchs
boards in terms of unification. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk
2007-03-08ppc4xx: Fix file mode of sequoia.cStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08Minor cleanup.Wolfgang Denk
2007-03-08ppc4xx: Clear Sequoia/Rainier security engine reset bitsJohn Otken john@softadvances.com
Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
2007-03-08Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk
2007-03-08[PATCH] I2C: add some more SPD eeprom decoding for DDR2 modulesMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08[PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is definedMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08[PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUSMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08[PATCH] I2C: Add missing default CFG_SPD_BUS_NUMMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08fixed ethernet phy configuration for plu405 boardMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08Minor cleanupWolfgang Denk
2007-03-08Merge with /home/hs/jupiter/u-bootWolfgang Denk
2007-03-08Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk
2007-03-08Merge with /home/stefan/git/u-boot/yucca-ddr2Stefan Roese
2007-03-08[PATCH] Update AMCC Luan 440SP eval board supportStefan Roese
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. This patch also enables the cache in FLASH for the startup phase of U-Boot (while running from FLASH). After relocating to SDRAM the cache is disabled again. This will speed up the boot process, especially the SDRAM setup, since there are some loops for memory testing (auto calibration). Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08[PATCH] Update AMCC Yucca 440SPe eval board supportStefan Roese
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08ppc4xx: Small AMCC Katmai 440SPe updateStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SPStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk
2007-03-07[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval boardStefan Roese
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the DDR memory are dynamically programmed matching the total size of the equipped memory (DIMM modules). Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM'sStefan Roese
This patch fixes a problem that occurs when 2 DIMM's are used. This problem was first spotted and fixed by Gerald Jackson <gerald.jackson@reaonixsecurity.com> but this patch fixes the problem in a little more clever way. This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. As this feature is new to the "old" 44x SPD DDR driver, it has to be enabled via the CONFIG_PROG_SDRAM_TLB define. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07UC101: fix compiler warningsWolfgang Denk
2007-03-07HMI1001: fix build error, cleanup compiler warnings.Wolfgang Denk
2007-03-06Restructure POST directory to support of other CPUs, boards, etc.Wolfgang Denk
2007-03-06Fix HOSTARCH handling.Wolfgang Denk
Patch by Mike Frysinger, Mar 05 2007
2007-03-06[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setupStefan Roese
As provided by the AMCC applications team, this patch optimizes the DDR2 setup for 166MHz bus speed. The values provided are also save to use on a "normal" 133MHz PLB bus system. Only the refresh counter setup has to be adjusted as done in this patch. For this the NAND booting version had to include the "speed.c" file from the cpu/ppc4xx directory. With this addition the NAND SPL image will just fit into the 4kbytes of program space. gcc version 4.x as provided with ELDK 4.x is needed to generate this optimized code. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-02mpc83xx: fix implicit declaration of function 'ft_get_prop' warningsKim Phillips
(cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit)
2007-03-02mpc83xx: Fix config of Arbiter, System Priority, and Clock ModeKumar Gala
The config value for: * CFG_ACR_PIPE_DEP * CFG_ACR_RPTCNT * CFG_SPCR_TSEC1EP * CFG_SPCR_TSEC2EP * CFG_SCCR_TSEC1CM * CFG_SCCR_TSEC2CM Were not being used when setting the appropriate register Added: * CFG_SCCR_USBMPHCM * CFG_SCCR_USBDRCM * CFG_SCCR_PCICM * CFG_SCCR_ENCCM To allow full config of the SCCR. Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349 that were just bogus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-02mpc83xx: update [local-]mac-address properties on UEC based devicesKim Phillips
8360 and 832x weren't updating their [local-]mac-address properties. This patch fixes that. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-03-02mpc83xx: write MAC address to mac-address and local-mac-addressTimur Tabi
Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, this patch updates ftp_cpu_setup() to write the MAC address to mac-address if it exists. This function already updates local-mac-address. Signed-off-by: Timur Tabi <timur@freescale.com>
2007-03-02mpc83xx: add command line editing by defaultKim Phillips
2007-03-02mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffersKim Phillips
Disable G1TXCLK, G2TXCLK h/w buffers. This patch fixes a networking timeout issue with MPC8360EA (Rev.2) PBs. Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
2007-03-02mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xxXie Xiaobo
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller. it pass DDR/DDR2 compliance tests. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2007-03-02mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDSXie Xiaobo
MPC8360E rev2.0 have new spridr,and PVR value, The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2007-03-02mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDSXie Xiaobo
MPC8349E rev3.1 have new spridr,and PVR value, The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM. Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
2007-03-02mpc83xx: Fix empty i2c reads/writes in fsl_i2c.cJoakim Tjernlund
Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0) which is used to se if an slave will ACK after receiving its address. Correct i2c probing to use this method as the old method could upset a slave as it wrote a data byte to it. Add a small delay in i2c_init() to let the controller shutdown any ongoing I2C activity. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2007-03-02mpc83xx: Add support for the MPC8349E-mITX-GPTimur Tabi
Add support for the MPC8349E-mITX-GP, a stripped-down version of the MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in HRCW is 0) for the ITX and a README for the ITX and the ITX-GP. Signed-off-by: Timur Tabi <timur@freescale.com>
2007-03-02mpc83xx: Delete sdram_init() for MPC8349E-mITXTimur Tabi
There is no SDRAM on any of the 8349 ITX variants, so function sdram_init() never does anything. This patch deletes it. Signed-off-by: Timur Tabi <timur@freescale.com>
2007-03-02mpc83xx: Fix the LAW1/3 bugDave Liu
The patch solves the alignment problem of the local bus access windows to render accessible the memory bank and PHY registers of UPC 1 (starting at 0xf801 0000). What we actually did was to adjust the sizes of the bus access windows so that the base address alignment requirement would be met. Signed-off-by: Chereji Marian <marian.chereji@freescale.com> Signed-off-by: Gridish Shlomi <gridish@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
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