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Move init code of low-level debug into a single file.
This is helpful to create an image that runs on multiple SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Currently, IECTRL is enabled after pin-mux settings for the low-level
debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input
signals are pulled-down, i.e. glitch signal (Low to High transition)
problem occurs if pin-mux is set up first. As a result, one invalid
character is input to the UART block and the auto-boot counting is
terminated immediately.
The correct initialization procedure is:
[1] Enable IECTRL (if IECTRL exists for the pins)
[2] Set up pin-muxing
[3] Deassert the reset of the hardware block
Currently, the low-level debugging is working for PH1-sLD3 and
PH1-Pro4, but just in case, follow the sequence for all the SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The UART I/O ports for PH1-Pro4 has no input enable controlling.
This code is useless.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify
they belong to UniPhier SoC family.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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It is no longer necessary to define CONFIG_SUPPORT_CARD_* globally.
Move them to a C file as local macros. Also, rename the C file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The macro, led_write(), is now only used in C sources. There is no
more reason to keep the tricky assembly macro. Replace it with a
new C function led_puts().
Also, rename board.h to micro-support-card.h.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The wrapper functions, uniphier_board_*, are just making function
calls complex. Remove them.
Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD
is disabled, so that prototype checking works.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This has been unused since commit f4e190e317b8 ("ARM: uniphier:
enable SPL_OF_CONTROL").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Device tree specifies the available memory ranges in its "/memory"
node. Use it to simplify the CONFIG defines.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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To achieve the complete run-time configuration by device trees, ifdef
conditionals in header files are not preferable.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
Going forward, use the latter for the external bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This command will be used in the next commit to calculate
base-offseted addresses.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Historically (for compatibility with very old platforms), two
different types of micro support cards have been used with the
UniPhier SoC development boards. It has been painful to maintain
both. Having one of them is enough.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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These input enable settings are handled by the pinctrl drivers.
Because the external bus pins are input-enabled by default, on-board
devices such as LED still work fine even with this delayed input
enabling.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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As the UniPhier serial driver had already switched to Drive Model
and the pinctrl drivers are now enabled, these pin-muxing settings
are properly handled by the pinctrl drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Now, UniPhier SoCs are ready to enable pinctrl drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB
(spl/u-boot-spl.dtb).
The "soc" node (this is simple-bus node) also needs the property
to bind the pinctrl node located under it.
I am collecting this U-Boot specific hack to the bottom of board
DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI.
My goal is to sync DTSI with Linux for easier maintenance.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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In the next commit, I will add "u-boot,dm-pre-reloc" to the "soc"
(simple-bus) nodes in UniPhier device trees. But, before that,
CONFIG_SYS_MALLOC_F_LEN must be increased.
Adding "u-boot,dm-pre-reloc" to a simple-bus node causes it to bind
all of its child nodes. (See simple_bus_post_bind() function)
Actually, I want only UART0 and pinctrl to be bound in SPL and before
relocation in U-boot proper. But, with "u-boot,dm-pre-reloc" in the
simple-bus node, all the other unwanted nodes are also bound. The
default value for CONFIG_SYS_MALLOC_F_LEN, 0x400, is not enough for
that. Increase the pre-reloc malloc size to 0x2000, hoping the root
cause will be fixed later.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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In UniPhier device trees, pinctrl device nodes are located under the
simple-bus (AMBA).
This is needed to bind pinctrl devices in SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier PH1-LD6b SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier ProXstream2
SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier PH1-Pro5 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier PH1-sLD8 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier PH1-Pro4 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add pin configuration and pinmux support for UniPhier PH1-LD4 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Fix coding style.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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We use outer pmic reset and drop internal reset signal, bmode will
not work as expected, so drop boot mode code for 7dsabresd board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Adrian Alonso <aalonso@freescale.com>
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boot_mode_apply should be applied only with CONFIG_CMD_BMODE enabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Discard unused global variable.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add MAINTAINERS info for mx6slevk_spl, mx6ul_9x9_evk and mx6qpsabreauto.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
only take i.MX6/7 into consideration.
"c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings"
Use is_soc_type(MXC_CPU_MX7) to avoid breaking other i.MXes when
setting mux_mode.
In this patch, switch to use "asm/imx-common/sys_proto.h" to avoid
build break for "is_soc_type" for vf610 and mx25.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
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Enable support for env in eMMC on MCV SoM.
Signed-off-by: Marek Vasut <marex@denx.de>
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Enable the able to save the environment variables when SD/MMC is used.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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The core support for the pinctrl drivers for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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commit "arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files"
renames the configs files, so we should update the MAINTAINERS' entry. At
the same time, update the email for Dinh Nguyen.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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Rename the socfpga_cyclone5.h to socfpga_cyclone5_socdk.h, and
socfpga_arria.h to socfpga_arria5_socdk.h. This matches the other SoCFPGA
board config files.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
policy is selected. This leads to much better performance on the SoCFPGA.
A quick network test shows this:
Without this patch:
=> tftp 100000 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.1.54; our IP address is 192.168.1.252
Filename 'big-40mb'.
Load address: 0x100000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
##########################
2.5 MiB/s
With this patch:
=> tftp 100000 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.1.54; our IP address is 192.168.1.252
Filename 'big-40mb'.
Load address: 0x100000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
##########################
7.6 MiB/s
A performance improvement of factor ~3.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
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Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The command:
ethsw [port <port_no>] ingress filtering
{ [help] | show | enable | disable }
- enable/disable VLAN ingress filtering on port
can be used to enable/disable/show VLAN ingress filtering on a port.
This command has also been added to the ethsw generic parser
from common/cmd_ethsw.c
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The command:
ethsw vlan fdb { [help] | show | shared | private }
- make VLAN learning shared or private"
configures the FDB to share the FDB entries learned on multiple VLANs
or to keep them separated. By default, the FBD uses private VLAN
learning. This command has also been added to the ethsw generic parser
from common/cmd_ethsw.c
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The new added commands can be used to configure VLANs for a port
on both ingress and egress.
The new commands are:
ethsw [port <port_no>] pvid { [help] | show | <pvid> }
- set/show PVID (ingress and egress VLAN tagging) for a port;
ethsw [port <port_no>] vlan { [help] | show | add <vid> | del <vid> }
- add a VLAN to a port (VLAN members);
ethsw [port <port_no>] untagged { [help] | show | all | none | pvid }
- set egress tagging mod for a port"
ethsw [port <port_no>] egress tag { [help] | show | pvid | classified }
- Configure VID source for egress tag. Tag's VID could be the
frame's classified VID or the PVID of the port
These commands have also been added to the ethsw generic parser from
common/cmd_ethsw.c
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The new command:
ethsw [port <port_no>] [vlan <vid>] fdb
{ [help] | show | flush | { add | del } <mac> }
Can be used to add and delete FDB entries. Also, the command can be used
to show entries from the FDB tables. When used with [port <port_no>]
and [vlan <vid>], only the matching the FDB entries can be seen or
flushed. The command has also been added to the generic ethsw parser
from cmd_ethsw.c.
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The code that checks if a string has the format of a MAC address has been
moved to a separate function called eth_validate_ethaddr_str().
This has been done to allow other components (such as vsc9953 driver)
to validate a MAC address.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The command:
ethsw [port <port_no>] learning { [help] | show | auto | disable }
can be used to enable/disable HW learning on a port.
This patch also adds this command to the generic ethsw parser from
cmd_ethsw.
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The new added command:
ethsw [port <port_no>] statistics { [help] | [clear] }
will print counters like the number of Rx/Tx frames,
number of Rx/Tx bytes, number of Rx/Tx unicast frames, etc.
This patch also adds this commnd in the genereric ethsw
parser from cmd_ethsw.c
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This patch replaces the parser used by VSC9953 L2 Switch driver with
the generic one. Also, the config macro that enables the
VSC9953 commands has been replaced in all the platforms that
use this driver with the config macro that corresponds to the
generic parser.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This patch creates a flexible parser for Ethernet Switch
configurations that should support complex commands.
The parser searches for predefined keywords in the command
and calls the proper function when a match is found.
Also, the parser allows for optional keywords, such as
"port", to apply the command on a port
or on all ports. For now, the defined commands are:
ethsw [port <port_no>] { enable | disable | show }
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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At startup, the default configuration should be:
- enable HW learning on all ports (HW default);
- all ports are VLAN aware;
- all ports are members of VLAN 1;
- all ports have Port-based VLAN 1;
- on all ports, the switch is allowed to remove
maximum one VLAN tag,
- on egress, the switch should add a VLAN tag if the
frame is classified to a different VLAN than the port's
Port-based VLAN;
Signed-off-by: Johnson Leung <johnson.leung@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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